About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a Design Verification Engineer to join our Internal IP DV team. You will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.
Key responsibilities
Develop and maintain UVM/SystemVerilog testbenches for high-performance IPs (compute arrays, DMAs, NoCs, memory subsystems).
Define and execute verification plans covering functional correctness, corner cases, concurrency, and performance bottlenecks.
Debug complex datapath and protocol issues in RTL and testbench environments.
Work closely with architects and designers to validate functionality and design intent.
Partner with SW, FW, and emulation teams to ensure end-to-end bring-up and debug coverage.
Contribute to reusable DV infrastructure, coverage models, and methodology improvements.
You may be a good fit if you have
Proficiency with UVM and SystemVerilog.
Strong debugging and problem-solving skills for complex digital designs.
Solid knowledge of computer architecture and digital design fundamentals.
Hands-on experience verifying datapaths, memory systems, interconnects, or high-throughput fabrics.
Strong candidates may also have experience with
Familiarity with SystemVerilog Assertions (SVA) and formal verification techniques.
Experience verifying systolic arrays, DMA engines, or NoC/AXI protocols.
Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a Design Verification Engineer to join our Internal IP DV team. You will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.\n\n\n\nKey responsibilities\n\n - Develop and maintain UVM/SystemVerilog testbenches for high-performance IPs (compute arrays, DMAs, NoCs, memory subsystems).\n\n - Define and execute verification plans covering functional correctness, corner cases, concurrency, and performance bottlenecks.\n\n - Debug complex datapath and protocol issues in RTL and testbench environments.\n\n - Work closely with architects and designers to validate functionality and design intent.\n\n - Partner with SW, FW, and emulation teams to ensure end-to-end bring-up and debug coverage.\n\n - Contribute to reusable DV infrastructure, coverage models, and methodology improvements.\n\n\n\nYou may be a good fit if you have\n\n - Proficiency with UVM and SystemVerilog.\n\n - Strong debugging and problem-solving skills for complex digital designs.\n\n - Solid knowledge of computer architecture and digital design fundamentals.\n\n - Hands-on experience verifying datapaths, memory systems, interconnects, or high-throughput fabrics.\n\n\n\nStrong candidates may also have experience with\n\n - Familiarity with SystemVerilog Assertions (SVA) and formal verification techniques.\n\n - Experience verifying systolic arrays, DMA engines, or NoC/AXI protocols.\n\n - Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"1c03c13b-6f2e-44e7-b5bd-b7628412f8b9","title":"Infrastructure Software Engineer","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-01-20T04:05:35.637+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/1c03c13b-6f2e-44e7-b5bd-b7628412f8b9","applyUrl":"https://jobs.ashbyhq.com/etched/1c03c13b-6f2e-44e7-b5bd-b7628412f8b9/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Building cutting-edge model-specific ASICs requires crafting custom infrastructure and toolchains to support ultra-fast, reliable, and scalable development across the stack - from simulation to silicon. We build this infrastructure as software - and we engineer it with the same best practices we apply to our products. We use the same rigor, design discipline, and quality standards and testing as we do to our ASIC, software, and platform.
You will lead the development and adoption of next-generation infrastructure tooling, enabling Etched ASIC, Software, and Platform engineers to iterate faster, build more reliably, and push the boundaries of AI performance. This includes building and scaling our hybrid high-performance compute (HPC) cluster, optimized for massively parallel CI, EDA workflows, Emulation, and hardware-aware job execution.
You’ll also architect and implement a state-of-the-art observability stack with LLM integration and a strong emphasis on streaming health and performance telemetry, log aggregation, distributed tracing, insight generation, synthetic testing, and smart alerting - across CI pipelines, simulation clusters, and service endpoints.
This role demands a strong software engineering mindset, quality instincts, and deep understanding of systems. It’s not just about writing scripts - it’s about writing code that builds and manages infrastructure with precision, repeatability, and intent.
Key responsibilities
Design and build the orchestration layers that drive our hybrid high-performance clusters—enabling simulation, synthesis, and continuous integration of AI ASICs at unprecedented scale.
Develop and maintain a fully programmable infrastructure control plane to ensure reproducibility, auditability, and rapid iteration across the entire stack.
Create tools and abstractions that empower engineers to harness massive parallelism without worrying about the underlying complexity..
Prototype and execute workload orchestration and migration strategies between on-premise and cloud environments, balancing performance, storage availability and replication, uptime, and cost across heterogeneous hardware and compute backends.
Implement real-time telemetry, tracing systems that surface insights from millions of metrics, enabling proactive debugging and system optimization.
Build a full observability stack that includes dashboards, alerting, automated responses, and a synthetic testing framework to proactively test infrastructure performance and reliability for various application and data flows, ensuring we remain proactive against issues impacting development and productivity workflows.
Representative projects
Design and deploy a fully automated, scalable hybrid HPC cluster, combining bare-metal servers and switches with cloud instances, provisioned through MaaS and orchestrated via SLURM and Kubernetes, optimized for mixed EDA workloads and parallel CI pipelines.
Develop a real-time observability system for ASIC toolchain jobs and distributed builds, integrating Prometheus, Grafana, and VictoriaMetrics with streaming telemetry, tracing, and alerting to detect performance regressions before they hit silicon.
Architect and implement a programmable infrastructure-as-code control plane, using Terraform, Ansible, and Puppet, to version, audit, and redeploy every layer of Etched's development stack with deterministic reproducibility.
Create a zero-downtime interactive development environment that provisions and connects Jupyter and VS Code sessions to GPUs and high-memory nodes via a secure zero-trust network, abstracting away cluster state and machine failures.
Prototype and evaluate dynamic workload migration strategies between on-premise and cloud environments to optimize for latency, reliability, and cost across simulation and synthesis pipelines.
Design a synthetic testing and fault injection framework to validate the behavior of infrastructure under high-load, degraded hardware, and intermittent network partitions - before they happen in production.
You may be a good fit if you
Are a systems-minded software engineer who loves building foundational platforms, working close to the metal and cloud, solving high-leverage problems at scale.
Are a deeply technical engineer who treats infrastructure as a software problem - prioritizing clean abstractions, version control,small change lists, easy roll backs, testing, and long-term maintainability over ad hoc configuration.
Have strong programming skills in languages such as Python, Go, Rust, and C++, and are comfortable building production-grade tooling.
Possess expert-level knowledge of Linux, virtualization, containerization, and CI/CD pipelines, with a deep understanding of how to debug, optimize, and scale complex systems.
Are familiar with Infrastructure as Code tools like OpenTofu, Ansible, or Puppet, and enjoy designing declarative, reproducible infrastructure systems.
Understand and use PromQL and other telemetry/query languages and have used LLM to extract insight from real-time metrics, and know how to architect and tune observability stacks.
Have a track record of debugging and resolving difficult hardware-software integration problems across bare-metal systems, networks, and distributed workloads.
Can lead and mentor technical teams, guiding design decisions and helping others develop sound engineering instincts.
Have 8+ years of experience in infrastructure engineering, systems programming, or backend software development - ideally in environments where performance, scale, or hardware interaction mattered.
Are driven by curiosity, take initiative, and have an innate sense of ownership — you thrive in uncharted territory, design for edge cases, and love making systems more powerful, reliable, and elegant.
Strong candidates may also have experience with
Familiarity with Bazel build system
Deep understanding of ASIC development flows, especially those involving Synopsys, Cadence, and Verilator, including how EDA tools interact with infrastructure for simulation, synthesis, and verification.
Hands-on experience architecting systems with AWS, GCP, or Azure, including hybrid on-prem/cloud deployments, workload migration strategies, and cloud-native orchestration tooling.
Experience monitoring, provisioning, and debugging bare-metal servers, network hardware, and high-performance storage systems in rack-scale environments.
Comfortable in profiling and optimizing compute environments for single-threaded latency, memory-bound workloads, or I/O throughput, especially in the context of simulation or CI performance.
Proficiency building or operating telemetry systems at scale using Prometheus, Grafana, Loki, VictoriaMetrics, and tools for distributed tracing, log aggregation, and real-time alerting across heterogeneous mediums (SMS, email, push alerts, etc.)
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nBuilding cutting-edge model-specific ASICs requires crafting custom infrastructure and toolchains to support ultra-fast, reliable, and scalable development across the stack - from simulation to silicon. We build this infrastructure as software - and we engineer it with the same best practices we apply to our products. We use the same rigor, design discipline, and quality standards and testing as we do to our ASIC, software, and platform.\n\n\n\nYou will lead the development and adoption of next-generation infrastructure tooling, enabling Etched ASIC, Software, and Platform engineers to iterate faster, build more reliably, and push the boundaries of AI performance. This includes building and scaling our hybrid high-performance compute (HPC) cluster, optimized for massively parallel CI, EDA workflows, Emulation, and hardware-aware job execution.\n\n\n\nYou’ll also architect and implement a state-of-the-art observability stack with LLM integration and a strong emphasis on streaming health and performance telemetry, log aggregation, distributed tracing, insight generation, synthetic testing, and smart alerting - across CI pipelines, simulation clusters, and service endpoints.\n\n\n\nThis role demands a strong software engineering mindset, quality instincts, and deep understanding of systems. It’s not just about writing scripts - it’s about writing code that builds and manages infrastructure with precision, repeatability, and intent.\n\n\n\nKey responsibilities\n\n - Design and build the orchestration layers that drive our hybrid high-performance clusters—enabling simulation, synthesis, and continuous integration of AI ASICs at unprecedented scale.\n\n - Develop and maintain a fully programmable infrastructure control plane to ensure reproducibility, auditability, and rapid iteration across the entire stack.\n\n - Create tools and abstractions that empower engineers to harness massive parallelism without worrying about the underlying complexity..\n\n - Prototype and execute workload orchestration and migration strategies between on-premise and cloud environments, balancing performance, storage availability and replication, uptime, and cost across heterogeneous hardware and compute backends.\n\n - Implement real-time telemetry, tracing systems that surface insights from millions of metrics, enabling proactive debugging and system optimization.\n\n - Build a full observability stack that includes dashboards, alerting, automated responses, and a synthetic testing framework to proactively test infrastructure performance and reliability for various application and data flows, ensuring we remain proactive against issues impacting development and productivity workflows.\n\n\n\nRepresentative projects\n\n - Design and deploy a fully automated, scalable hybrid HPC cluster, combining bare-metal servers and switches with cloud instances, provisioned through MaaS and orchestrated via SLURM and Kubernetes, optimized for mixed EDA workloads and parallel CI pipelines.\n\n - Develop a real-time observability system for ASIC toolchain jobs and distributed builds, integrating Prometheus, Grafana, and VictoriaMetrics with streaming telemetry, tracing, and alerting to detect performance regressions before they hit silicon.\n\n - Architect and implement a programmable infrastructure-as-code control plane, using Terraform, Ansible, and Puppet, to version, audit, and redeploy every layer of Etched's development stack with deterministic reproducibility.\n\n - Create a zero-downtime interactive development environment that provisions and connects Jupyter and VS Code sessions to GPUs and high-memory nodes via a secure zero-trust network, abstracting away cluster state and machine failures.\n\n - Prototype and evaluate dynamic workload migration strategies between on-premise and cloud environments to optimize for latency, reliability, and cost across simulation and synthesis pipelines.\n\n - Design a synthetic testing and fault injection framework to validate the behavior of infrastructure under high-load, degraded hardware, and intermittent network partitions - before they happen in production.\n\n\n\nYou may be a good fit if you\n\n - Are a systems-minded software engineer who loves building foundational platforms, working close to the metal and cloud, solving high-leverage problems at scale.\n\n - Are a deeply technical engineer who treats infrastructure as a software problem - prioritizing clean abstractions, version control,small change lists, easy roll backs, testing, and long-term maintainability over ad hoc configuration.\n\n - Have strong programming skills in languages such as Python, Go, Rust, and C++, and are comfortable building production-grade tooling.\n\n - Possess expert-level knowledge of Linux, virtualization, containerization, and CI/CD pipelines, with a deep understanding of how to debug, optimize, and scale complex systems.\n\n - Are familiar with Infrastructure as Code tools like OpenTofu, Ansible, or Puppet, and enjoy designing declarative, reproducible infrastructure systems.\n\n - Understand and use PromQL and other telemetry/query languages and have used LLM to extract insight from real-time metrics, and know how to architect and tune observability stacks.\n\n - Have a track record of debugging and resolving difficult hardware-software integration problems across bare-metal systems, networks, and distributed workloads.\n\n - Can lead and mentor technical teams, guiding design decisions and helping others develop sound engineering instincts.\n\n - Have 8+ years of experience in infrastructure engineering, systems programming, or backend software development - ideally in environments where performance, scale, or hardware interaction mattered.\n\n - Are driven by curiosity, take initiative, and have an innate sense of ownership — you thrive in uncharted territory, design for edge cases, and love making systems more powerful, reliable, and elegant.\n\n\n\nStrong candidates may also have experience with\n\n - Familiarity with Bazel build system\n\n - Deep understanding of ASIC development flows, especially those involving Synopsys, Cadence, and Verilator, including how EDA tools interact with infrastructure for simulation, synthesis, and verification.\n\n - Hands-on experience architecting systems with AWS, GCP, or Azure, including hybrid on-prem/cloud deployments, workload migration strategies, and cloud-native orchestration tooling.\n\n - Experience monitoring, provisioning, and debugging bare-metal servers, network hardware, and high-performance storage systems in rack-scale environments.\n\n - Comfortable in profiling and optimizing compute environments for single-threaded latency, memory-bound workloads, or I/O throughput, especially in the context of simulation or CI performance.\n\n - Proficiency building or operating telemetry systems at scale using Prometheus, Grafana, Loki, VictoriaMetrics, and tools for distributed tracing, log aggregation, and real-time alerting across heterogeneous mediums (SMS, email, push alerts, etc.)\n \n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"39cb22b6-58e9-4612-994f-eba767aca818","title":"Technical Recruiter (Inference)","department":"People","team":"People","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-01-18T23:44:16.301+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/39cb22b6-58e9-4612-994f-eba767aca818","applyUrl":"https://jobs.ashbyhq.com/etched/39cb22b6-58e9-4612-994f-eba767aca818/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As we scale, we’re looking for a Technical Recruiter (Inference) to build and own some of the most high-leverage, relationship-driven parts of our recruiting function. This role is ideal for someone who thrives in fast-paced, high-talent-density environments and loves the hunt.
What You’ll Do
Own the full-cycle recruiting process, from sourcing through offer, ensuring top-of-funnel quality and fast, high-signal decision-making
Build strong partnerships with hiring managers and advocate for both candidates and company needs
Source candidates in unconventional places - e.g., GitHub repos, preprint authors on arXiv, contributors to Apache mailing lists, or insightful Twitter threads
Facilitate structured interview loops, track candidate performance, and lead debriefs alongside hiring managers and leadership
Manage offers and close processes in collaboration with hiring managers and leaders
Continuously improve our recruiting systems, workflows, and candidate experience
You may be a good fit if you have
Have 5+ years of experience recruiting non-technical talent in highly competitive markets
Can evaluate both technical depth and cultural fit with nuance and clarity
Are resourceful in finding exceptional candidates beyond the obvious platforms
Thrive in ambiguity and enjoy building systems from scratch
Care deeply about candidate experience and operational excellence
Strong candidates may also have experience with (Nice-to-have qualifications)
Familiarity with the AI, semiconductor, or hardware engineering talent landscape
A track record of hiring exceptional engineers in niche or emerging fields
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nAs we scale, we’re looking for a Technical Recruiter (Inference) to build and own some of the most high-leverage, relationship-driven parts of our recruiting function. This role is ideal for someone who thrives in fast-paced, high-talent-density environments and loves the hunt.\n\n \n\nWhat You’ll Do\n\n - Own the full-cycle recruiting process, from sourcing through offer, ensuring top-of-funnel quality and fast, high-signal decision-making\n\n - Build strong partnerships with hiring managers and advocate for both candidates and company needs\n\n - Source candidates in unconventional places - e.g., GitHub repos, preprint authors on arXiv, contributors to Apache mailing lists, or insightful Twitter threads\n\n - Facilitate structured interview loops, track candidate performance, and lead debriefs alongside hiring managers and leadership\n\n - Manage offers and close processes in collaboration with hiring managers and leaders\n\n - Continuously improve our recruiting systems, workflows, and candidate experience\n\n\n\nYou may be a good fit if you have\n\n - Have 5+ years of experience recruiting non-technical talent in highly competitive markets\n\n - Can evaluate both technical depth and cultural fit with nuance and clarity\n\n - Are resourceful in finding exceptional candidates beyond the obvious platforms\n\n - Thrive in ambiguity and enjoy building systems from scratch\n\n - Care deeply about candidate experience and operational excellence\n \n \n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Familiarity with the AI, semiconductor, or hardware engineering talent landscape\n\n - A track record of hiring exceptional engineers in niche or emerging fields\n\n \n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n \n \n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"92862cf4-3fe6-4317-b771-8fcdf0a95758","title":"Physical Design Engineer","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2025-08-11T00:21:16.592+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/92862cf4-3fe6-4317-b771-8fcdf0a95758","applyUrl":"https://jobs.ashbyhq.com/etched/92862cf4-3fe6-4317-b771-8fcdf0a95758/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is looking for exceptional Physical Design engineers to join our team. In this role, you
will own block-level implementation and verification, drive timing closure and PPA optimization, supervise 3rd party design work, and help improve our design flows and iteration speed.
Key Responsibilities
Deeply understand what is involved in physical design
Running PD flows to close blocks, support ASIC infrastructure, automate PD flows,
improve CAD infrastructure
Collaborate with RTL Designers and provide Physical Design feedback to improve PPA
Drive dashboards that show the convergence of projects related to PD
Optimize tool flows, working with EDA vendors to incorporate the latest features
Accountable for block level closure
Supervise the outsourcing of physical design to a 3rd party service
You may be a good fit if you have
5-10+ years of previous experience with PD
Tools, flow, and design methodology from RTL synthesis to GDSII sign-off
Experience with back-end design and timing closure on advanced process nodes (5nm
and below)
Experience with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler)
automated RTL-to-GDSII flows
Experience with sign-off tools (PrimeTime, Tempus, Voltus, etc.)
Experience with UPF-based low power design methodology, power verification,synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS,
routing, IR drop, and EM/antenna analysis
Deeply creative and able to think from first principles
Strong candidates may also have experience with
Familiarity with modern ML and LLM model architectures
Ability to program with Python or another scripting language
Familiarity with AI tools for programming/coding
Startup experience or comfort working in fast-paced environments
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different:
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched is looking for exceptional Physical Design engineers to join our team. In this role, you\nwill own block-level implementation and verification, drive timing closure and PPA optimization, supervise 3rd party design work, and help improve our design flows and iteration speed.\n\n\nKey Responsibilities\n\n - Deeply understand what is involved in physical design\n\n - Running PD flows to close blocks, support ASIC infrastructure, automate PD flows,\n improve CAD infrastructure\n\n - Collaborate with RTL Designers and provide Physical Design feedback to improve PPA\n\n - Drive dashboards that show the convergence of projects related to PD\n\n - Optimize tool flows, working with EDA vendors to incorporate the latest features\n\n - Accountable for block level closure\n\n - Supervise the outsourcing of physical design to a 3rd party service\n\n\n\nYou may be a good fit if you have\n\n - 5-10+ years of previous experience with PD\n\n - Tools, flow, and design methodology from RTL synthesis to GDSII sign-off\n\n - Experience with back-end design and timing closure on advanced process nodes (5nm\n and below)\n\n - Experience with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler)\n automated RTL-to-GDSII flows\n\n - Experience with sign-off tools (PrimeTime, Tempus, Voltus, etc.)\n\n - Experience with UPF-based low power design methodology, power verification,synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS,\n routing, IR drop, and EM/antenna analysis\n\n - Deeply creative and able to think from first principles\n\n\n\nStrong candidates may also have experience with\n\n - Familiarity with modern ML and LLM model architectures\n\n - Ability to program with Python or another scripting language\n\n - Familiarity with AI tools for programming/coding\n\n - Startup experience or comfort working in fast-paced environments\n\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n \n \n\nHow we’re different:\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"ed7a1d2e-df45-4d35-8965-e989fbbc2ce9","title":"PCB Layout Engineer","department":"Platform","team":"Platform","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2025-06-11T05:20:14.801+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/ed7a1d2e-df45-4d35-8965-e989fbbc2ce9","applyUrl":"https://jobs.ashbyhq.com/etched/ed7a1d2e-df45-4d35-8965-e989fbbc2ce9/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We’re seeking a skilled PCB Layout Engineer to join our dynamic team and contribute to our high-performance data center products. As a PCB Layout Engineer at Etched, you will play a crucial role in designing and optimizing printed circuit boards (PCBs) using Cadence Allegro PCB design tools. Your primary focus will be on high-speed signaling, including 100G applications, power distribution, large BGA ball-map breakouts and complex HDI PCB stack-ups for high-performance data center products. Your expertise will ensure that our products meet the highest standards of performance, reliability, and efficiency.
Key Responsibilities
Lead the design and optimization of high-speed PCB layouts using Cadence Allegro, tailored for 100G signaling. Implement strategies for impedance matching, trace routing, and crosstalk mitigation, resulting in robust designs that meet the stringent performance demands of modern data centers.
Develop and implement power distribution networks for cutting-edge data center hardware. Design power planes, decoupling strategies, and thermal management solutions to support high-performance systems, ensuring reliability and efficiency under heavy operational loads.
Manage the design of complex High-Density Interconnect (HDI) PCB stack-ups for multi-layer boards. Integrate blind/buried vias and microvias to meet the advanced technological requirements of data center systems, enhancing signal integrity and achieving compact form factors.
Collaborate with electrical and mechanical engineering teams to integrate PCB designs within the overall system architecture. Provide key input during design reviews to optimize performance, ensure manufacturability, and align with system-level objectives in a data center environment.
You maybe a good fit if you
Have a Bachelor’s degree in Electrical Engineering, Electronics Engineering, or a related field. Advanced degrees or certifications are a plus.
Are equipped with 10 years of experience in PCB layout design with a focus on high-speed signaling, power distribution, and HDI stack-ups, ideally for high-performance data center products.
Demonstrate proficiency in Cadence Allegro PCB design tools
Command in-depth knowledge of high-speed digital design principles, including signal integrity and impedance control.
Have Experience with complex HDI PCB design and manufacturing processes.
Understand power distribution network design and thermal management techniques, particularly for data center applications.
Are excellent at problem-solving skills and attention to detail.
We encourage you to apply even if you do not believe you meet every single qualification.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different:
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe’re seeking a skilled PCB Layout Engineer to join our dynamic team and contribute to our high-performance data center products. As a PCB Layout Engineer at Etched, you will play a crucial role in designing and optimizing printed circuit boards (PCBs) using Cadence Allegro PCB design tools. Your primary focus will be on high-speed signaling, including 100G applications, power distribution, large BGA ball-map breakouts and complex HDI PCB stack-ups for high-performance data center products. Your expertise will ensure that our products meet the highest standards of performance, reliability, and efficiency.\n\n\n\nKey Responsibilities\n\n - Lead the design and optimization of high-speed PCB layouts using Cadence Allegro, tailored for 100G signaling. Implement strategies for impedance matching, trace routing, and crosstalk mitigation, resulting in robust designs that meet the stringent performance demands of modern data centers.\n\n - Develop and implement power distribution networks for cutting-edge data center hardware. Design power planes, decoupling strategies, and thermal management solutions to support high-performance systems, ensuring reliability and efficiency under heavy operational loads.\n\n - Manage the design of complex High-Density Interconnect (HDI) PCB stack-ups for multi-layer boards. Integrate blind/buried vias and microvias to meet the advanced technological requirements of data center systems, enhancing signal integrity and achieving compact form factors.\n\n - Collaborate with electrical and mechanical engineering teams to integrate PCB designs within the overall system architecture. Provide key input during design reviews to optimize performance, ensure manufacturability, and align with system-level objectives in a data center environment.\n\n\n\nYou maybe a good fit if you\n\n - Have a Bachelor’s degree in Electrical Engineering, Electronics Engineering, or a related field. Advanced degrees or certifications are a plus.\n\n - Are equipped with 10 years of experience in PCB layout design with a focus on high-speed signaling, power distribution, and HDI stack-ups, ideally for high-performance data center products.\n\n - Demonstrate proficiency in Cadence Allegro PCB design tools\n\n - Command in-depth knowledge of high-speed digital design principles, including signal integrity and impedance control.\n\n - Have Experience with complex HDI PCB design and manufacturing processes.\n\n - Understand power distribution network design and thermal management techniques, particularly for data center applications.\n\n - Are excellent at problem-solving skills and attention to detail.\n\nWe encourage you to apply even if you do not believe you meet every single qualification.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\n How we’re different:\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"61860739-5aa9-4f64-920d-f4c1cca71af8","title":"Electrical Engineer, Hardware Systems","department":"Platform","team":"Platform","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-03-17T21:03:12.427+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/61860739-5aa9-4f64-920d-f4c1cca71af8","applyUrl":"https://jobs.ashbyhq.com/etched/61860739-5aa9-4f64-920d-f4c1cca71af8/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Key Responsibilities
Lead schematic design of the mezzanine card and base board for Etched’s accelerator systems
Work with Signal Integrity, PCB, and Mechanical Engineering to solve system level design problems
Collaborate with ODMs/OEMs on system requirements, including bringup and validation plans
Understand datacenter customer requirements and ensure our servers meet them
Bring up of system base board and mezzanine card
Create and manage PCBA documentation including BOMs and special assembly processes
Define test plans and test equipment for bring-up and manufacturing
You may be a good fit if you have (Must-have qualifications)
5-10 years of experience in complex server/switch system design and development
Extensive experience on 100G Ethernet, PCIe Gen5, I2C, SPI, UART interfaces
Familiar with modern AI/datacenter system architecture
Proven track record of designing systems alongside silicon
Deep understanding of datacenter needs, especially with respect to high power (>10 kW) AI servers
Passionate about modern AIs like ChatGPT, and willing to learn about them on the job
We encourage you to apply even if you do not believe you meet every single qualification.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
Compensation Range
$150,000 - $275,000
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nKey Responsibilities\n\n - Lead schematic design of the mezzanine card and base board for Etched’s accelerator systems\n\n - Work with Signal Integrity, PCB, and Mechanical Engineering to solve system level design problems\n\n - Collaborate with ODMs/OEMs on system requirements, including bringup and validation plans\n\n - Understand datacenter customer requirements and ensure our servers meet them\n\n - Bring up of system base board and mezzanine card\n\n - Create and manage PCBA documentation including BOMs and special assembly processes\n\n - Define test plans and test equipment for bring-up and manufacturing\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - 5-10 years of experience in complex server/switch system design and development\n\n - Extensive experience on 100G Ethernet, PCIe Gen5, I2C, SPI, UART interfaces\n\n - Familiar with modern AI/datacenter system architecture\n\n - Proven track record of designing systems alongside silicon\n\n - Deep understanding of datacenter needs, especially with respect to high power (>10 kW) AI servers\n\n - Passionate about modern AIs like ChatGPT, and willing to learn about them on the job\n\nWe encourage you to apply even if you do not believe you meet every single qualification.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nCompensation Range\n\n - $150,000 - $275,000 \n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"ccf2ae62-5490-4a59-87e8-8761f573b22a","title":"Hardware Validation Engineer","department":"Platform","team":"Platform","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-02-03T00:57:02.739+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/ccf2ae62-5490-4a59-87e8-8761f573b22a","applyUrl":"https://jobs.ashbyhq.com/etched/ccf2ae62-5490-4a59-87e8-8761f573b22a/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking an experienced and motivated Hardware Validation Engineer to validate system hardware and printed circuit board (PCB) functionality and ensure robust power and signal margins across all interfaces. In this role, you will collect and analyze lab data to validate hardware performance, support post-silicon characterization, and ensure reliable operation across multiple subsystems, including PCIe and I2C.
Key Responsibilities
Perform system hardware and PCB functional verification to ensure all features meet design specifications, including validation of power and signal integrity margins
Collect and analyze lab data to verify power delivery, signal integrity, and overall system robustness
Support post-silicon validation by identifying key performance metrics and conducting PVT, power, and thermal characterization
Evaluate PCIe performance, including signal integrity, eye opening measurements (EOM), and bit error rate (BER), to ensure adequate operating margins
Identify hardware issues, perform root cause analysis, and drive issues to resolution in collaboration with cross-functional teams
Design and execute DOE experiments to debug hardware issues and optimize system performance
Validate power sequencing, microcontroller functionality, and conduct power efficiency, noise, and transient analysis
Perform detailed characterization of I2C bus systems to ensure compliance with design requirements
Track and document PCB issues and validation results, ensuring clear communication with relevant stakeholders
Collaborate closely with design, firmware, and system engineering teams to ensure end-to-end hardware quality
You may be a good fit if you have
A Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
Proven experience with hardware validation, lab testing, and PCB-level debugging
Strong understanding of power integrity and signal integrity principles and measurement techniques
Familiarity with PCIe, I2C, and other common hardware interfaces and protocols
Experience using lab equipment such as oscilloscopes, logic analyzers, spectrum analyzers, and power supplies
Hands-on experience debugging hardware issues and performing root cause analysis
Knowledge of power sequencing and microcontroller-based systems
Strong analytical and problem-solving skills, including experience with scripting languages such as Python or Matlab
Excellent communication skills and the ability to work effectively in cross-functional teams
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\nWe are seeking an experienced and motivated Hardware Validation Engineer to validate system hardware and printed circuit board (PCB) functionality and ensure robust power and signal margins across all interfaces. In this role, you will collect and analyze lab data to validate hardware performance, support post-silicon characterization, and ensure reliable operation across multiple subsystems, including PCIe and I2C.\n\n\n\nKey Responsibilities\n\n - Perform system hardware and PCB functional verification to ensure all features meet design specifications, including validation of power and signal integrity margins\n\n - Collect and analyze lab data to verify power delivery, signal integrity, and overall system robustness\n\n - Support post-silicon validation by identifying key performance metrics and conducting PVT, power, and thermal characterization\n\n - Evaluate PCIe performance, including signal integrity, eye opening measurements (EOM), and bit error rate (BER), to ensure adequate operating margins\n\n - Identify hardware issues, perform root cause analysis, and drive issues to resolution in collaboration with cross-functional teams\n\n - Design and execute DOE experiments to debug hardware issues and optimize system performance\n\n - Validate power sequencing, microcontroller functionality, and conduct power efficiency, noise, and transient analysis\n\n - Perform detailed characterization of I2C bus systems to ensure compliance with design requirements\n\n - Track and document PCB issues and validation results, ensuring clear communication with relevant stakeholders\n\n - Collaborate closely with design, firmware, and system engineering teams to ensure end-to-end hardware quality\n\n\n\nYou may be a good fit if you have\n\n - A Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field\n\n - Proven experience with hardware validation, lab testing, and PCB-level debugging\n\n - Strong understanding of power integrity and signal integrity principles and measurement techniques\n\n - Familiarity with PCIe, I2C, and other common hardware interfaces and protocols\n\n - Experience using lab equipment such as oscilloscopes, logic analyzers, spectrum analyzers, and power supplies\n\n - Hands-on experience debugging hardware issues and performing root cause analysis\n\n - Knowledge of power sequencing and microcontroller-based systems\n\n - Strong analytical and problem-solving skills, including experience with scripting languages such as Python or Matlab\n\n - Excellent communication skills and the ability to work effectively in cross-functional teams\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.\n\n "},{"id":"610c3836-9798-46ea-931a-02bb95b29467","title":"MTS, Inference Performance Visibility","department":"Architecture","team":"Architecture","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-01-18T19:16:32.593+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/610c3836-9798-46ea-931a-02bb95b29467","applyUrl":"https://jobs.ashbyhq.com/etched/610c3836-9798-46ea-931a-02bb95b29467/application","descriptionHtml":"
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Join our team and take the lead in illuminating the performance landscape of our cutting-edge ML accelerator. We are seeking a highly skilled engineer to design and develop a sophisticated performance analysis tool, tailored specifically for our hardware. You will be instrumental in creating the essential tooling that enables our ML engineers and customers to understand workload behavior, identify performance bottlenecks, and unlock the full potential of our hardware, accelerating the most demanding ML applications in the world. This is a unique opportunity to shape performance analysis for novel hardware from the ground up.
Key responsibilities
Lead the design and architecture of a comprehensive performance analysis suite, including data collection mechanisms, data processing pipelines, analysis engines, and user interfaces (CLI and/or GUI).
Develop robust methods to capture performance data directly from our custom ML accelerator hardware (e.g., hardware performance counters, execution unit status, memory access patterns) via driver interfaces or other mechanisms.
Implement tracing for host-side API calls (runtime libraries, driver interactions) and system-level events (CPU activity, PCIe traffic, memory usage, network contention) related to our workloads.
Design and implement techniques to accurately correlate performance events across the host CPU, device driver, PCIe bus, multiple accelerators, and multiple hosts, ensuring precise time synchronization.
Build analysis modules to automatically interpret collected trace and counter data, identifying key performance limiters (e.g., compute-bound, memory bandwidth-bound, latency-bound, PCIe-bound, specific hardware bottlenecks).
Develop intuitive visualizations (timelines, dependency graphs, resource utilization charts, statistical summaries) to clearly communicate performance characteristics and bottlenecks to users.
Work closely with hardware architects, firmware engineers, driver developers, compiler engineers, and ML application engineers to understand their needs, define tool requirements, and provide expert guidance on performance analysis and optimization using the tool.
Representative projects
Architect and implement the core data collection framework for hardware performance counters on a custom PCIe-based accelerator.
Develop a kernel driver module or user-space service for low-overhead tracing of accelerator activity.
Design and build a correlated timeline view visualizing CPU API calls, driver submissions, PCIe transfers, and accelerator execution units.
Create an analysis pass to detect and quantify memory access inefficiencies or PCIe bandwidth saturation while transacting on a PCIe-attached accelerator.
You may be a good fit if you have
Strong proficiency in C++ or Rust
Proficiency in Python is a plus
Deep understanding of computer architecture (CPU, GPU, accelerators), memory hierarchies (caches, DRAM), and interconnects (especially PCIe).
Proven experience in low-level performance analysis, profiling, and bottleneck identification on complex hardware systems (GPUs, CPUs, FPGAs, or custom accelerators).
Experience with performance analysis tools (e.g., NVIDIA Nsight, AMD uProf, Intel VTune, perf, Tracy, ETW).
Experience working close to hardware, potentially reading performance counters or interacting directly with device drivers.
Strong candidates may also have experience with (Nice-to-have qualifications)
Direct experience developing performance analysis or debugging tools.
Experience with ML accelerator architectures (GPUs, TPUs, etc.).
Experience with kernel-mode driver development (Linux or Windows).
Understanding of compiler internals, code generation, and optimization.
In-depth knowledge of the PCIe protocol and analysis tools (PCIe analyzers).
Experience with multi-chip or multi-host accelerator systems (e.g., TPU pods, or NVidia DGX clusters)
Experience with firmware or embedded systems development.
Experience with hardware description languages (Verilog, VHDL) or hardware verification.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nJoin our team and take the lead in illuminating the performance landscape of our cutting-edge ML accelerator. We are seeking a highly skilled engineer to design and develop a sophisticated performance analysis tool, tailored specifically for our hardware. You will be instrumental in creating the essential tooling that enables our ML engineers and customers to understand workload behavior, identify performance bottlenecks, and unlock the full potential of our hardware, accelerating the most demanding ML applications in the world. This is a unique opportunity to shape performance analysis for novel hardware from the ground up.\n\n\n\nKey responsibilities\n\n - Lead the design and architecture of a comprehensive performance analysis suite, including data collection mechanisms, data processing pipelines, analysis engines, and user interfaces (CLI and/or GUI).\n\n - Develop robust methods to capture performance data directly from our custom ML accelerator hardware (e.g., hardware performance counters, execution unit status, memory access patterns) via driver interfaces or other mechanisms.\n\n - Implement tracing for host-side API calls (runtime libraries, driver interactions) and system-level events (CPU activity, PCIe traffic, memory usage, network contention) related to our workloads.\n\n - Design and implement techniques to accurately correlate performance events across the host CPU, device driver, PCIe bus, multiple accelerators, and multiple hosts, ensuring precise time synchronization.\n\n - Build analysis modules to automatically interpret collected trace and counter data, identifying key performance limiters (e.g., compute-bound, memory bandwidth-bound, latency-bound, PCIe-bound, specific hardware bottlenecks).\n\n - Develop intuitive visualizations (timelines, dependency graphs, resource utilization charts, statistical summaries) to clearly communicate performance characteristics and bottlenecks to users.\n\n - Work closely with hardware architects, firmware engineers, driver developers, compiler engineers, and ML application engineers to understand their needs, define tool requirements, and provide expert guidance on performance analysis and optimization using the tool.\n\n\n\nRepresentative projects\n\n - Architect and implement the core data collection framework for hardware performance counters on a custom PCIe-based accelerator.\n\n - Develop a kernel driver module or user-space service for low-overhead tracing of accelerator activity.\n\n - Design and build a correlated timeline view visualizing CPU API calls, driver submissions, PCIe transfers, and accelerator execution units.\n\n - Create an analysis pass to detect and quantify memory access inefficiencies or PCIe bandwidth saturation while transacting on a PCIe-attached accelerator.\n\n\n\nYou may be a good fit if you have\n\n - Strong proficiency in C++ or Rust\n\n - Proficiency in Python is a plus\n\n - Deep understanding of computer architecture (CPU, GPU, accelerators), memory hierarchies (caches, DRAM), and interconnects (especially PCIe).\n\n - Proven experience in low-level performance analysis, profiling, and bottleneck identification on complex hardware systems (GPUs, CPUs, FPGAs, or custom accelerators).\n\n - Experience with performance analysis tools (e.g., NVIDIA Nsight, AMD uProf, Intel VTune, perf, Tracy, ETW).\n\n - Experience working close to hardware, potentially reading performance counters or interacting directly with device drivers.\n \n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Direct experience developing performance analysis or debugging tools.\n\n - Experience with ML accelerator architectures (GPUs, TPUs, etc.).\n\n - Experience with kernel-mode driver development (Linux or Windows).\n\n - Understanding of compiler internals, code generation, and optimization.\n\n - In-depth knowledge of the PCIe protocol and analysis tools (PCIe analyzers).\n\n - Experience with multi-chip or multi-host accelerator systems (e.g., TPU pods, or NVidia DGX clusters)\n\n - Experience with firmware or embedded systems development.\n\n - Experience with hardware description languages (Verilog, VHDL) or hardware verification.\n \n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"c3ca158a-015d-413d-bd14-5470e546ed15","title":"RTL Design Engineer ","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2025-06-11T05:18:50.678+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/c3ca158a-015d-413d-bd14-5470e546ed15","applyUrl":"https://jobs.ashbyhq.com/etched/c3ca158a-015d-413d-bd14-5470e546ed15/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As an RTL Engineer at Etched, you will be critical in ensuring that our AI chips operate correctly and efficiently. You will develop and implement design verification strategies for both our existing and upcoming ASIC designs.
In this role, you will work closely with state-of-the-art architectures for machine learning. You do not need to have experience working with these yet, but you will be willing and able to learn quickly. You will work in a fast-paced environment with a high degree of autonomy, and be responsible for a key part of Etched’s success.
Representative projects
Implement a block to efficiently compute floating point math operators
Provide feedback to the uArch team to make sure blocks meet timing and area constraints
You may be a good fit if you
At least 5 years of work experience in RTL development.
Experience with high-speed digital logic.
Proficiency in standard RTL design and synthesis tools
Familiarity with verification work and writing test benches
Are able to learn quickly about transformers and other aspects of modern artificial intelligence
Willing to start quickly
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience with PCIe, Ethernet, or HBM technologies
Familiarity with modern ML and LLM model architectures.
Familiarity with numerical representations and functions
Ability to program with Python or another scripting language
We encourage you to apply even if you do not believe you meet every single qualification.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different:
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nAs an RTL Engineer at Etched, you will be critical in ensuring that our AI chips operate correctly and efficiently. You will develop and implement design verification strategies for both our existing and upcoming ASIC designs.\n\nIn this role, you will work closely with state-of-the-art architectures for machine learning. You do not need to have experience working with these yet, but you will be willing and able to learn quickly. You will work in a fast-paced environment with a high degree of autonomy, and be responsible for a key part of Etched’s success.\n\n\n\nRepresentative projects\n\n - Implement a block to efficiently compute floating point math operators\n\n - Provide feedback to the uArch team to make sure blocks meet timing and area constraints\n\n\n\nYou may be a good fit if you\n\n - At least 5 years of work experience in RTL development.\n\n - Experience with high-speed digital logic.\n\n - Proficiency in standard RTL design and synthesis tools\n\n - Familiarity with verification work and writing test benches\n\n - Are able to learn quickly about transformers and other aspects of modern artificial intelligence\n\n - Willing to start quickly\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Experience with PCIe, Ethernet, or HBM technologies\n\n - Familiarity with modern ML and LLM model architectures.\n\n - Familiarity with numerical representations and functions\n\n - Ability to program with Python or another scripting language\n\nWe encourage you to apply even if you do not believe you meet every single qualification.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different:\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"9c58d97b-4825-466b-895a-478a89d7a3c7","title":"Technical Recruiter","department":"People","team":"People","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2025-07-12T01:15:03.051+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/9c58d97b-4825-466b-895a-478a89d7a3c7","applyUrl":"https://jobs.ashbyhq.com/etched/9c58d97b-4825-466b-895a-478a89d7a3c7/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As we scale, we’re looking for a Technical Recruiter to build and own some of the most high-leverage, relationship-driven parts of our recruiting function. This role is ideal for someone who thrives in fast-paced, high-talent-density environments and loves the hunt.
What You’ll Do
Own the full-cycle recruiting process, from sourcing through offer, ensuring top-of-funnel quality and fast, high-signal decision-making
Build strong partnerships with hiring managers and advocate for both candidates and company needs
Source candidates in unconventional places - e.g., GitHub repos, preprint authors on arXiv, contributors to Apache mailing lists, or insightful Twitter threads
Facilitate structured interview loops, track candidate performance, and lead debriefs alongside hiring managers and leadership
Manage offers and close processes in collaboration with hiring managers and the CEO
Continuously improve our recruiting systems, workflows, and candidate experience
You may be a good fit if you have
Have 5+ years of experience recruiting technical talent in highly competitive markets
Can evaluate both technical depth and cultural fit with nuance and clarity
Are resourceful in finding exceptional candidates beyond the obvious platforms
Thrive in ambiguity and enjoy building systems from scratch
Care deeply about candidate experience and operational excellence
Strong candidates may also have experience with (Nice-to-have qualifications)
Familiarity with the AI, semiconductor, or hardware engineering talent landscape
A track record of hiring exceptional engineers in niche or emerging fields
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nAs we scale, we’re looking for a Technical Recruiter to build and own some of the most high-leverage, relationship-driven parts of our recruiting function. This role is ideal for someone who thrives in fast-paced, high-talent-density environments and loves the hunt.\n\n\n\nWhat You’ll Do\n\n - Own the full-cycle recruiting process, from sourcing through offer, ensuring top-of-funnel quality and fast, high-signal decision-making\n\n - Build strong partnerships with hiring managers and advocate for both candidates and company needs\n\n - Source candidates in unconventional places - e.g., GitHub repos, preprint authors on arXiv, contributors to Apache mailing lists, or insightful Twitter threads\n\n - Facilitate structured interview loops, track candidate performance, and lead debriefs alongside hiring managers and leadership\n\n - Manage offers and close processes in collaboration with hiring managers and the CEO\n\n - Continuously improve our recruiting systems, workflows, and candidate experience\n\n\n\nYou may be a good fit if you have\n\n - Have 5+ years of experience recruiting technical talent in highly competitive markets\n\n - Can evaluate both technical depth and cultural fit with nuance and clarity\n\n - Are resourceful in finding exceptional candidates beyond the obvious platforms\n\n - Thrive in ambiguity and enjoy building systems from scratch\n\n - Care deeply about candidate experience and operational excellence\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Familiarity with the AI, semiconductor, or hardware engineering talent landscape\n\n - A track record of hiring exceptional engineers in niche or emerging fields\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n \n \n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"283c88a9-0031-4232-a5b3-1103c2af4100","title":"Kernel Driver Software Engineer","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-01-14T01:19:01.346+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/283c88a9-0031-4232-a5b3-1103c2af4100","applyUrl":"https://jobs.ashbyhq.com/etched/283c88a9-0031-4232-a5b3-1103c2af4100/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Key Responsibilities
Design, develop, and maintain kernel-mode drivers ensuring high reliability, informative debug, and optimal performance.
Analyze and optimize driver performance for demanding AI workloads, focusing on minimizing latency and maximizing throughput.
Collaborate closely with hardware engineers throughout the ASIC design process..
Implement driver support for device virtualization technologies, including SR-IOV, VFIO, and para-virtualization.
Implement efficient memory management strategies considering kernel memory mapping, page tables configuration, NUMA awareness for device data caching, and IOMMU configuration.
Build kernel drivers fundamentally designed to support and maintain security across host processes, physical memory spaces, and device attestation.
Diagnose and resolve complex driver-related issues, using common kernel debugging tools and techniques (ftrace, dmesg, etc.) to identify and fix bugs.
Design and implement synchronization mechanisms to handle concurrent access to multiple accelerators.
Develop and execute comprehensive test plans to validate driver functionality, stability, and performance in manufacturing and in general production environments.
Collaborate with software and hardware teams to diagnose and resolve complex system-level issues.
Representative Projects
Develop and optimize kernel-mode drivers for new ML accelerators.
Implement and optimize memory management, including kernel memory mapping and IOMMU configurations, for high-bandwidth data transfers.
Debug and resolve complex driver-related issues impacting ML workload performance.
Develop performance benchmarks and profiling tools to analyze driver performance.
Integrate driver support for advanced features like hardware virtualization and security, including SR-IOV and VFIO.
Optimizing PCIe communication between the host and PCIe devices, using advanced equipment like PCIe analyzers.
Implement and debug power management features for PCIe devices.
Integrating ML accelerators into containerized and virtualized environments.
Implementing and optimizing para-virtualization techniques for PCIe devices.
Configure and optimize page tables for efficient memory access from the ML accelerator.
Participate in hardware-software co-design reviews across teams to optimize performance and power efficiency.
You may be a good fit if you have
Proficiency in C/C++.
Strong understanding of kernel-mode driver development and debugging.
Deep understanding of operating system internals (Linux preferred).
Experience with hardware/software interfacing and device drivers.
Experience with memory management and synchronization in kernel environments.
Strong understanding of PCIe and other hardware interfaces.
Experience with device virtualization technologies, including SR-IOV and VFIO.
Strong understanding of kernel memory mapping, page table configuration, and IOMMU.
Familiarity with hardware-software co-design principles.
Proven ability to analyze complex technical problems and provide effective solutions.
Excellent communication and collaboration 1 skills.
Experience with version control systems (e.g., Git).
Experience with debugging tools (e.g., gdb, kgdb).
Strong candidates may also have experience with (Nice-to-have qualifications)
Candidates with experience in developing and debugging kernel-mode drivers for GPU or other accelerator devices.
Candidates with a strong understanding of hardware/software interactions.
Candidates with experience in optimizing driver performance for demanding workloads.
Candidates with experience in ML workloads.
Candidates who have debugged complex hardware and software interactions, especially in virtualized environments.
Candidates with experience in implementing and optimizing SR-IOV and VFIO.
Candidates with in-depth knowledge of kernel memory mapping, page tables, and IOMMU.
Candidates with experience in hardware-software co-design projects.
Experience with GPU driver development.
Experience with CUDA, OpenCL, or other GPU programming models.
Experience with performance profiling and benchmarking tools (perf, VTune).
Knowledge of hardware virtualization techniques, including para-virtualization.
Experience with CI/CD pipelines.
Experience with Rust.
Experience with ML frameworks like Tensorflow or Pytorch.
Experience with data center orchestration technologies (Kubernetes, Docker).
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nKey Responsibilities\n\n - Design, develop, and maintain kernel-mode drivers ensuring high reliability, informative debug, and optimal performance.\n\n - Analyze and optimize driver performance for demanding AI workloads, focusing on minimizing latency and maximizing throughput.\n\n - Collaborate closely with hardware engineers throughout the ASIC design process..\n\n - Implement driver support for device virtualization technologies, including SR-IOV, VFIO, and para-virtualization.\n\n - Implement efficient memory management strategies considering kernel memory mapping, page tables configuration, NUMA awareness for device data caching, and IOMMU configuration.\n\n - Build kernel drivers fundamentally designed to support and maintain security across host processes, physical memory spaces, and device attestation. \n\n - Diagnose and resolve complex driver-related issues, using common kernel debugging tools and techniques (ftrace, dmesg, etc.) to identify and fix bugs.\n\n - Design and implement synchronization mechanisms to handle concurrent access to multiple accelerators.\n\n - Develop and execute comprehensive test plans to validate driver functionality, stability, and performance in manufacturing and in general production environments.\n\n - Collaborate with software and hardware teams to diagnose and resolve complex system-level issues.\n\n\n\nRepresentative Projects\n\n - Develop and optimize kernel-mode drivers for new ML accelerators.\n\n - Implement and optimize memory management, including kernel memory mapping and IOMMU configurations, for high-bandwidth data transfers.\n\n - Debug and resolve complex driver-related issues impacting ML workload performance.\n\n - Develop performance benchmarks and profiling tools to analyze driver performance.\n\n - Integrate driver support for advanced features like hardware virtualization and security, including SR-IOV and VFIO.\n\n - Optimizing PCIe communication between the host and PCIe devices, using advanced equipment like PCIe analyzers.\n\n - Implement and debug power management features for PCIe devices.\n\n - Integrating ML accelerators into containerized and virtualized environments.\n\n - Implementing and optimizing para-virtualization techniques for PCIe devices.\n\n - Configure and optimize page tables for efficient memory access from the ML accelerator.\n\n - Participate in hardware-software co-design reviews across teams to optimize performance and power efficiency.\n\n\n\nYou may be a good fit if you have\n\n - Proficiency in C/C++.\n\n - Strong understanding of kernel-mode driver development and debugging.\n\n - Deep understanding of operating system internals (Linux preferred).\n\n - Experience with hardware/software interfacing and device drivers.\n\n - Experience with memory management and synchronization in kernel environments.\n\n - Strong understanding of PCIe and other hardware interfaces.\n\n - Experience with device virtualization technologies, including SR-IOV and VFIO.\n\n - Strong understanding of kernel memory mapping, page table configuration, and IOMMU.\n\n - Familiarity with hardware-software co-design principles.\n\n - Proven ability to analyze complex technical problems and provide effective solutions.\n\n - Excellent communication and collaboration 1 skills. \n\n - Experience with version control systems (e.g., Git).\n\n - Experience with debugging tools (e.g., gdb, kgdb).\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Candidates with experience in developing and debugging kernel-mode drivers for GPU or other accelerator devices.\n\n - Candidates with a strong understanding of hardware/software interactions.\n\n - Candidates with experience in optimizing driver performance for demanding workloads.\n\n - Candidates with experience in ML workloads.\n\n - Candidates who have debugged complex hardware and software interactions, especially in virtualized environments.\n\n - Candidates with experience in implementing and optimizing SR-IOV and VFIO.\n\n - Candidates with in-depth knowledge of kernel memory mapping, page tables, and IOMMU.\n\n - Candidates with experience in hardware-software co-design projects.\n\n - Experience with GPU driver development.\n\n - Experience with CUDA, OpenCL, or other GPU programming models.\n\n - Experience with performance profiling and benchmarking tools (perf, VTune).\n\n - Knowledge of hardware virtualization techniques, including para-virtualization.\n\n - Experience with CI/CD pipelines.\n\n - Experience with Rust.\n\n - Experience with ML frameworks like Tensorflow or Pytorch.\n\n - Experience with data center orchestration technologies (Kubernetes, Docker).\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n \n \n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"5726311f-4db2-4c95-8628-d9c8f0f9639d","title":"Supercomputing Engineer, Fleet Software","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2025-06-18T01:01:23.736+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/5726311f-4db2-4c95-8628-d9c8f0f9639d","applyUrl":"https://jobs.ashbyhq.com/etched/5726311f-4db2-4c95-8628-d9c8f0f9639d/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Fleet Software enables deployments at scale through configuration management, safe software and firmware rollouts, and software recovery, while partnering with other engineering teams to drive product improvements as we ramp production at unprecedented speed. The team works closely with Node Systems, which builds the single-rack software, clients, and tuning recipes that Fleet deploys and manages across many racks.
The team also builds the monitoring and analysis systems that connect signals across the rack. Engineers and their agents use this data to investigate failures, spot patterns, and continually improve the performance and reliability of the inference fleet. We're looking for a hands-on engineer who has built infrastructure and owned it through real deployments in the field.
Key Responsibilities
Build the fleet management system that provisions, configures, updates, and recovers Etched-owned hardware across labs and customer deployments
Implement safe software and firmware rollouts, including validation, staged deployment, and handling of partial failures
Build telemetry and log pipelines that collect rack metrics and logs into a central store, including decisions on storage, retention, and query performance
Develop monitoring, alerting, and analysis tools that help engineers, their agents, and customers understand fleet behavior and investigate failures
Build secure, least-privilege access to BMCs and servers across lab, office, and data center networks
Give lab operators simple controls for managed hardware, such as draining and powering down for repair, and rolling out validated versions
Partner with Node Systems to define the interfaces, clients, and validated configurations needed to manage hardware across the fleet
Work with Customer Deployments, Infrastructure, Lab Operations, and Factory Testing, including support for customer environments, local monitoring, and customer telemetry ingress and analysis
Act as first-line triage for issues on Etched-owned systems, find root causes in the management system, and escalate to Infrastructure when needed
Turn lessons from deployments and incidents into engineering priorities, and help decide where to adopt existing tools versus building our own
You may be a good fit if you have
Experience building infrastructure software and owning it in production, including deployments, incidents, and the changes that followed
Background in fleet management, provisioning, configuration management, or observability for compute infrastructure or connected devices
Solid distributed systems and Linux fundamentals. You understand how systems behave under load, during upgrades, and when components fail
Hands-on experience with Kubernetes and container orchestration, including running it on bare metal
Experience with Slurm or similar HPC and GPU cluster schedulers and resource management
Experience with network boot and bare metal provisioning (PXE, HTTP boot, iPXE, DHCP/TFTP) to bring hosts up and re-image them at scale
Strong proficiency in at least one of Go, Python, Rust, or C/C++
Strong debugging skills using logs, metrics, and tracing
Strong communication skills and comfort collaborating across hardware, firmware, and software teams
Strong candidates may also have experience with (Nice-to-have qualifications)
Telemetry and log pipelines, including storage, retention, and query performance
Bare metal servers, accelerator clusters, HPC, robotics, or other hardware fleets
Firmware updates, hardware diagnostics, and automated recovery
BMC, Redfish, or IPMI
Software that runs in customer environments as well as internal infrastructure
Docker and container tooling
Familiarity with kernel, drivers, PCIe, or networking
Designing test harnesses and failure-injection frameworks
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\nJob Summary\n\nFleet Software enables deployments at scale through configuration management, safe software and firmware rollouts, and software recovery, while partnering with other engineering teams to drive product improvements as we ramp production at unprecedented speed. The team works closely with Node Systems, which builds the single-rack software, clients, and tuning recipes that Fleet deploys and manages across many racks.\n\nThe team also builds the monitoring and analysis systems that connect signals across the rack. Engineers and their agents use this data to investigate failures, spot patterns, and continually improve the performance and reliability of the inference fleet. We're looking for a hands-on engineer who has built infrastructure and owned it through real deployments in the field.\n\n\n\nKey Responsibilities\n\n - Build the fleet management system that provisions, configures, updates, and recovers Etched-owned hardware across labs and customer deployments\n\n - Implement safe software and firmware rollouts, including validation, staged deployment, and handling of partial failures\n\n - Build telemetry and log pipelines that collect rack metrics and logs into a central store, including decisions on storage, retention, and query performance\n\n - Develop monitoring, alerting, and analysis tools that help engineers, their agents, and customers understand fleet behavior and investigate failures\n\n - Build secure, least-privilege access to BMCs and servers across lab, office, and data center networks\n\n - Give lab operators simple controls for managed hardware, such as draining and powering down for repair, and rolling out validated versions\n\n - Partner with Node Systems to define the interfaces, clients, and validated configurations needed to manage hardware across the fleet\n\n - Work with Customer Deployments, Infrastructure, Lab Operations, and Factory Testing, including support for customer environments, local monitoring, and customer telemetry ingress and analysis\n\n - Act as first-line triage for issues on Etched-owned systems, find root causes in the management system, and escalate to Infrastructure when needed\n\n - Turn lessons from deployments and incidents into engineering priorities, and help decide where to adopt existing tools versus building our own\n \n\nYou may be a good fit if you have\n\n - Experience building infrastructure software and owning it in production, including deployments, incidents, and the changes that followed\n\n - Background in fleet management, provisioning, configuration management, or observability for compute infrastructure or connected devices\n\n - Solid distributed systems and Linux fundamentals. You understand how systems behave under load, during upgrades, and when components fail\n\n - Hands-on experience with Kubernetes and container orchestration, including running it on bare metal\n\n - Experience with Slurm or similar HPC and GPU cluster schedulers and resource management\n\n - Experience with network boot and bare metal provisioning (PXE, HTTP boot, iPXE, DHCP/TFTP) to bring hosts up and re-image them at scale\n\n - Strong proficiency in at least one of Go, Python, Rust, or C/C++\n\n - Strong debugging skills using logs, metrics, and tracing\n\n - Strong communication skills and comfort collaborating across hardware, firmware, and software teams\n \n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Telemetry and log pipelines, including storage, retention, and query performance\n\n - Bare metal servers, accelerator clusters, HPC, robotics, or other hardware fleets\n\n - Firmware updates, hardware diagnostics, and automated recovery\n\n - BMC, Redfish, or IPMI\n\n - Software that runs in customer environments as well as internal infrastructure\n\n - Docker and container tooling\n\n - Familiarity with kernel, drivers, PCIe, or networking\n\n - Designing test harnesses and failure-injection frameworks\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n"},{"id":"ca25e600-e2e8-4111-b672-ee3a830a8ecf","title":"DFT (Design For Test) Engineer","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-02-28T00:41:40.753+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/ca25e600-e2e8-4111-b672-ee3a830a8ecf","applyUrl":"https://jobs.ashbyhq.com/etched/ca25e600-e2e8-4111-b672-ee3a830a8ecf/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a highly skilled and motivated Design For Testability (DFT) Engineer to join our dynamic team. The ideal candidate will be responsible for ensuring the robust testability of integrated circuits (ICs) from the design phase through to production. This role is crucial in improving the efficiency and effectiveness of our testing processes, thereby enhancing overall product quality.
Key responsibilities
Develop and implement robust Design for Test (DFT) architectures for ASIC and SoC designs to enhance test coverage, debug capability, and fault isolation.
Integrate industry-standard DFT methodologies such as scan insertion, boundary scan, Built-In Self-Test (BIST), and Memory BIST (MBIST).
Collaborate cross-functionally with design and verification teams to ensure DFT requirements are addressed early and consistently throughout the design cycle.
Analyze test results and silicon debug data to provide design feedback and drive improvements in coverage, yield, and reliability.
Create and execute comprehensive DFT verification plans to validate the correct implementation and functionality of all DFT features.
Apply simulation-based and formal verification techniques to ensure high confidence in DFT logic correctness.
Conduct internal DFT audits and design reviews to proactively identify and resolve gaps in testability or coverage.
Support silicon bring-up, debug, and failure analysis during post-silicon validation to ensure successful product launch.
Partner with test engineering teams to develop and optimize Automated Test Equipment (ATE) programs for volume production.
Generate production-quality test patterns and ensure robust failure analysis capability in high-volume environments.
Collaborate with manufacturing and quality teams to implement data-driven test process improvements and monitor long-term product health.
Ensure test strategies are aligned with product milestones, manufacturing timelines, and quality/reliability targets.
Author and maintain detailed documentation for DFT architecture, test plans, procedures, and debug guides.
Share best practices through training sessions, onboarding, and mentorship to enhance DFT awareness across design and test teams.
Stay current with emerging DFT technologies, industry trends, and evolving standards to continually improve internal methodologies.
You may be a good fit if you have
10+ years of experience in DFT engineering with a track record of successful test implementations for ASIC or SoC products.
A deep understanding of digital design, verification methodologies, and DFT implementation practices.
Proficiency in System Verilog and fluency with industry-standard EDA tools (e.g., Synopsys DFT Compiler, Cadence Encounter Test, Mentor Tessent).
Scripting and automation experience using Python, Perl, or TCL to streamline DFT implementation and test processes.
Track record of leading DFT initiatives across multiple product generations in high-performance or high-volume silicon environments.
Strong analytical and debugging skills, with the ability to work across teams to resolve complex testability issues.
Excellent communication and collaboration abilities, with a focus on clarity and cross-functional alignment.
A Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master’s preferred).
Strong candidates may also have experience with
Mixed-signal DFT methodologies and integration of analog testability into SoC workflows.
Industry standards such as IEEE 1149.1 (JTAG), IEEE 1500, and experience applying them in complex designs.
Yield analysis, product engineering, and contributions to test cost reduction and quality improvement programs.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a highly skilled and motivated Design For Testability (DFT) Engineer to join our dynamic team. The ideal candidate will be responsible for ensuring the robust testability of integrated circuits (ICs) from the design phase through to production. This role is crucial in improving the efficiency and effectiveness of our testing processes, thereby enhancing overall product quality.\n\n\n\nKey responsibilities\n\n - Develop and implement robust Design for Test (DFT) architectures for ASIC and SoC designs to enhance test coverage, debug capability, and fault isolation.\n\n - Integrate industry-standard DFT methodologies such as scan insertion, boundary scan, Built-In Self-Test (BIST), and Memory BIST (MBIST).\n\n - Collaborate cross-functionally with design and verification teams to ensure DFT requirements are addressed early and consistently throughout the design cycle.\n\n - Analyze test results and silicon debug data to provide design feedback and drive improvements in coverage, yield, and reliability.\n\n - Create and execute comprehensive DFT verification plans to validate the correct implementation and functionality of all DFT features.\n\n - Apply simulation-based and formal verification techniques to ensure high confidence in DFT logic correctness.\n\n - Conduct internal DFT audits and design reviews to proactively identify and resolve gaps in testability or coverage.\n\n - Support silicon bring-up, debug, and failure analysis during post-silicon validation to ensure successful product launch.\n\n - Partner with test engineering teams to develop and optimize Automated Test Equipment (ATE) programs for volume production.\n\n - Generate production-quality test patterns and ensure robust failure analysis capability in high-volume environments.\n\n - Collaborate with manufacturing and quality teams to implement data-driven test process improvements and monitor long-term product health.\n\n - Ensure test strategies are aligned with product milestones, manufacturing timelines, and quality/reliability targets.\n\n - Author and maintain detailed documentation for DFT architecture, test plans, procedures, and debug guides.\n\n - Share best practices through training sessions, onboarding, and mentorship to enhance DFT awareness across design and test teams.\n\n - Stay current with emerging DFT technologies, industry trends, and evolving standards to continually improve internal methodologies.\n\n\n\nYou may be a good fit if you have\n\n - 10+ years of experience in DFT engineering with a track record of successful test implementations for ASIC or SoC products.\n\n - A deep understanding of digital design, verification methodologies, and DFT implementation practices.\n\n - Proficiency in System Verilog and fluency with industry-standard EDA tools (e.g., Synopsys DFT Compiler, Cadence Encounter Test, Mentor Tessent).\n\n - Scripting and automation experience using Python, Perl, or TCL to streamline DFT implementation and test processes.\n\n - Track record of leading DFT initiatives across multiple product generations in high-performance or high-volume silicon environments.\n\n - Strong analytical and debugging skills, with the ability to work across teams to resolve complex testability issues.\n\n - Excellent communication and collaboration abilities, with a focus on clarity and cross-functional alignment.\n\n - A Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master’s preferred).\n\n\n\nStrong candidates may also have experience with \n\n - Mixed-signal DFT methodologies and integration of analog testability into SoC workflows.\n\n - Industry standards such as IEEE 1149.1 (JTAG), IEEE 1500, and experience applying them in complex designs.\n\n - Yield analysis, product engineering, and contributions to test cost reduction and quality improvement programs.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"3f83fd5f-5e50-403a-9a03-7ddb56502f49","title":"Developer Experience Engineer","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-02-19T19:59:13.460+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/3f83fd5f-5e50-403a-9a03-7ddb56502f49","applyUrl":"https://jobs.ashbyhq.com/etched/3f83fd5f-5e50-403a-9a03-7ddb56502f49/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are looking for a Developer Experience Engineer to enhance developer productivity, automation, and infrastructure across our hardware and software teams. You will work at the intersection of DevOps, software engineering, and high-performance computing (HPC), building systems that accelerate chip design, simulation, and AI model deployment in a cloud and on-prem hybrid environment.
Key responsibilities
Develop and maintain automation tools to streamline development, testing, and deployment workflows.
Optimize and manage Slurm-based job scheduling for AI workloads, simulation, and chip design workflows.
Build observability solutions using Grafana, Prometheus, and OpenTelemetry for monitoring pipelines, infrastructure, and compute clusters.
Manage and optimize containerized environments using Docker and Kubernetes to enhance scalability and reproducibility.
Enhance build, test, and deployment pipelines with CI/CD tools like GitHub Actions, Jenkins, Buildkite, or Bazel.
Develop caching and artifact management systems to reduce build times and improve dependency resolution.
Integrate and manage cloud resources (AWS, GCP) for scaling compute, storage, and hybrid workloads.
Support security and compliance efforts including secrets management and access control.
Document and share best practices for efficient developer tooling and workflows.
You may be a good fit if you have
Strong Python skills for automation, scripting, and infrastructure development.
Experience with Slurm job scheduling in an HPC or hybrid environment.
Hands-on experience with observability and monitoring tools like Prometheus, Grafana, and OpenTelemetry.
Expertise with Docker and Kubernetes, including Helm charts and cluster management.
Proficiency in modern CI/CD pipeline management with tools like GitHub Actions, Jenkins, or Buildkite.
Experience with infrastructure-as-code tools like Terraform or Ansible.
Knowledge of cloud infrastructure, compute, and storage optimization on AWS or GCP.
Strong candidates may also have experience with
Data pipelining for AI/ML workflows using Airflow, Prefect, or Dagster.
Build system expertise with Bazel, CMake, or distributed build systems.
Secrets management tools such as Vault, SOPS, AWS Secrets Manager, or GCP Secret Manager.
AI/ML model training workflows and monitoring GPU-accelerated workloads.
Exposure to FPGA or ASIC development environments and workflows.
Benefits
Full medical, dental, and vision packages, with generous premium coverage
Housing subsidy of $2,500/month for those living within walking distance of the office
Daily lunch and dinner in our office
Relocation support for those moving to West San Jose
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are looking for a Developer Experience Engineer to enhance developer productivity, automation, and infrastructure across our hardware and software teams. You will work at the intersection of DevOps, software engineering, and high-performance computing (HPC), building systems that accelerate chip design, simulation, and AI model deployment in a cloud and on-prem hybrid environment.\n\n\n\nKey responsibilities\n\n - Develop and maintain automation tools to streamline development, testing, and deployment workflows.\n\n - Optimize and manage Slurm-based job scheduling for AI workloads, simulation, and chip design workflows.\n\n - Build observability solutions using Grafana, Prometheus, and OpenTelemetry for monitoring pipelines, infrastructure, and compute clusters.\n\n - Manage and optimize containerized environments using Docker and Kubernetes to enhance scalability and reproducibility.\n\n - Enhance build, test, and deployment pipelines with CI/CD tools like GitHub Actions, Jenkins, Buildkite, or Bazel.\n\n - Develop caching and artifact management systems to reduce build times and improve dependency resolution.\n\n - Integrate and manage cloud resources (AWS, GCP) for scaling compute, storage, and hybrid workloads.\n\n - Support security and compliance efforts including secrets management and access control.\n\n - Document and share best practices for efficient developer tooling and workflows.\n\n\n\nYou may be a good fit if you have\n\n - Strong Python skills for automation, scripting, and infrastructure development.\n\n - Experience with Slurm job scheduling in an HPC or hybrid environment.\n\n - Hands-on experience with observability and monitoring tools like Prometheus, Grafana, and OpenTelemetry.\n\n - Expertise with Docker and Kubernetes, including Helm charts and cluster management.\n\n - Proficiency in modern CI/CD pipeline management with tools like GitHub Actions, Jenkins, or Buildkite.\n\n - Experience with infrastructure-as-code tools like Terraform or Ansible.\n\n - Knowledge of cloud infrastructure, compute, and storage optimization on AWS or GCP.\n\n\n\nStrong candidates may also have experience with\n\n - Data pipelining for AI/ML workflows using Airflow, Prefect, or Dagster.\n\n - Build system expertise with Bazel, CMake, or distributed build systems.\n\n - Secrets management tools such as Vault, SOPS, AWS Secrets Manager, or GCP Secret Manager.\n\n - AI/ML model training workflows and monitoring GPU-accelerated workloads.\n\n - Exposure to FPGA or ASIC development environments and workflows.\n\n\n\nBenefits\n\n - Full medical, dental, and vision packages, with generous premium coverage\n\n - Housing subsidy of $2,500/month for those living within walking distance of the office\n\n - Daily lunch and dinner in our office\n\n - Relocation support for those moving to West San Jose\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"0f9c0162-97c6-4be6-9cb7-d9afdcf0fa7c","title":"Inference Software Engineer","department":"Architecture","team":"Architecture","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2025-06-17T20:09:53.169+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/0f9c0162-97c6-4be6-9cb7-d9afdcf0fa7c","applyUrl":"https://jobs.ashbyhq.com/etched/0f9c0162-97c6-4be6-9cb7-d9afdcf0fa7c/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Key responsibilities
Support porting state-of-the-art models to our architecture. Help build programming abstractions and testing capabilities to rapidly iterate on model porting.
Build, enhance, and scale our runtime, including multi-node inference, intra-node execution, state management, and robust error handling.
Optimize routing and communication layers using our collectives.
Utilize performance profiling and debugging tools to identify bottlenecks and correctness issues.
You may be a good fit if you have
Proficiency in C++ or Rust.
Understanding of performance-sensitive or complex distributed software systems like Linux internals, accelerator architectures (e.g. GPUs, TPUs), Compilers, or high-speed interconnects (e.g. NVLink, InfiniBand).
Familiarity with PyTorch or JAX.
Ported applications to non-standard accelerator hardware or hardware platforms.
Strong candidates may also have experience with (Nice-to-have qualifications)
Developed low-latency, high-performance applications using both kernel-level and user-space networking stacks.
Deep understanding of distributed systems concepts, algorithms, and challenges, including consensus protocols, consistency models, and communication patterns.
Solid grasp of Transformer architectures, particularly Mixture-of-Experts (MoE).
Built applications with extensive SIMD (Single Instruction, Multiple Data) optimizations for performance-critical paths.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nKey responsibilities\n\n - Support porting state-of-the-art models to our architecture. Help build programming abstractions and testing capabilities to rapidly iterate on model porting.\n\n - Build, enhance, and scale our runtime, including multi-node inference, intra-node execution, state management, and robust error handling.\n\n - Optimize routing and communication layers using our collectives.\n\n - Utilize performance profiling and debugging tools to identify bottlenecks and correctness issues.\n\n\n\nYou may be a good fit if you have\n\n - Proficiency in C++ or Rust.\n\n - Understanding of performance-sensitive or complex distributed software systems like Linux internals, accelerator architectures (e.g. GPUs, TPUs), Compilers, or high-speed interconnects (e.g. NVLink, InfiniBand).\n\n - Familiarity with PyTorch or JAX.\n\n - Ported applications to non-standard accelerator hardware or hardware platforms.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Developed low-latency, high-performance applications using both kernel-level and user-space networking stacks.\n\n - Deep understanding of distributed systems concepts, algorithms, and challenges, including consensus protocols, consistency models, and communication patterns.\n\n - Solid grasp of Transformer architectures, particularly Mixture-of-Experts (MoE).\n\n - Built applications with extensive SIMD (Single Instruction, Multiple Data) optimizations for performance-critical paths.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"d1d009f0-f0c7-4ab6-9f27-881c3ea12505","title":"ASIC Architect","department":"Architecture","team":"Architecture","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2025-08-05T05:32:15.214+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/d1d009f0-f0c7-4ab6-9f27-881c3ea12505","applyUrl":"https://jobs.ashbyhq.com/etched/d1d009f0-f0c7-4ab6-9f27-881c3ea12505/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a talented Computer Architect to join our architecture team and contribute to the design of next-generation AI accelerators. This role focuses on developing and optimizing compute architectures that deliver exceptional performance and efficiency for inference workloads. You will work on cutting-edge architectural problems and performance modeling with deep cross-functional collaboration to bring innovative chip designs from concept to silicon.
Key Responsibilities
Design and analyze chip architectures optimized for AI/ML workloads, with focus on throughput, latency, and power efficiency
Contribute to power and area estimation methodologies for early-stage, next generation architectural exploration
Create architectural specifications and interface definitions for compute blocks and subsystems
Collaborate with RTL, verification, physical design, and software teams to ensure architectural feasibility and ultimate optimization
Conduct architectural experiments using cycle-accurate simulators and analytical models
Support integration efforts by providing architectural guidance and resolving design challenges
You may be a good fit if you have
PhD in Computer Science, Electrical Engineering, Computer Engineering, or related field
5+ years of experience in computer architecture, ASIC design, or related fields
Strong understanding of computer architecture fundamentals including pipelines, memory hierarchies, and interconnects
Experience with performance modeling and architectural simulation tools
Hands‑on experience designing and optimizing floating‑point datapaths or arithmetic‑intensive circuits and working with advanced process nodes.
Proficiency in Rust, C/C++, or Python for modeling and analysis
Knowledge of modern processor microarchitecture and design tradeoffs
Strong analytical and problem-solving skills with attention to detail
Excellent communication skills and ability to work in cross-functional teams
Strong candidates may also have experience with
AI/ML accelerator architectures and dataflow optimization
RTL design and verification (Verilog/SystemVerilog)
Cycle-accurate simulation tools (gem5, SystemC, or custom simulators)
Power and performance analysis methodologies
ASIC design flow and physical design constraints
Publishing or presenting at architecture conferences (ISCA, MICRO, HPCA, etc.)
Hands-on experience with tapeout and silicon bring-up
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a talented Computer Architect to join our architecture team and contribute to the design of next-generation AI accelerators. This role focuses on developing and optimizing compute architectures that deliver exceptional performance and efficiency for inference workloads. You will work on cutting-edge architectural problems and performance modeling with deep cross-functional collaboration to bring innovative chip designs from concept to silicon.\n\n\n\nKey Responsibilities\n\n - Design and analyze chip architectures optimized for AI/ML workloads, with focus on throughput, latency, and power efficiency\n\n - Contribute to power and area estimation methodologies for early-stage, next generation architectural exploration\n\n - Create architectural specifications and interface definitions for compute blocks and subsystems\n\n - Collaborate with RTL, verification, physical design, and software teams to ensure architectural feasibility and ultimate optimization\n\n - Conduct architectural experiments using cycle-accurate simulators and analytical models\n\n - Support integration efforts by providing architectural guidance and resolving design challenges\n\n\n\nYou may be a good fit if you have\n\n - PhD in Computer Science, Electrical Engineering, Computer Engineering, or related field\n\n - 5+ years of experience in computer architecture, ASIC design, or related fields\n\n - Strong understanding of computer architecture fundamentals including pipelines, memory hierarchies, and interconnects\n\n - Experience with performance modeling and architectural simulation tools\n\n - Hands‑on experience designing and optimizing floating‑point datapaths or arithmetic‑intensive circuits and working with advanced process nodes.\n\n - Proficiency in Rust, C/C++, or Python for modeling and analysis\n\n - Knowledge of modern processor microarchitecture and design tradeoffs\n\n - Strong analytical and problem-solving skills with attention to detail\n\n - Excellent communication skills and ability to work in cross-functional teams\n\n\n\nStrong candidates may also have experience with\n\n - AI/ML accelerator architectures and dataflow optimization\n\n - RTL design and verification (Verilog/SystemVerilog)\n\n - Cycle-accurate simulation tools (gem5, SystemC, or custom simulators)\n\n - Power and performance analysis methodologies\n\n - ASIC design flow and physical design constraints\n\n - Publishing or presenting at architecture conferences (ISCA, MICRO, HPCA, etc.)\n\n - Hands-on experience with tapeout and silicon bring-up\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"639fe410-56a4-44aa-ac93-8ee7c10c7d75","title":"Growth Ops Intern","department":"Operations","team":"Operations","employmentType":"Intern","location":"San Jose","secondaryLocations":[],"publishedAt":"2025-12-08T22:41:41.532+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/639fe410-56a4-44aa-ac93-8ee7c10c7d75","applyUrl":"https://jobs.ashbyhq.com/etched/639fe410-56a4-44aa-ac93-8ee7c10c7d75/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
We are an in-person team in San Jose, CA, and are on-site 5 days a week. We are looking for Fall '26, and Summer '27 interns.
Key responsibilities:
Early-Career Hiring:
Help execute Etched’s internship and new-grad hiring strategy.
Identify exceptional students through universities, technical communities, and unconventional channels.
Partner with recruiters and hiring leaders on targeted outreach.
Events & Community:
Plan private events across the country for high-potential students.
Build relationships with university clubs, professors, and student leaders.
Create memorable experiences that introduce candidates to Etched.
Own guest lists, invitations, venues, logistics, and follow-up.
Marketing & Sourcing:
Develop campaigns that make Etched stand out to top students.
Source candidates through events, referrals, communities, and direct outreach.
Create compelling early-career recruiting content.
Program Ownership:
Track event engagement and recruiting conversion.
Improve programs as Etched scales.
Collaborate across recruiting, marketing, and leadership.
Representative projects
Developing sourcing campaigns for hard-to-reach talent.
Establishing relationships with top university organizations.
Measuring which events and channels produce the strongest candidates.
You may be a good fit if you have
Experience in recruiting, sourcing, events, marketing, or community building.
Strong instincts for identifying and engaging exceptional people.
Excellent communication and project-management skills.
High attention to detail and comfort in a fast-changing environment.
Willingness to travel for events.
Strong candidates may also have experience with
Community Building: Developing relationships with universities and technical organizations.
Talent Marketing: Creating campaigns and events that resonate with top candidates.
Event Execution: Producing high-quality experiences for executives and priority guests.
Data-Driven Ownership: Measuring results and improving programs quickly.
Resourceful Sourcing: Finding talent through unconventional networks and personalized outreach.
We encourage you to apply even if you do not believe you meet every single qualification.
Program details:
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com.
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is hiring a Manufacturing Operations Program Manager based in Taiwan to lead day-to-day execution at our contract manufacturer. You will serve as the in-region lead responsible for ramping and sustaining production of our core AI hardware, including package assembly and server construction. You’ll work closely with Etched’s production engineering, planning, and supply chain teams to ensure quality, throughput, and readiness at every stage of the build.
This is a hands-on role with direct accountability for factory performance—ideal for someone who thrives in high-volume, precision-oriented environments and enjoys on-the-ground problem-solving.
Key responsibilities
Own manufacturing execution at our Taiwan-based Tier 1 contract manufacturer for L6/L10/L11 production, providing day-to-day operational leadership while driving long-term scalability and manufacturing efficiency.
Serve as the primary communication bridge between the Taiwan factory and Etched's cross-functional and regional teams, ensuring clear, timely, and effective collaboration.
Lead factory capacity planning by tracking equipment readiness and developing mass production (MP) ramp scenarios to support changing business needs.
Partner with the contract manufacturer, production planning, and materials teams to develop, optimize, and execute weekly production schedules.
Oversee production performance across SMT, mechanical assembly, and test operations, ensuring yield, quality, throughput, and output targets are consistently achieved.
Drive cross-functional resolution of manufacturing and technical issues, including DFM/DFx improvements, yield optimization, and rework reduction, in collaboration with Etched and L10/L11 engineering teams.
Coordinate new product introduction (NPI) builds, mass production ramps, engineering change orders (ECOs), and process changes to ensure smooth production transitions.
Provide real-time visibility into production status by proactively tracking build progress, identifying deviations, escalating risks, and driving timely corrective actions.
You may be a good fit if you have (Must-have qualifications)
8+ years experience in data center product manufacturing operations, OPM, Contract Manufacturing or TPM roles
Track record of working closely with tier 1 CMs in Taiwan or Asia-based fabs
Ability to travel regularly to the factory and manage execution in person
Excellent communication and bilingual proficiency (Mandarin and English preferred)
Skilled at managing escalations, coordinating across time zones, and enforcing timelines
Strong candidates may also have experience with (Nice-to-have qualifications)
Engineering background in electrical, mechanical, or packaging domains
Exposure to MP ramp planning or cost-of-yield improvement initiatives
Benefits
Competitive compensation packages including generous equity packages
Comprehensive insurance coverage and other top-of-market benefits
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched is hiring a Manufacturing Operations Program Manager based in Taiwan to lead day-to-day execution at our contract manufacturer. You will serve as the in-region lead responsible for ramping and sustaining production of our core AI hardware, including package assembly and server construction. You’ll work closely with Etched’s production engineering, planning, and supply chain teams to ensure quality, throughput, and readiness at every stage of the build.\n\nThis is a hands-on role with direct accountability for factory performance—ideal for someone who thrives in high-volume, precision-oriented environments and enjoys on-the-ground problem-solving.\n\n\nKey responsibilities\n\n - Own manufacturing execution at our Taiwan-based Tier 1 contract manufacturer for L6/L10/L11 production, providing day-to-day operational leadership while driving long-term scalability and manufacturing efficiency.\n\n - Serve as the primary communication bridge between the Taiwan factory and Etched's cross-functional and regional teams, ensuring clear, timely, and effective collaboration.\n\n - Lead factory capacity planning by tracking equipment readiness and developing mass production (MP) ramp scenarios to support changing business needs.\n\n - Partner with the contract manufacturer, production planning, and materials teams to develop, optimize, and execute weekly production schedules.\n\n - Oversee production performance across SMT, mechanical assembly, and test operations, ensuring yield, quality, throughput, and output targets are consistently achieved.\n\n - Drive cross-functional resolution of manufacturing and technical issues, including DFM/DFx improvements, yield optimization, and rework reduction, in collaboration with Etched and L10/L11 engineering teams.\n\n - Coordinate new product introduction (NPI) builds, mass production ramps, engineering change orders (ECOs), and process changes to ensure smooth production transitions.\n\n - Provide real-time visibility into production status by proactively tracking build progress, identifying deviations, escalating risks, and driving timely corrective actions.\n\n - \n\nYou may be a good fit if you have (Must-have qualifications)\n\n - 8+ years experience in data center product manufacturing operations, OPM, Contract Manufacturing or TPM roles\n\n - Track record of working closely with tier 1 CMs in Taiwan or Asia-based fabs\n\n - Ability to travel regularly to the factory and manage execution in person\n\n - Excellent communication and bilingual proficiency (Mandarin and English preferred)\n\n - Skilled at managing escalations, coordinating across time zones, and enforcing timelines\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Engineering background in electrical, mechanical, or packaging domains\n\n - Exposure to MP ramp planning or cost-of-yield improvement initiatives\n\nBenefits\n\n - Competitive compensation packages including generous equity packages\n\n - Comprehensive insurance coverage and other top-of-market benefits\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed."},{"id":"a99318bd-b433-44b7-9600-2ee9533c90a1","title":"Design Verification Engineer - SoC","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2025-09-11T18:44:02.970+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/a99318bd-b433-44b7-9600-2ee9533c90a1","applyUrl":"https://jobs.ashbyhq.com/etched/a99318bd-b433-44b7-9600-2ee9533c90a1/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a Design Verification Engineer to join our Systems/Performance Verification team. You will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.
Key responsibilities
Work closely with architects and RTL designers on verifying the performance features of the design and correlating with performance models (both pre-silicon and post-silicon).
Work closely with software and application developers on identifying performance bottlenecks and tuning the software.
Develop test plans and test infrastructure/tools for performance tuning, correlation, and verification.
Improve and maintain the architectural performance models.
Develop tests in SystemVerilog, Python, or vectors to debug and correlate the RTL and performance model.
Develop SystemVerilog or Python-based checkers for verifying the performance features.
Develop coverage monitors and analyze coverage to ensure all performance features are covered.
Debug performance issues and conduct performance tuning on silicon.
Drive end-to-end performance tuning, ensuring optimal hardware utilization, software efficiency, and architectural alignment across the ASIC design lifecycle.
You may be a good fit if you have
Strong understanding of digital design, RTL, and ASIC design flows.
Hands-on experience with performance verification, simulation, and modeling.
Comfortable developing checkers, coverage monitors, and testbenches in SystemVerilog.
Skilled in writing Python scripts for automation, data analysis, and performance modeling.
Experience building and maintaining performance models for chip subsystems.
Understanding of memory hierarchies, pipelines, interconnects, and compute accelerators.
Familiarity with performance bottleneck analysis, compiler optimizations, and workload tuning
Some exposure to kernel level performance metrics and profiling tools.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a Design Verification Engineer to join our Systems/Performance Verification team. You will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.\n\n\n\nKey responsibilities\n\n - Work closely with architects and RTL designers on verifying the performance features of the design and correlating with performance models (both pre-silicon and post-silicon).\n\n - Work closely with software and application developers on identifying performance bottlenecks and tuning the software.\n\n - Develop test plans and test infrastructure/tools for performance tuning, correlation, and verification.\n\n - Improve and maintain the architectural performance models.\n\n - Develop tests in SystemVerilog, Python, or vectors to debug and correlate the RTL and performance model.\n\n - Develop SystemVerilog or Python-based checkers for verifying the performance features.\n\n - Develop coverage monitors and analyze coverage to ensure all performance features are covered.\n\n - Debug performance issues and conduct performance tuning on silicon.\n\n - Drive end-to-end performance tuning, ensuring optimal hardware utilization, software efficiency, and architectural alignment across the ASIC design lifecycle.\n\n\n\nYou may be a good fit if you have\n\n - Strong understanding of digital design, RTL, and ASIC design flows.\n\n - Hands-on experience with performance verification, simulation, and modeling.\n\n - Comfortable developing checkers, coverage monitors, and testbenches in SystemVerilog.\n\n - Skilled in writing Python scripts for automation, data analysis, and performance modeling.\n\n - Experience building and maintaining performance models for chip subsystems.\n\n - Understanding of memory hierarchies, pipelines, interconnects, and compute accelerators.\n\n - Familiarity with performance bottleneck analysis, compiler optimizations, and workload tuning\n\n - Some exposure to kernel level performance metrics and profiling tools.\n \n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"d88da917-21f5-42b7-b1e2-8986897aaab1","title":"Design Verification Engineer - Interface IP","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2025-09-11T18:49:28.530+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/d88da917-21f5-42b7-b1e2-8986897aaab1","applyUrl":"https://jobs.ashbyhq.com/etched/d88da917-21f5-42b7-b1e2-8986897aaab1/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a Design Verification Engineer to join our Interface IP DV team. You will work with architects, designers, and vendors to ensure that all our architecture requirements are met in the IP subsystems and interfaces being created, validate correctness and performance across the full hardware-software stack. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges.
Key responsibilities
End to end ownership of one or more of the following IP subsystems: PCIe, Ethernet, CPU (arc/arm), low power peripherals, sensors
Understand vendor IP configurations and handle handshake with internal IP team
Develop and maintain UVM/SystemVerilog-based verification environments to ensure functional correctness, performance, and compliance with IP specifications.
Collaborate with integration and SoC DV teams to validate seamless interaction of external IPs within the broader chip architecture.
Drive coverage closure and sign-off by defining metrics, analyzing gaps, and ensuring comprehensive verification across corner cases and stress scenarios.
You may be a good fit if you have
5+ years of design verification experience
You enjoy digging deep into complex verification challenges and finding creative ways to expose corner-case bugs.
You have hands-on experience with industry-standard verification methodologies like SystemVerilog/UVM and understand how to build scalable, reusable testbenches.
You are comfortable working with standard IP interfaces and protocols such as PCIe, Ethernet, AXI/AMBA, or ARM/ARC CPUs.
You thrive in a fast-paced startup environment and can take ownership of projects with minimal direction.
You collaborate naturally with cross-functional teams — from RTL design to software and emulation — and can clearly communicate technical insights.
Strong candidates may also have experience with
Experience handling vendors and integration of IP/VIP’s
UVM/System Verilog
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a Design Verification Engineer to join our Interface IP DV team. You will work with architects, designers, and vendors to ensure that all our architecture requirements are met in the IP subsystems and interfaces being created, validate correctness and performance across the full hardware-software stack. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges.\n\n\n\nKey responsibilities\n\n - End to end ownership of one or more of the following IP subsystems: PCIe, Ethernet, CPU (arc/arm), low power peripherals, sensors\n\n - Understand vendor IP configurations and handle handshake with internal IP team\n\n - Develop and maintain UVM/SystemVerilog-based verification environments to ensure functional correctness, performance, and compliance with IP specifications.\n\n - Collaborate with integration and SoC DV teams to validate seamless interaction of external IPs within the broader chip architecture.\n\n - Drive coverage closure and sign-off by defining metrics, analyzing gaps, and ensuring comprehensive verification across corner cases and stress scenarios.\n\n\n\nYou may be a good fit if you have\n\n - 5+ years of design verification experience\n\n - You enjoy digging deep into complex verification challenges and finding creative ways to expose corner-case bugs.\n\n - You have hands-on experience with industry-standard verification methodologies like SystemVerilog/UVM and understand how to build scalable, reusable testbenches.\n\n - You are comfortable working with standard IP interfaces and protocols such as PCIe, Ethernet, AXI/AMBA, or ARM/ARC CPUs.\n\n - You thrive in a fast-paced startup environment and can take ownership of projects with minimal direction.\n\n - You collaborate naturally with cross-functional teams — from RTL design to software and emulation — and can clearly communicate technical insights.\n \n\nStrong candidates may also have experience with \n\n - Experience handling vendors and integration of IP/VIP’s\n\n - UVM/System Verilog\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n"},{"id":"890fd360-d558-4fa6-921d-32ff9e58e7e2","title":"IT Engineer","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-02-19T20:01:21.147+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/890fd360-d558-4fa6-921d-32ff9e58e7e2","applyUrl":"https://jobs.ashbyhq.com/etched/890fd360-d558-4fa6-921d-32ff9e58e7e2/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
At Etched, every role is critical, but as an IT Engineer, you’ll be the key to ensuring everyone can perform at their highest level. You’ll be the trusted resource who keeps our high-performance engineering and operations environment running seamlessly, so teams can innovate without barriers. In this role, you’ll drive company-wide productivity, empower engineers with tools and infrastructure to move at maximum velocity, and champion a culture of operational excellence across all systems. From enabling cutting-edge chip development workflows to streamlining day-to-day IT operations, you’ll ensure nothing slows down our mission to build transformational AI innovation.
Key responsibilities
Provide hands-on IT delivery and support for the entire firm, including ASIC design teams, software and platform engineering, business operations, and scale-out computing teams.
Lead onboarding and offboarding processes to ensure seamless access aligned with engineering and leadership workflows.
Maintain robust documentation of IT assets, systems, access protocols, and ticket workflows.
Manage on-site and remote laptops, desktops, and networking equipment with attention to ease of use, security, and remote manageability.
Deploy and administer MDM and MAM solutions for Mac and Windows devices.
Implement and maintain antivirus, antimalware, Endpoint Detection & Response (EDR), and Extended Detection & Response (XDR).
Drive hardware procurement, staging, imaging, and maintenance for development and operations teams.
Implement and administer Single Sign-On (SSO) across core services, ensuring secure and frictionless user authentication. Okta experience a bonus
Automate user provisioning and deprovisioning workflows using Rippling, Okta, Google Workspace, and FreeIPA to streamline access management and reduce errors.
Enforce role-based access controls and audit trails to align with compliance and security standards.
Design, deploy, and maintain wired and wireless networks, including Wi-Fi access points (WAPs) and controller administration.
Configure and manage VPN infrastructure to provide secure remote access for distributed teams.
Administer firewalls, ensuring proper segmentation, policy enforcement, and protection of sensitive environments.
Develop automation scripts (Python, Bash, PowerShell) to streamline provisioning, patching, monitoring, and user lifecycle management.
Integrate monitoring and alerting systems to reduce manual workload and increase reliability.
Champion a culture of operational excellence, ensuring IT systems meet compliance standards (e.g., SOC 2, ISO 27001).
Coordinate with external vendors and partners to evaluate new products, support existing offerings, and to resolve IT issues.
Partner closely with engineering, security, and operations teams to align IT strategy with business and technical goals.
Representative projects:
Managing a mixed-OS engineering environment (Linux for EDA tools, Windows/macOS for general use) — including imaging, patching, and security hardening.
Designing and maintaining secure network infrastructure (VPNs, VLANs, firewalls, access control) to protect sensitive chip design IP.
Implementing and managing endpoint/device lifecycle systems (procurement, setup, MDM, retirement) for engineering and operations teams.
Deploying and integrating compute resources (on-prem servers and cloud environments) to support large-scale simulations and hardware workflows.
Building scalable onboarding/offboarding and IT automation workflows to ensure fast, secure ramp-up for new engineers and smooth transitions.
Strong understanding of networking fundamentals: VPNs, VLANs, firewalls.
Skilled in endpoint management, system imaging, and hardware lifecycle management.
Proficient with ticketing systems and adept at prioritizing tasks in busy environments.
Excellent communication skills and ability to work effectively with engineering teams in fast-paced, innovative settings.
You may be a good fit if you have:
5-7+ years in an IT support or engineering role with experience across macOS, Windows and Linux
Excellent problem-solving skills, with a proactive and ownership-driven mindset.
Experience working in a fast-paced startup environment.
Proven experience with endpoint management tools (e.g., Jump,Cloud, Jamf, Intune, Kandji).
Hands-on expertise in enterprise VPNs, wireless networking, and zero-trust access models.
Strong background in EDR/XDR platforms (e.g., ThreadDown, CrowdStrike, SentinelOne).
Scripting and automation proficiency (Python, Bash, PowerShell).
Knowledge of security best practices, incident response, and identity/access management (IAM).
Strong networking expertise, including configuring and troubleshooting TCP/IP, DNS, DHCP, VLANs, and firewalls.
Exposure to cloud platforms (AWS, Azure, GCP) or a developer-oriented compute infrastructure is a plus.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nAt Etched, every role is critical, but as an IT Engineer, you’ll be the key to ensuring everyone can perform at their highest level. You’ll be the trusted resource who keeps our high-performance engineering and operations environment running seamlessly, so teams can innovate without barriers. In this role, you’ll drive company-wide productivity, empower engineers with tools and infrastructure to move at maximum velocity, and champion a culture of operational excellence across all systems. From enabling cutting-edge chip development workflows to streamlining day-to-day IT operations, you’ll ensure nothing slows down our mission to build transformational AI innovation.\n\n\n\nKey responsibilities\n\n - Provide hands-on IT delivery and support for the entire firm, including ASIC design teams, software and platform engineering, business operations, and scale-out computing teams.\n\n - Lead onboarding and offboarding processes to ensure seamless access aligned with engineering and leadership workflows.\n\n - Maintain robust documentation of IT assets, systems, access protocols, and ticket workflows.\n\n - Manage on-site and remote laptops, desktops, and networking equipment with attention to ease of use, security, and remote manageability.\n\n - Deploy and administer MDM and MAM solutions for Mac and Windows devices.\n\n - Implement and maintain antivirus, antimalware, Endpoint Detection & Response (EDR), and Extended Detection & Response (XDR).\n\n - Drive hardware procurement, staging, imaging, and maintenance for development and operations teams.\n\n - Implement and administer Single Sign-On (SSO) across core services, ensuring secure and frictionless user authentication. Okta experience a bonus\n\n - Automate user provisioning and deprovisioning workflows using Rippling, Okta, Google Workspace, and FreeIPA to streamline access management and reduce errors.\n\n - Enforce role-based access controls and audit trails to align with compliance and security standards.\n\n - Design, deploy, and maintain wired and wireless networks, including Wi-Fi access points (WAPs) and controller administration.\n\n - Configure and manage VPN infrastructure to provide secure remote access for distributed teams.\n\n - Administer firewalls, ensuring proper segmentation, policy enforcement, and protection of sensitive environments.\n\n - Develop automation scripts (Python, Bash, PowerShell) to streamline provisioning, patching, monitoring, and user lifecycle management.\n\n - Integrate monitoring and alerting systems to reduce manual workload and increase reliability.\n\n - Champion a culture of operational excellence, ensuring IT systems meet compliance standards (e.g., SOC 2, ISO 27001).\n\n - Coordinate with external vendors and partners to evaluate new products, support existing offerings, and to resolve IT issues.\n\n - Partner closely with engineering, security, and operations teams to align IT strategy with business and technical goals.\n\n\n\nRepresentative projects:\n\n - Managing a mixed-OS engineering environment (Linux for EDA tools, Windows/macOS for general use) — including imaging, patching, and security hardening.\n\n - Designing and maintaining secure network infrastructure (VPNs, VLANs, firewalls, access control) to protect sensitive chip design IP.\n\n - Implementing and managing endpoint/device lifecycle systems (procurement, setup, MDM, retirement) for engineering and operations teams.\n\n - Deploying and integrating compute resources (on-prem servers and cloud environments) to support large-scale simulations and hardware workflows.\n\n - Building scalable onboarding/offboarding and IT automation workflows to ensure fast, secure ramp-up for new engineers and smooth transitions.\n\n - Strong understanding of networking fundamentals: VPNs, VLANs, firewalls.\n\n - Skilled in endpoint management, system imaging, and hardware lifecycle management.\n\n - Proficient with ticketing systems and adept at prioritizing tasks in busy environments.\n\n - Excellent communication skills and ability to work effectively with engineering teams in fast-paced, innovative settings.\n\n\n\nYou may be a good fit if you have:\n\n - 5-7+ years in an IT support or engineering role with experience across macOS, Windows and Linux\n\n - Excellent problem-solving skills, with a proactive and ownership-driven mindset.\n\n - Experience working in a fast-paced startup environment.\n\n - Proven experience with endpoint management tools (e.g., Jump,Cloud, Jamf, Intune, Kandji).\n\n - Hands-on expertise in enterprise VPNs, wireless networking, and zero-trust access models.\n\n - Strong background in EDR/XDR platforms (e.g., ThreadDown, CrowdStrike, SentinelOne).\n\n - Scripting and automation proficiency (Python, Bash, PowerShell).\n\n - Knowledge of security best practices, incident response, and identity/access management (IAM).\n\n - Strong networking expertise, including configuring and troubleshooting TCP/IP, DNS, DHCP, VLANs, and firewalls.\n\n - Exposure to cloud platforms (AWS, Azure, GCP) or a developer-oriented compute infrastructure is a plus.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"a0a1671e-15d4-474c-8227-97fe16ade553","title":"Finance Intern","department":"Finance","team":"Finance","employmentType":"Intern","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-05-19T22:26:35.636+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/a0a1671e-15d4-474c-8227-97fe16ade553","applyUrl":"https://jobs.ashbyhq.com/etched/a0a1671e-15d4-474c-8227-97fe16ade553/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As we scale our company, we will face many operational challenges. From deciding pricing, SKUs, and unit economics to accounting, financing strategies, and supply chain management, we are looking for a Finance intern to tackle strategic financial challenges and execute on our day-to-day finance operations.
You will work closely with the executive team to drive financial models, assist with purchase orders and accounts payable, and learn about key strategic issues across the organization, from supply chain to product. You’ll get hands-on experience across FP&A, accounting operations, vendor payments, and pricing/unit economics modeling. We are looking for Spring '27, and Summer '27 interns.
You may be a good fit if you have
Previous internship experience in consulting, banking, or early startup environments
Understanding of cash flow management, bank reconciliation, and bookkeeping
Track record of excellent project management and data analysis skills
Willingness to do a broad set of finance, accounting, and operations work
Comfort with Excel/Sheets or basic financial modeling
Strong candidates may also have experience with
Technical Curiosity: experience, education, or interest in computer science, electrical engineering, artificial Intelligence, or a related field.
Industry interest: Deep curiosity about the AI ecosystem, including emerging trends, cutting-edge technologies, and industry innovations.
Startup Acumen: Interest in startup finance (equity, cap tables, fundraising)
We encourage you to apply even if you do not believe you meet every qualification.
Program details:
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com.
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nAs we scale our company, we will face many operational challenges. From deciding pricing, SKUs, and unit economics to accounting, financing strategies, and supply chain management, we are looking for a Finance intern to tackle strategic financial challenges and execute on our day-to-day finance operations.\n\n\n\nYou will work closely with the executive team to drive financial models, assist with purchase orders and accounts payable, and learn about key strategic issues across the organization, from supply chain to product. You’ll get hands-on experience across FP&A, accounting operations, vendor payments, and pricing/unit economics modeling. We are looking for Spring '27, and Summer '27 interns.\n\n\n\nYou may be a good fit if you have\n\n - Previous internship experience in consulting, banking, or early startup environments\n\n - Understanding of cash flow management, bank reconciliation, and bookkeeping\n\n - Track record of excellent project management and data analysis skills\n\n - Willingness to do a broad set of finance, accounting, and operations work\n\n - Comfort with Excel/Sheets or basic financial modeling\n\n\n\nStrong candidates may also have experience with\n\n - Technical Curiosity: experience, education, or interest in computer science, electrical engineering, artificial Intelligence, or a related field.\n\n - Industry interest: Deep curiosity about the AI ecosystem, including emerging trends, cutting-edge technologies, and industry innovations.\n\n - Startup Acumen: Interest in startup finance (equity, cap tables, fundraising)\n\n\n\nWe encourage you to apply even if you do not believe you meet every qualification.\n\n\n\nProgram details:\n\n - 12-week paid internship\n\n - Generous housing support for those relocating\n\n - Daily lunch and dinner in our office\n\n - Based at our office in San Jose, CA\n\n - Direct mentorship from industry leaders and world-class engineers\n\n - Opportunity to work on one of the most important problems of our time\n\n\n\nFor any questions, contact internships@etched.com.\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"6f23713f-5409-45b7-aae8-adb8710cdbc3","title":"Inference Intern","department":"Architecture","team":"Architecture","employmentType":"Intern","location":"San Jose","secondaryLocations":[],"publishedAt":"2025-12-08T22:27:58.860+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/6f23713f-5409-45b7-aae8-adb8710cdbc3","applyUrl":"https://jobs.ashbyhq.com/etched/6f23713f-5409-45b7-aae8-adb8710cdbc3/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking talented Spring '27, and Summer '27 Inference Architecture interns to join our team and contribute to the design of next-generation AI accelerators. This role focuses on developing and optimizing compute architectures that deliver exceptional performance and efficiency for inference workloads. You will work on cutting-edge architectural problems and performance modeling over the course of your internship.
Key responsibilities
Support porting state-of-the-art models to our architecture. Help build programming abstractions and testing capabilities to rapidly iterate on model porting.
Assist in building, enhancing, and scaling our runtime, including multi-node inference, intra-node execution, state management, and robust error handling.
Contribute to optimizing routing and communication layers using our collectives.
Utilize performance profiling and debugging tools to identify bottlenecks and correctness issues.
Develop and leverage a deep understanding of our architecture to co-design both HW instructions and model architecture operations to maximize model performance
Implement high-performance software components for the Model Toolkit
You may be a good fit if you have
Progress towards a Bachelor’s, Master’s, or PhD degree in computer science, computer engineering, applied mathematics, or a related field
Proficiency in Python, C++
Understanding of performance-sensitive or complex distributed software systems, e.g. Linux internals, accelerator architectures (e.g. GPUs, TPUs), Compilers, or high-speed interconnects (e.g. NVLink, InfiniBand).
Ported applications to non-standard accelerator hardware or hardware platforms.
Deep knowledge of transformer model architectures and/or inference serving stacks (vLLM, SGLang, etc.)
Strong candidates may have some experience with
Proficiency in Rust
Low-latency, high-performance applications using both kernel-level and user-space networking stacks.
Deep understanding of distributed systems concepts, algorithms, and challenges, including consensus protocols, consistency models, and communication patterns.
Solid grasp of Transformer architectures, particularly Mixture-of-Experts (MoE).
Built applications with extensive SIMD (Single Instruction, Multiple Data) optimizations for performance-critical paths.
Familiarity with PyTorch or JAX.
Math competitions (AIME, AMC, etc)
We encourage you to apply even if you do not believe you meet every qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com.
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking talented Spring '27, and Summer '27 Inference Architecture interns to join our team and contribute to the design of next-generation AI accelerators. This role focuses on developing and optimizing compute architectures that deliver exceptional performance and efficiency for inference workloads. You will work on cutting-edge architectural problems and performance modeling over the course of your internship.\n\n\n\nKey responsibilities\n\n - Support porting state-of-the-art models to our architecture. Help build programming abstractions and testing capabilities to rapidly iterate on model porting.\n\n - Assist in building, enhancing, and scaling our runtime, including multi-node inference, intra-node execution, state management, and robust error handling.\n\n - Contribute to optimizing routing and communication layers using our collectives.\n\n - Utilize performance profiling and debugging tools to identify bottlenecks and correctness issues.\n\n - Develop and leverage a deep understanding of our architecture to co-design both HW instructions and model architecture operations to maximize model performance\n\n - Implement high-performance software components for the Model Toolkit\n\n\n\nYou may be a good fit if you have\n\n - Progress towards a Bachelor’s, Master’s, or PhD degree in computer science, computer engineering, applied mathematics, or a related field\n\n - Proficiency in Python, C++\n\n - Understanding of performance-sensitive or complex distributed software systems, e.g. Linux internals, accelerator architectures (e.g. GPUs, TPUs), Compilers, or high-speed interconnects (e.g. NVLink, InfiniBand).\n\n - Ported applications to non-standard accelerator hardware or hardware platforms.\n\n - Deep knowledge of transformer model architectures and/or inference serving stacks (vLLM, SGLang, etc.)\n\n\n\nStrong candidates may have some experience with\n\n - Proficiency in Rust\n\n - Low-latency, high-performance applications using both kernel-level and user-space networking stacks.\n\n - Deep understanding of distributed systems concepts, algorithms, and challenges, including consensus protocols, consistency models, and communication patterns.\n\n - Solid grasp of Transformer architectures, particularly Mixture-of-Experts (MoE).\n\n - Built applications with extensive SIMD (Single Instruction, Multiple Data) optimizations for performance-critical paths.\n\n - Familiarity with PyTorch or JAX.\n\n - Math competitions (AIME, AMC, etc)\n\nWe encourage you to apply even if you do not believe you meet every qualification.\n\n\n\nProgram details\n\n - 12-week paid internship\n\n - Generous housing support for those relocating\n\n - Daily lunch and dinner in our office\n\n - Based at our office in San Jose, CA\n\n - Direct mentorship from industry leaders and world-class engineers\n\n - Opportunity to work on one of the most important problems of our time\n\n\n\nFor any questions, contact internships@etched.com.\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"9a3eed83-b5b2-4ac4-a2d4-9dc9dd734869","title":"Post-Silicon Validation Engineer","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2025-10-13T19:43:57.492+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/9a3eed83-b5b2-4ac4-a2d4-9dc9dd734869","applyUrl":"https://jobs.ashbyhq.com/etched/9a3eed83-b5b2-4ac4-a2d4-9dc9dd734869/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for bringing up, validating, and characterizing ASICs from first silicon through the production ramp. This role is crucial in ensuring functional correctness, performance, and reliability of our AI/ML accelerator hardware, enabling successful deployment of our cutting-edge products.
Key Responsibilities
Drive early bring-up of first silicon, including boot, initialization, and debug of ASICs.
Perform deep-dive debug of silicon issues across RTL, firmware, and system levels.
Collaborate closely with design, verification, and board teams to root-cause and resolve functional and electrical issues.
Validate and characterize custom IP blocks and accelerator components.
Execute functional and performance validation of compute units and specialized processing elements.
Conduct IP-level and full-chip stress testing and corner case analysis to ensure robust operation.
Develop and extend post-silicon validation infrastructure, automation, and test suites.
Implement efficient result capture, analysis, and regression frameworks.
Utilize lab instrumentation (oscilloscopes, analyzers, BERTs, pattern generators) for detailed signal and system characterization.
Define validation strategies and coverage metrics across design blocks and subsystems.
Partner with RTL, DFT, ATE, firmware, and system architecture teams to ensure smooth transition from pre-silicon verification to post-silicon validation.
Provide critical feedback on test escapes, yield issues, and silicon errata, influencing silicon revisions and firmware/driver workarounds.
You may be a good fit if you have
7+ years of experience in post-silicon validation, bring-up, and debug of ASICs (preferably including AI/ML accelerators)
Proven expertise in early silicon bring-up, debug, and validation
Deep knowledge of peripheral interfaces and board-level debug
Proficiency in C, Python, and scripting for validation automation
Hands-on expertise with oscilloscopes, logic/protocol analyzers, and other validation lab tools
Familiarity with firmware, bootloaders, and low-level silicon debug environments
Strong problem-solving, analytical, and collaboration skills across hardware and software teams
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's preferred)
Strong candidates may also have experience with
Low-speed peripheral interfaces (I2C, SPI, UART, JTAG)
High-speed protocols (PCIe, Ethernet)
Memory subsystems (HBM, DDR)
Performance and thermal characterization
AI/ML model profiling and workload correlation
System-level validation of accelerators or server platforms
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for bringing up, validating, and characterizing ASICs from first silicon through the production ramp. This role is crucial in ensuring functional correctness, performance, and reliability of our AI/ML accelerator hardware, enabling successful deployment of our cutting-edge products.\n\n\n\nKey Responsibilities\n\n - Drive early bring-up of first silicon, including boot, initialization, and debug of ASICs.\n\n - Perform deep-dive debug of silicon issues across RTL, firmware, and system levels.\n\n - Collaborate closely with design, verification, and board teams to root-cause and resolve functional and electrical issues.\n\n - Validate and characterize custom IP blocks and accelerator components.\n\n - Execute functional and performance validation of compute units and specialized processing elements.\n\n - Conduct IP-level and full-chip stress testing and corner case analysis to ensure robust operation.\n\n - Develop and extend post-silicon validation infrastructure, automation, and test suites.\n\n - Implement efficient result capture, analysis, and regression frameworks.\n\n - Utilize lab instrumentation (oscilloscopes, analyzers, BERTs, pattern generators) for detailed signal and system characterization.\n\n - Define validation strategies and coverage metrics across design blocks and subsystems.\n\n - Partner with RTL, DFT, ATE, firmware, and system architecture teams to ensure smooth transition from pre-silicon verification to post-silicon validation.\n\n - Provide critical feedback on test escapes, yield issues, and silicon errata, influencing silicon revisions and firmware/driver workarounds.\n\n\n\nYou may be a good fit if you have\n\n - 7+ years of experience in post-silicon validation, bring-up, and debug of ASICs (preferably including AI/ML accelerators)\n\n - Proven expertise in early silicon bring-up, debug, and validation\n\n - Deep knowledge of peripheral interfaces and board-level debug\n\n - Proficiency in C, Python, and scripting for validation automation\n\n - Hands-on expertise with oscilloscopes, logic/protocol analyzers, and other validation lab tools\n\n - Familiarity with firmware, bootloaders, and low-level silicon debug environments\n\n - Strong problem-solving, analytical, and collaboration skills across hardware and software teams\n\n - Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's preferred)\n\n\n\nStrong candidates may also have experience with\n\n - Low-speed peripheral interfaces (I2C, SPI, UART, JTAG)\n\n - High-speed protocols (PCIe, Ethernet)\n\n - Memory subsystems (HBM, DDR)\n\n - Performance and thermal characterization\n\n - AI/ML model profiling and workload correlation\n\n - System-level validation of accelerators or server platforms\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"29b303b2-f1a5-4799-a0b2-e86e28289a9b","title":"Chip Simulation Software Engineer","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-19T22:28:39.017+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/29b303b2-f1a5-4799-a0b2-e86e28289a9b","applyUrl":"https://jobs.ashbyhq.com/etched/29b303b2-f1a5-4799-a0b2-e86e28289a9b/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking highly motivated and detail-oriented software engineers to join our chip simulation team. We’re building custom AI inference chips that leverage tight hardware-software co-design to deliver world-best performance. The chip simulation team plays a key role in hardware-software co-design, enabling early development of the full software stack. As an engineer on this team, you will design, develop, and test simulations of our custom hardware. You will be working at the cutting edge of hardware innovation.
Key responsibilities
Design, develop, and maintain simulations of our hardware. Ensuring high levels of accuracy, efficient debugging, and optimal performance.
Influence architectural decisions through review and co-design
Create and maintain test plans, work with hardware teams to validate their documentation.
Build tools to debug simulations, and enable developers to debug software running on the simulator.
You may be a good fit if you have
Proficiency in C/C++
Strong understanding of low-level software engineering.
Strong understanding of hardware engineering.
Excellent communication and collaboration skills.
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience developing hardware or system simulations (e.g., SystemC, gem5, QEMU, or custom frameworks).
Experience with custom ML hardware accelerators (e.g., Google TPU)
Experience with firmware, kernel and driver development (e.g., Linux, FreeRTOS)
Experience with hardware development and verification.
Experience with multiprocessing and multithreading.
Familiarity with bit-accurate numerics modeling.
Experience with performance profiling and optimization of simulation code
Proficiency with Python for test harness development, bazel, and git.
Representative projects
Implement a simulation of our on-chip modules.
Integrate simulated chips with simulated hosts (QEMU), enabling Kernel driver development and host software testing.
Integrate multiple simulated chips to validate multi-chip software scale-out and scale-up approaches.
Work closely with our software teams in debugging early software deliverables.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking highly motivated and detail-oriented software engineers to join our chip simulation team. We’re building custom AI inference chips that leverage tight hardware-software co-design to deliver world-best performance. The chip simulation team plays a key role in hardware-software co-design, enabling early development of the full software stack. As an engineer on this team, you will design, develop, and test simulations of our custom hardware. You will be working at the cutting edge of hardware innovation.\n\n\n\nKey responsibilities\n\n - Design, develop, and maintain simulations of our hardware. Ensuring high levels of accuracy, efficient debugging, and optimal performance.\n\n - Influence architectural decisions through review and co-design\n\n - Create and maintain test plans, work with hardware teams to validate their documentation.\n\n - Build tools to debug simulations, and enable developers to debug software running on the simulator.\n\n\n\nYou may be a good fit if you have\n\n - Proficiency in C/C++\n\n - Strong understanding of low-level software engineering.\n\n - Strong understanding of hardware engineering.\n\n - Excellent communication and collaboration skills.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Experience developing hardware or system simulations (e.g., SystemC, gem5, QEMU, or custom frameworks).\n\n - Experience with custom ML hardware accelerators (e.g., Google TPU)\n\n - Experience with firmware, kernel and driver development (e.g., Linux, FreeRTOS)\n\n - Experience with hardware development and verification.\n\n - Experience with multiprocessing and multithreading.\n\n - Familiarity with bit-accurate numerics modeling.\n\n - Experience with performance profiling and optimization of simulation code\n\n - Proficiency with Python for test harness development, bazel, and git.\n\n\n\nRepresentative projects\n\n - Implement a simulation of our on-chip modules.\n\n - Integrate simulated chips with simulated hosts (QEMU), enabling Kernel driver development and host software testing.\n\n - Integrate multiple simulated chips to validate multi-chip software scale-out and scale-up approaches.\n\n - Work closely with our software teams in debugging early software deliverables.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"3da8034e-4639-44b0-99a4-aeec6ff9e59c","title":"Supercomputing Test Software Engineer (Taiwan)","department":"Software","team":"Software","employmentType":"FullTime","location":"Taipei","secondaryLocations":[],"publishedAt":"2025-10-29T19:49:50.506+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"Taiwan","addressCountry":"Taiwan","addressLocality":"Taipei"}},"jobUrl":"https://jobs.ashbyhq.com/etched/3da8034e-4639-44b0-99a4-aeec6ff9e59c","applyUrl":"https://jobs.ashbyhq.com/etched/3da8034e-4639-44b0-99a4-aeec6ff9e59c/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking highly motivated and detail-oriented Software Engineers to join our Supercomputing Testing team. This team plays a critical role in ensuring the reliability and stability of our highest-performance Inference server hardware and software. As a Software Engineer on this team, you will design, develop, and execute comprehensive supercomputing test suites, analyze test results, and collaborate with hardware and software engineering teams at Etched and our ODM partners to identify and resolve potential issues. You will be at the forefront of ensuring our server products meet the highest quality standards before they reach our customers.
Key Responsibilities
Design, develop, and implement automated supercomputing test suites using common scripting languages (Python, Go, Bash) and test frameworks across all aspects of System Operation including: boot sequences, root-of-trust, system management, workload deployment and performance.
Execute tests on server hardware, monitor system performance and health, and analyze test results.
Investigate and debug hardware and software failures identified during testing, providing detailed reports and mitigation plans.
Collaborate with internal and external hardware and software engineering teams to identify root causes of failures and implement corrective actions.
Contribute to the development and maintenance of the supercomputing testing infrastructure, including portable test environments and automation tools runnable in any environment.
Create and maintain comprehensive documentation for test plans, test cases, and test results.
Analyze system performance metrics to identify potential bottlenecks and areas for optimization.
Participate in continuous improvement efforts to enhance the efficiency and effectiveness of the testing process.
Representative projects
Develop automated test suites to stress-testing of Supercomputing AI subsystems under extreme at-scale workloads.
Design and implement fault injection tests to simulate hardware and software failures.
Create tools to monitor and analyze system performance metrics, such as CPU utilization, cross-socket memory performance and usage, and network latency.
Build and maintain a scalable testing environment capable of handling multiple server configurations.
Collaborate with hardware engineers to develop tests for new server features and components.
Contribute to the creation of Pod-level dashboards tracking system testing across hundreds of AI accelerators.
You may be a good fit if you have
Proficiency in at least one scripting language (e.g., Python, Bash, Go).
Experience with software testing methodologies and tools.
Strong understanding of operating systems (Linux preferred) and server hardware architectures.
Ability to analyze complex technical problems and provide effective solutions.
Excellent communication and collaboration skills.
Ability to work independently and as part of a team.
Experience with version control systems (e.g., Git).
Experience with reading and interpreting hardware logs.
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience with hardware burn-in testing or reliability testing.
Experience with performance testing and benchmarking tools.
Familiarity with hardware diagnostic tools and techniques.
Experience with CI/CD pipelines.
Knowledge of low level hardware communication protocols (i2c, etc.)
Experience with data analysis tools and techniques.
Benefits
Competitive compensation packages including generous equity packages
Comprehensive insurance coverage and other top-of-market benefits
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row) and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a highly skilled and motivated Supercomputing Software Engineer to join our team, responsible for the foundational software that powers our server infrastructure. This role focuses on the development, integration, and debugging of critical system software components, including BIOS, BMC firmware, boot processes (including NetBoot), root of trust implementations, advanced system logging, and kernel-mode drivers. You will play a pivotal role in ensuring the reliability, security, and performance of our server platforms, and contribute to the integration of data center orchestration technologies at the node level.
Key Team Responsibilities
Integrate and maintain BIOS and BMC firmware, ensuring robust and efficient server boot processes.
Analyze DRAM timings, PCIe configurations, power state transitions etc. to ensure high performance and maximal reliability.
Validating security features, including root of trust mechanisms, to protect system integrity and data security.
Design and implement advanced system logging and diagnostic capabilities to facilitate efficient troubleshooting and performance analysis.
Integrate and optimize node-level data center orchestration technologies, such as Kubernetes and Docker, into the system software stack.
Develop and execute comprehensive test plans to validate system software functionality, stability, and performance.
Collaborate with hardware and software teams to diagnose and resolve complex system-level issues.
Representative Projects
Implement and validate secure boot processes, including root of trust verification.
Design and implement advanced system logging and monitoring solutions.
Optimize BIOS and BMC firmware for improved boot times and system stability.
Integrate node-level container orchestration capabilities into the system software.
Analyze and resolve complex system-level issues related to boot failures, hardware errors, and performance degradation.
Analyze and optimize system level logging for large scale server deployments.
You may be a good fit if you have
Proficiency in C/C++ or Python.
Strong understanding of BIOS and BMC firmware architectures.
Experience with server boot processes.
Knowledge of root-of-trust and security principles.
Strong understanding of operating systems (Linux preferred) and server hardware architectures.
Experience with advanced system logging and diagnostic tools.
Ability to analyze complex technical problems and provide effective solutions.
Excellent communication and collaboration skills.
Experience with version control systems (e.g., Git).
Experience with reading and interpreting hardware logs.
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience with data center orchestration technologies (Kubernetes, Docker).
Experience with tracing tools like perf, eBPF, ftrace, etc.
Experience with performance testing and benchmarking tools (gProf, vTune, Wireshark, etc.).
Experience with CI/CD pipelines.
Experience with Rust.
Experience with kernel-mode driver development and debugging.
Benefits
Competitive compensation packages including generous equity packages
Comprehensive insurance coverage and other top-of-market benefits
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a highly skilled and motivated Supercomputing Software Engineer to join our team, responsible for the foundational software that powers our server infrastructure. This role focuses on the development, integration, and debugging of critical system software components, including BIOS, BMC firmware, boot processes (including NetBoot), root of trust implementations, advanced system logging, and kernel-mode drivers. You will play a pivotal role in ensuring the reliability, security, and performance of our server platforms, and contribute to the integration of data center orchestration technologies at the node level.\n\n\n\nKey Team Responsibilities\n\n - Integrate and maintain BIOS and BMC firmware, ensuring robust and efficient server boot processes.\n\n - Analyze DRAM timings, PCIe configurations, power state transitions etc. to ensure high performance and maximal reliability.\n\n - Validating security features, including root of trust mechanisms, to protect system integrity and data security.\n\n - Design and implement advanced system logging and diagnostic capabilities to facilitate efficient troubleshooting and performance analysis.\n\n - Integrate and optimize node-level data center orchestration technologies, such as Kubernetes and Docker, into the system software stack.\n\n - Develop and execute comprehensive test plans to validate system software functionality, stability, and performance.\n\n - Collaborate with hardware and software teams to diagnose and resolve complex system-level issues.\n\n\n\nRepresentative Projects\n\n - Implement and validate secure boot processes, including root of trust verification.\n\n - Design and implement advanced system logging and monitoring solutions.\n\n - Optimize BIOS and BMC firmware for improved boot times and system stability.\n\n - Integrate node-level container orchestration capabilities into the system software.\n\n - Analyze and resolve complex system-level issues related to boot failures, hardware errors, and performance degradation.\n\n - Analyze and optimize system level logging for large scale server deployments.\n\n\n\nYou may be a good fit if you have\n\n - Proficiency in C/C++ or Python.\n\n - Strong understanding of BIOS and BMC firmware architectures.\n\n - Experience with server boot processes.\n\n - Knowledge of root-of-trust and security principles.\n\n - Strong understanding of operating systems (Linux preferred) and server hardware architectures.\n\n - Experience with advanced system logging and diagnostic tools.\n\n - Ability to analyze complex technical problems and provide effective solutions.\n\n - Excellent communication and collaboration skills.\n\n - Experience with version control systems (e.g., Git).\n\n - Experience with reading and interpreting hardware logs.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Experience with data center orchestration technologies (Kubernetes, Docker).\n\n - Experience with tracing tools like perf, eBPF, ftrace, etc.\n\n - Experience with performance testing and benchmarking tools (gProf, vTune, Wireshark, etc.).\n\n - Experience with CI/CD pipelines.\n\n - Experience with Rust.\n\n - Experience with kernel-mode driver development and debugging.\n\n\n\nBenefits\n\n - Competitive compensation packages including generous equity packages\n\n - Comprehensive insurance coverage and other top-of-market benefits\n\n - Unlimited compute budget subject to ROI justification\n \n \n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed."},{"id":"3eb65028-9648-48f5-bfc9-94b3128863f2","title":"Firmware Engineer (Taiwan)","department":"Software","team":"Software","employmentType":"FullTime","location":"Taipei","secondaryLocations":[],"publishedAt":"2025-10-29T19:58:18.566+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"Taiwan","addressCountry":"Taiwan","addressLocality":"Taipei"}},"jobUrl":"https://jobs.ashbyhq.com/etched/3eb65028-9648-48f5-bfc9-94b3128863f2","applyUrl":"https://jobs.ashbyhq.com/etched/3eb65028-9648-48f5-bfc9-94b3128863f2/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Co-Develop cutting-edge software optimized across hardware and software driving the full potential of very large AI models.
Solve challenging problems across the full stack, from low-level drivers and APIs to high-level applications and frameworks.
Contribute to the development of AI solutions that will revolutionize industries like natural language processing, chain of reasoning automation, generative media.
You may be a good fit if you have
Bachelor's degree or equivalent practical experience.
3 years of experience in software development, and with data structures/algorithms.
3 years of experience developing and testing software on launching products.
3 years of experience with firmware design, implementation, and troubleshooting.
3 years of experience with embedded architectures, IO technologies (I2C, SPI, PCIe, DRAM etc.), as well as concepts like scalability, fault tolerance, and consistency.
Strong candidates may also have experience with (Nice-to-have qualifications)
Master’s degree Computer Science, or a related technical field.
Experience resolving customer-related issues.
Experience solving ambiguous problems.
Excellent verbal and written communication skills.
Benefits
Competitive compensation packages including generous equity packages
Comprehensive insurance coverage and other top-of-market benefits
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\n - Co-Develop cutting-edge software optimized across hardware and software driving the full potential of very large AI models.\n\n - Solve challenging problems across the full stack, from low-level drivers and APIs to high-level applications and frameworks.\n\n - Contribute to the development of AI solutions that will revolutionize industries like natural language processing, chain of reasoning automation, generative media.\n\n\n\nYou may be a good fit if you have\n\n - Bachelor's degree or equivalent practical experience.\n\n - 3 years of experience in software development, and with data structures/algorithms.\n\n - 3 years of experience developing and testing software on launching products.\n\n - 3 years of experience with firmware design, implementation, and troubleshooting.\n\n - 3 years of experience with embedded architectures, IO technologies (I2C, SPI, PCIe, DRAM etc.), as well as concepts like scalability, fault tolerance, and consistency.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Master’s degree Computer Science, or a related technical field.\n\n - Experience resolving customer-related issues.\n\n - Experience solving ambiguous problems.\n\n - Excellent verbal and written communication skills.\n\n\n\nBenefits\n\n - Competitive compensation packages including generous equity packages\n\n - Comprehensive insurance coverage and other top-of-market benefits\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed."},{"id":"69e75a95-6476-452d-bb41-86ac7ce52a98","title":"Performance Modeling Engineer","department":"Architecture","team":"Architecture","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-04-21T22:01:17.805+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/69e75a95-6476-452d-bb41-86ac7ce52a98","applyUrl":"https://jobs.ashbyhq.com/etched/69e75a95-6476-452d-bb41-86ac7ce52a98/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Key responsibilities
Develop comprehensive performance models and projections for our architecture across varying workloads and configurations
Profile and analyze deep learning workloads on our hardware to identify micro-architectural bottlenecks and influence optimization opportunities
Drive hardware/software co-optimization by identifying where architectural features can unlock performance improvements
Run regressions and validate performance models against real systems and silicon
Inform next-generation architectural decisions by pathfinding across system and silicon options during design, proof-of-concept, and architecting phases
You may be a good fit if you have at least one of the following:
Strong performance modeling and analysis skills with experience building analytical-based or simulation-based performance models
Solid understanding of computer architecture and micro-architecture, particularly for accelerators
Experience profiling and analyzing deep learning workloads on hardware accelerators (GPUs, TPUs, ASICs, FPGAs, or others)
Solid software engineering fundamentals with an eye toward auditability and maintainability
Strong candidates may also have
Deep knowledge of GPU architectures and/or programming models like CUDA
Experience mapping models to multi-chip inference systems
Familiarity with transformer model architectures and inference serving optimizations
Experience with architecture simulators and performance modeling tools (gem5, trace-driven simulators, custom models)
Exposure to ASIC, FPGA, or CGRA-based accelerator development and hardware/software co-design principles
Published research in computer architecture, ML systems, or hardware acceleration
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nKey responsibilities\n\n - Develop comprehensive performance models and projections for our architecture across varying workloads and configurations\n\n - Profile and analyze deep learning workloads on our hardware to identify micro-architectural bottlenecks and influence optimization opportunities\n\n - Drive hardware/software co-optimization by identifying where architectural features can unlock performance improvements\n\n - Run regressions and validate performance models against real systems and silicon\n\n - Inform next-generation architectural decisions by pathfinding across system and silicon options during design, proof-of-concept, and architecting phases\n\n\n\nYou may be a good fit if you have at least one of the following:\n\n - Strong performance modeling and analysis skills with experience building analytical-based or simulation-based performance models\n\n - Solid understanding of computer architecture and micro-architecture, particularly for accelerators\n\n - Experience profiling and analyzing deep learning workloads on hardware accelerators (GPUs, TPUs, ASICs, FPGAs, or others)\n\n - Solid software engineering fundamentals with an eye toward auditability and maintainability\n\n\n\nStrong candidates may also have\n\n - Deep knowledge of GPU architectures and/or programming models like CUDA\n\n - Experience mapping models to multi-chip inference systems\n\n - Familiarity with transformer model architectures and inference serving optimizations\n\n - Experience with architecture simulators and performance modeling tools (gem5, trace-driven simulators, custom models)\n\n - Exposure to ASIC, FPGA, or CGRA-based accelerator development and hardware/software co-design principles\n\n - Published research in computer architecture, ML systems, or hardware acceleration\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"a3f5858a-4a34-4712-802c-315352d88156","title":"EE Hardware System Engineer (TW)","department":"Platform","team":"Platform","employmentType":"FullTime","location":"Taipei","secondaryLocations":[],"publishedAt":"2026-09-23T09:57:49.327+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"Taiwan","addressCountry":"Taiwan","addressLocality":"Taipei"}},"jobUrl":"https://jobs.ashbyhq.com/etched/a3f5858a-4a34-4712-802c-315352d88156","applyUrl":"https://jobs.ashbyhq.com/etched/a3f5858a-4a34-4712-802c-315352d88156/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. Co-designing chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is looking for exceptional hardware system engineers to join our team. The candidate will be responsible for schematic design for our accelerator module, and will help us pave the way for manufacturing scale.
Key Responsibilities
Lead board development for Etched’s accelerator systems
Work with Signal Integrity, PCB, and Mechanical Engineering to solve system level design problems
Collaborate with ODMs/OEMs on system requirements, including bringup and validation plans
Understand datacenter customer requirements and ensure our servers meet them
Bring up of system base board and mezzanine card
Create and manage PCBA documentation including BOMs and special assembly processes
Define test plans and test equipment for bring-up and manufacturing
You may be a good fit if you have (Must-have qualifications)
5-10 years of experience in complex server/switch system design and development
Extensive experience on 100G Ethernet, PCIe Gen5, I2C, SPI, UART interfaces
Familiar with modern AI/datacenter system architecture
Proven track record of designing systems alongside silicon
Deep understanding of datacenter needs, especially with respect to high power (>10 kW) AI servers
Benefits
Competitive compensation packages, including generous equity packages
Comprehensive insurance coverage and other top-of-market benefits
How We’re Different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. Co-designing chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched is looking for exceptional hardware system engineers to join our team. The candidate will be responsible for schematic design for our accelerator module, and will help us pave the way for manufacturing scale.\n\n\n\nKey Responsibilities\n\n - Lead board development for Etched’s accelerator systems\n\n - Work with Signal Integrity, PCB, and Mechanical Engineering to solve system level design problems\n\n - Collaborate with ODMs/OEMs on system requirements, including bringup and validation plans\n\n - Understand datacenter customer requirements and ensure our servers meet them\n\n - Bring up of system base board and mezzanine card\n\n - Create and manage PCBA documentation including BOMs and special assembly processes\n\n - Define test plans and test equipment for bring-up and manufacturing\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - 5-10 years of experience in complex server/switch system design and development\n\n - Extensive experience on 100G Ethernet, PCIe Gen5, I2C, SPI, UART interfaces\n\n - Familiar with modern AI/datacenter system architecture\n\n - Proven track record of designing systems alongside silicon\n\n - Deep understanding of datacenter needs, especially with respect to high power (>10 kW) AI servers\n\n\n\nBenefits\n\n - Competitive compensation packages, including generous equity packages\n\n - Comprehensive insurance coverage and other top-of-market benefits\n\n\n\nHow We’re Different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n"},{"id":"c5c989ba-020e-4690-a14b-1f5cf85219ba","title":"Thermal Lab Lead","department":"Operations","team":"Operations","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-19T18:43:41.607+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/c5c989ba-020e-4690-a14b-1f5cf85219ba","applyUrl":"https://jobs.ashbyhq.com/etched/c5c989ba-020e-4690-a14b-1f5cf85219ba/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a highly motivated person to join our team as Thermal Lab Lead where you will help build and maintain a world class thermal lab to support the testing of all the thermal assemblies of our high-performance data center products. You will play a key role in the development lifecycle of Etched products, interfacing with engineers and enabling the testing and validation of cutting edge thermal designs. You will also work closely with lab operations on future lab build outs and deployment of CDUs and liquid cooled racks. You will interface with thermal technicians, plan, and delegate tests to meet aggressive timelines. This position requires very high hands-on ownership, attention to detail, and excellent organizational skills to support continuous high speed growth.
Key responsibilities
Lead day-to-day thermal lab operations, including test benches, equipment, and consumables inventory.
Develop test plans and procedures in partnership with thermal engineering.
Own test setup, instrumentation, execution, data-quality review, and reporting against agreed objectives and acceptance criteria.
Develop, maintain, and validate automation tools for test execution, data acquisition, and data reduction and analysis.
Coordinate testing requests across multiple teams, establish priorities with stakeholders, and forecast equipment, capacity, and staffing bottlenecks.
Lead thermal technicians, assign testing activities, provide technical guidance, and review completed work.
Maintain lab procedures and coordinate equipment maintenance, calibration, and safe operating practices with lab operations.
Partner with lab operations to plan future lab capabilities, equipment, and infrastructure.
Assist with the installation, integration, and commissioning of primary and secondary cooling loops in partnership with facilities, lab operations, equipment vendors, and qualified contractors.
Assemble thermal test vehicles, including wiring and soldering of PCBs and heaters.
Commission CDUs and liquid-cooled racks to support lab testing.
Assist in the design and buildout of Etched thermal labs in Taiwan.
You may be a good fit if you have
Relevant technical education—such as an associate’s degree, technical diploma, or bachelor’s degree in engineering, engineering technology, mechatronics, instrumentation, or a related field—or equivalent hands-on experience.
Hands-on experience testing single-phase liquid-cooled assemblies, including cold plates, manifolds, quick disconnects, and CDUs.
Experience selecting, installing, and troubleshooting instrumentation such as flowmeters, thermocouples, and pressure transducers, as well as operating chillers and liquid-cooling test equipment.
Demonstrated ability to independently build and troubleshoot test setups, assess measurement quality, and document reliable results.
Working knowledge of heat transfer and fluid flow sufficient to interpret test results and troubleshoot thermal-fluid systems.
Experience developing, debugging, and validating test automation and data-analysis workflows.
Experience coordinating competing testing priorities and providing technical direction to technicians.
Excellent organizational and documentation skills.
We encourage you to apply even if you do not believe you meet every single qualification.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a highly motivated person to join our team as Thermal Lab Lead where you will help build and maintain a world class thermal lab to support the testing of all the thermal assemblies of our high-performance data center products. You will play a key role in the development lifecycle of Etched products, interfacing with engineers and enabling the testing and validation of cutting edge thermal designs. You will also work closely with lab operations on future lab build outs and deployment of CDUs and liquid cooled racks. You will interface with thermal technicians, plan, and delegate tests to meet aggressive timelines. This position requires very high hands-on ownership, attention to detail, and excellent organizational skills to support continuous high speed growth.\n\n\n\nKey responsibilities\n\n - Lead day-to-day thermal lab operations, including test benches, equipment, and consumables inventory.\n\n - Develop test plans and procedures in partnership with thermal engineering.\n\n - Own test setup, instrumentation, execution, data-quality review, and reporting against agreed objectives and acceptance criteria.\n\n - Develop, maintain, and validate automation tools for test execution, data acquisition, and data reduction and analysis.\n\n - Coordinate testing requests across multiple teams, establish priorities with stakeholders, and forecast equipment, capacity, and staffing bottlenecks.\n\n - Lead thermal technicians, assign testing activities, provide technical guidance, and review completed work.\n\n - Maintain lab procedures and coordinate equipment maintenance, calibration, and safe operating practices with lab operations.\n\n - Partner with lab operations to plan future lab capabilities, equipment, and infrastructure.\n\n - Assist with the installation, integration, and commissioning of primary and secondary cooling loops in partnership with facilities, lab operations, equipment vendors, and qualified contractors.\n\n - Assemble thermal test vehicles, including wiring and soldering of PCBs and heaters.\n\n - Commission CDUs and liquid-cooled racks to support lab testing.\n\n - Assist in the design and buildout of Etched thermal labs in Taiwan.\n\n\n\nYou may be a good fit if you have\n\n - Relevant technical education—such as an associate’s degree, technical diploma, or bachelor’s degree in engineering, engineering technology, mechatronics, instrumentation, or a related field—or equivalent hands-on experience.\n\n - Hands-on experience testing single-phase liquid-cooled assemblies, including cold plates, manifolds, quick disconnects, and CDUs.\n\n - Experience selecting, installing, and troubleshooting instrumentation such as flowmeters, thermocouples, and pressure transducers, as well as operating chillers and liquid-cooling test equipment.\n\n - Demonstrated ability to independently build and troubleshoot test setups, assess measurement quality, and document reliable results.\n\n - Working knowledge of heat transfer and fluid flow sufficient to interpret test results and troubleshoot thermal-fluid systems.\n\n - Experience developing, debugging, and validating test automation and data-analysis workflows.\n\n - Experience coordinating competing testing priorities and providing technical direction to technicians.\n\n - Excellent organizational and documentation skills.\n\nWe encourage you to apply even if you do not believe you meet every single qualification.\n\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"27e5bd6b-9357-45f0-9e79-cfa2bf4eeba8","title":"Chip Simulation Software Intern","department":"Software","team":"Software","employmentType":"Intern","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-05-19T22:27:54.640+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/27e5bd6b-9357-45f0-9e79-cfa2bf4eeba8","applyUrl":"https://jobs.ashbyhq.com/etched/27e5bd6b-9357-45f0-9e79-cfa2bf4eeba8/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
The roles
Our chip simulation and tooling role will co-design, develop, and test simulations of our custom hardware and tools that engineers use to analyze those systems. You will be working at the cutting edge of hardware innovation, closely coordinating with both software and hardware teams across their whole development path. We are looking for Spring '27, and Summer '27 interns.
You may be a good fit if you have
Progress towards a Bachelor’s, Master’s, or PhD degree in Computer Science, Engineering, or a related technical field.
Proficiency in C/C++ or Rust
Strong fundamentals in data structures and algorithms
Strong understanding of low-level software engineering
Strong understanding of hardware/software co-design
Excellent communication and collaboration skills
Strong candidates may also have (Nice to have qualifications)
Experience with Linux internals, kernel development, or driver debugging
Experience with hardware diagnostics or interpreting hardware logs
Exposure to server virtualization or CI/CD pipelines
Experience with Rust or embedded development
We encourage you to apply even if you do not believe you meet every qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nThe roles\n\nOur chip simulation and tooling role will co-design, develop, and test simulations of our custom hardware and tools that engineers use to analyze those systems. You will be working at the cutting edge of hardware innovation, closely coordinating with both software and hardware teams across their whole development path. We are looking for Spring '27, and Summer '27 interns.\n\n\n\nYou may be a good fit if you have\n\n - Progress towards a Bachelor’s, Master’s, or PhD degree in Computer Science, Engineering, or a related technical field.\n\n - Proficiency in C/C++ or Rust\n\n - Strong fundamentals in data structures and algorithms\n\n - Strong understanding of low-level software engineering\n\n - Strong understanding of hardware/software co-design\n\n - Excellent communication and collaboration skills\n\n\n\nStrong candidates may also have (Nice to have qualifications)\n\n - Experience with Linux internals, kernel development, or driver debugging\n\n - Experience with hardware diagnostics or interpreting hardware logs\n\n - Exposure to server virtualization or CI/CD pipelines\n\n - Experience with Rust or embedded development\n\nWe encourage you to apply even if you do not believe you meet every qualification.\n\n\n\nProgram details\n\n - 12-week paid internship\n\n - Generous housing support for those relocating\n\n - Daily lunch and dinner in our office\n\n - Based at our office in San Jose, CA\n\n - Direct mentorship from industry leaders and world-class engineers\n\n - Opportunity to work on one of the most important problems of our time\n\n\nFor any questions, contact internships@etched.com\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"699f3ab2-07e4-466c-9d76-3d4a3abb4ebc","title":"Firmware Intern","department":"Software","team":"Software","employmentType":"Intern","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-02-07T01:19:52.199+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/699f3ab2-07e4-466c-9d76-3d4a3abb4ebc","applyUrl":"https://jobs.ashbyhq.com/etched/699f3ab2-07e4-466c-9d76-3d4a3abb4ebc/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
In our firmware role, you will help develop firmware for our chips, designed to run large AI models efficiently. You’ll work across the stack—from low-level drivers, hardware interfaces, and system initialization code to integration with runtime libraries and model-execution frameworks. Your work will focus on making the hardware operate reliably and at peak performance, enabling high-throughput inference and training workloads. You’ll collaborate with hardware, architecture, and software teams to bring up new silicon, validate features, and support real-world AI applications. We are looking for Spring '27, and Summer '27 interns.
You may be a good fit if you have
Progress towards a Bachelor’s, Master’s, or PhD degree in Computer Science, Engineering, or a related technical field.
Proficiency in C/C++ or Rust
Strong fundamentals in data structures and algorithms
Strong understanding of low-level software engineering
Strong understanding of hardware/software co-design
Excellent communication and collaboration skills
Strong candidates may also have (Nice to have qualifications)
Experience with Linux internals, kernel development, or driver debugging
Experience with hardware diagnostics or interpreting hardware logs
Exposure to server virtualization or CI/CD pipelines
Experience with Rust or embedded development
We encourage you to apply even if you do not believe you meet every qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nIn our firmware role, you will help develop firmware for our chips, designed to run large AI models efficiently. You’ll work across the stack—from low-level drivers, hardware interfaces, and system initialization code to integration with runtime libraries and model-execution frameworks. Your work will focus on making the hardware operate reliably and at peak performance, enabling high-throughput inference and training workloads. You’ll collaborate with hardware, architecture, and software teams to bring up new silicon, validate features, and support real-world AI applications. We are looking for Spring '27, and Summer '27 interns.\n\n\n\nYou may be a good fit if you have\n\n - Progress towards a Bachelor’s, Master’s, or PhD degree in Computer Science, Engineering, or a related technical field.\n\n - Proficiency in C/C++ or Rust\n\n - Strong fundamentals in data structures and algorithms\n\n - Strong understanding of low-level software engineering\n\n - Strong understanding of hardware/software co-design\n\n - Excellent communication and collaboration skills\n\n\n\nStrong candidates may also have (Nice to have qualifications)\n\n - Experience with Linux internals, kernel development, or driver debugging\n\n - Experience with hardware diagnostics or interpreting hardware logs\n\n - Exposure to server virtualization or CI/CD pipelines\n\n - Experience with Rust or embedded development\n\nWe encourage you to apply even if you do not believe you meet every qualification.\n\n\n\nProgram details\n\n - 12-week paid internship\n\n - Generous housing support for those relocating\n\n - Daily lunch and dinner in our office\n\n - Based at our office in San Jose, CA\n\n - Direct mentorship from industry leaders and world-class engineers\n\n - Opportunity to work on one of the most important problems of our time\n\n\nFor any questions, contact internships@etched.com\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"f05e3218-5ec7-41d1-bc99-bb7014422229","title":"Mechanical / Thermal Intern","department":"Platform","team":"Platform","employmentType":"Intern","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-02-07T01:28:30.536+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/f05e3218-5ec7-41d1-bc99-bb7014422229","applyUrl":"https://jobs.ashbyhq.com/etched/f05e3218-5ec7-41d1-bc99-bb7014422229/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Our mechanical/thermal engineering interns will work within the mechanical and thermal engineering organization, with a strong focus on NPI prototyping, manufacturing fixture development, liquid cooling technologies and rack-level system development
Our Platform Team is building the full-stack system that supports Etched Silicon from PCB to Rack. We are seeking interns to work across all aspects of mechanical and electrical engineering to design the future of high power ASIC systems. We are looking for Spring '27, and Summer '27 interns.
You may be a good fit if you have
Progress towards a Bachelor’s or Master’s in Mechanical Engineering, Computer Engineering, or related field
Experience building real mechanical systems, boards, or other hands-on projects.
Knowledge of board design cycle, high-speed interconnects, power delivery, and system integration.
We encourage you to apply even if you do not believe you meet every qualification.
Program details:
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
How We're Different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nOur mechanical/thermal engineering interns will work within the mechanical and thermal engineering organization, with a strong focus on NPI prototyping, manufacturing fixture development, liquid cooling technologies and rack-level system development\n\nOur Platform Team is building the full-stack system that supports Etched Silicon from PCB to Rack. We are seeking interns to work across all aspects of mechanical and electrical engineering to design the future of high power ASIC systems. We are looking for Spring '27, and Summer '27 interns.\n\n\n\nYou may be a good fit if you have\n\n - Progress towards a Bachelor’s or Master’s in Mechanical Engineering, Computer Engineering, or related field\n\n - Experience building real mechanical systems, boards, or other hands-on projects.\n\n - Knowledge of board design cycle, high-speed interconnects, power delivery, and system integration.\n\nWe encourage you to apply even if you do not believe you meet every qualification.\n\n\n\nProgram details:\n\n - 12-week paid internship\n\n - Generous housing support for those relocating\n\n - Daily lunch and dinner in our office\n\n - Based at our office in San Jose, CA\n\n - Direct mentorship from industry leaders and world-class engineers\n\n - Opportunity to work on one of the most important problems of our time\n\n\nFor any questions, contact internships@etched.com\n\n\n\nHow We're Different\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"dacedaca-c4ca-4964-85a7-8df1738005bb","title":"DV Intern","department":"ASIC","team":"ASIC","employmentType":"Intern","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-02-07T01:26:37.548+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/dacedaca-c4ca-4964-85a7-8df1738005bb","applyUrl":"https://jobs.ashbyhq.com/etched/dacedaca-c4ca-4964-85a7-8df1738005bb/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a Design Verification intern, you will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack. We are looking for Spring '27, and Summer '27 interns.
You may be a good fit if you have
Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.
Familiarity with high-speed digital logic
Exposure to ASIC or SoC design concepts
Familiarity with SystemVerilog, UVM, or Python
Familiarity with verification work and writing test benches
Familiarity with physical design flows and tooling
Are able to learn quickly about transformers and other aspects of modern artificial intelligence
Strong candidates may also have experience with
Familiarity with modern ML and LLM model architectures
UVM or formal verification experience
Ability to program with Python or another scripting language
We encourage you to apply even if you do not believe you meet every single qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nAs a Design Verification intern, you will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack. We are looking for Spring '27, and Summer '27 interns.\n\n\n\nYou may be a good fit if you have\n\n - Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.\n\n - Familiarity with high-speed digital logic\n\n - Exposure to ASIC or SoC design concepts\n\n - Familiarity with SystemVerilog, UVM, or Python\n\n - Familiarity with verification work and writing test benches\n\n - Familiarity with physical design flows and tooling\n\n - Are able to learn quickly about transformers and other aspects of modern artificial intelligence\n \n \n\nStrong candidates may also have experience with\n\n - Familiarity with modern ML and LLM model architectures\n\n - UVM or formal verification experience\n\n - Ability to program with Python or another scripting language\n\nWe encourage you to apply even if you do not believe you meet every single qualification.\n\n\n\nProgram details\n\n - 12-week paid internship\n\n - Generous housing support for those relocating\n\n - Daily lunch and dinner in our office\n\n - Based at our office in San Jose, CA\n\n - Direct mentorship from industry leaders and world-class engineers\n\n - Opportunity to work on one of the most important problems of our time\n\n\n\nFor any questions, contact internships@etched.com\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"bd8c5768-7efa-4a18-9e56-485ccaf4ec77","title":"PD Intern","department":"ASIC","team":"ASIC","employmentType":"Intern","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-05-19T22:31:56.771+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/bd8c5768-7efa-4a18-9e56-485ccaf4ec77","applyUrl":"https://jobs.ashbyhq.com/etched/bd8c5768-7efa-4a18-9e56-485ccaf4ec77/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a Physical Design intern for Etched, you will be responsible for realizing our front-end designs in silicon, helping Etched to improve iteration speed to final signoff. You will assist in developing and running Physical Design flows to synthesize blocks, automate final design checks, and advise RTL design decisions. We are looking for Spring '27, and Summer '27 interns.
You may be a good fit if you have
Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.
Familiarity with high-speed digital logic
Exposure to ASIC or SoC design concepts
Familiarity with SystemVerilog, UVM, or Python
Familiarity with verification work and writing test benches
Familiarity with physical design flows and tooling
Are able to learn quickly about transformers and other aspects of modern artificial intelligence
Strong candidates may also have experience with
Familiarity with modern ML and LLM model architectures
Familiarity with numerical representations and functions (RTL)
Familiarity with clocking and reset schemes (RTL/PD)
UVM or formal verification experience (DV)
Ability to program with Python or another scripting language
We encourage you to apply even if you do not believe you meet every single qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nAs a Physical Design intern for Etched, you will be responsible for realizing our front-end designs in silicon, helping Etched to improve iteration speed to final signoff. You will assist in developing and running Physical Design flows to synthesize blocks, automate final design checks, and advise RTL design decisions. We are looking for Spring '27, and Summer '27 interns.\n\n\n\nYou may be a good fit if you have\n\n - Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.\n\n - Familiarity with high-speed digital logic\n\n - Exposure to ASIC or SoC design concepts\n\n - Familiarity with SystemVerilog, UVM, or Python\n\n - Familiarity with verification work and writing test benches\n\n - Familiarity with physical design flows and tooling\n\n - Are able to learn quickly about transformers and other aspects of modern artificial intelligence\n\n\n\nStrong candidates may also have experience with\n\n - Familiarity with modern ML and LLM model architectures\n\n - Familiarity with numerical representations and functions (RTL)\n\n - Familiarity with clocking and reset schemes (RTL/PD)\n\n - UVM or formal verification experience (DV)\n\n - Ability to program with Python or another scripting language\n\nWe encourage you to apply even if you do not believe you meet every single qualification.\n\n\n\nProgram details\n\n - 12-week paid internship\n\n - Generous housing support for those relocating\n\n - Daily lunch and dinner in our office\n\n - Based at our office in San Jose, CA\n\n - Direct mentorship from industry leaders and world-class engineers\n\n - Opportunity to work on one of the most important problems of our time\n\n\n\nFor any questions, contact internships@etched.com\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"904ddf46-55fc-4a8f-8b49-f32cfe88116a","title":"Electrical Platform Intern","department":"Platform","team":"Platform","employmentType":"Intern","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-02-07T01:29:58.073+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/904ddf46-55fc-4a8f-8b49-f32cfe88116a","applyUrl":"https://jobs.ashbyhq.com/etched/904ddf46-55fc-4a8f-8b49-f32cfe88116a/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Our electrical engineering interns will work on both hands-on product design and the development of design and validation infrastructure to design boards that will support bleeding edge systems and silicon.
Our Platform Team is building the full-stack system that supports Etched Silicon from PCB to Rack. We are seeking interns to work across all aspects of mechanical and electrical engineering to design the future of high power ASIC systems. We are looking for Spring '27, and Summer '27 interns.
You may be a good fit if you have
Progress towards a Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, or related field
Experience building real mechanical systems, boards, or other hands-on projects.
Knowledge of board design cycle, high-speed interconnects, power delivery, and system integration.
We encourage you to apply even if you do not believe you meet every qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nOur electrical engineering interns will work on both hands-on product design and the development of design and validation infrastructure to design boards that will support bleeding edge systems and silicon.\n\nOur Platform Team is building the full-stack system that supports Etched Silicon from PCB to Rack. We are seeking interns to work across all aspects of mechanical and electrical engineering to design the future of high power ASIC systems. We are looking for Spring '27, and Summer '27 interns.\n\n\n\nYou may be a good fit if you have\n\n - Progress towards a Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, or related field\n\n - Experience building real mechanical systems, boards, or other hands-on projects.\n\n - Knowledge of board design cycle, high-speed interconnects, power delivery, and system integration.\n\nWe encourage you to apply even if you do not believe you meet every qualification.\n\n\n\nProgram details\n\n - 12-week paid internship\n\n - Generous housing support for those relocating\n\n - Daily lunch and dinner in our office\n\n - Based at our office in San Jose, CA\n\n - Direct mentorship from industry leaders and world-class engineers\n\n - Opportunity to work on one of the most important problems of our time\n\n\nFor any questions, contact internships@etched.com\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"7f89eb44-b816-470a-953f-3fc1dc09b280","title":"General Ledger Accountant, Payroll","department":"Finance","team":"Finance","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-09T22:16:29.229+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/7f89eb44-b816-470a-953f-3fc1dc09b280","applyUrl":"https://jobs.ashbyhq.com/etched/7f89eb44-b816-470a-953f-3fc1dc09b280/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are hiring a General Ledger Accountant, Payroll to own critical elements of our financial close and ensure accurate accounting for payroll, benefits, and related compensation expenses. This role sits at the intersection of People Operations and Accounting, with direct ownership over payroll accruals, reconciliations, compliance, and internal controls.
You will partner closely with People Ops and Finance to ensure compensation activity is accurately recorded in the general ledger and supported by strong documentation and controls. You will own the payroll and benefits close process while helping design systems and workflows that scale as the company grows across entities and jurisdictions. This is a hands-on role requiring strong attention to detail, comfort operating in a fast-scaling environment, and a clear understanding of how payroll and benefits activity impacts financial reporting.
Key Responsibilities
Own and lead the payroll and benefits accounting close process, ensuring accurate accruals, reconciliations, reporting, and strong internal controls over employee compensation and related expenses
Reconcile payroll reports from third-party providers to the general ledger
Prepare and post payroll journal entries, including accruals for bonuses, commissions, and PTO
Reconcile benefits portal data to payroll deductions
Review and reconcile carrier invoices to ensure accuracy of employer and employee contributions
Investigate and resolve discrepancies between HRIS, payroll providers, benefits portals, and ERP
Prepare payroll-related account reconciliations and maintain supporting documentation
Maintain organized payroll and benefits documentation to support internal reviews and audits
Ensure payroll changes, including new hires, terminations, compensation updates, and bonus payments, have proper approval and supporting documentation
Maintain up-to-date process documentation for payroll and benefits workflows
Support periodic internal control reviews and testing
Maintain accurate configuration of earnings codes, deduction codes, tax settings, and pay groups within payroll systems
Support integration between payroll platforms, HRIS, benefits portals, and other connected systems
Support system setup for new states, entities, and pay frequencies as the company expands
Standardize payroll processes to reduce manual intervention and improve efficiency
Maintain payroll tax registrations across federal, state, and local jurisdictions
Track and monitor payroll tax filings prepared by third-party payroll providers
Coordinate state unemployment insurance registrations and rate updates
Support new state registrations as the company expands into additional jurisdictions
Assist with year-end reporting processes, including W-2 reconciliation and distribution oversight
Coordinate responses to payroll tax notices from government agencies
Coordinate with HR on new hires, terminations, compensation changes, and benefit elections to ensure payroll accuracy
Review and validate HR-provided employee data prior to payroll processing
Assist in resolving employee payroll and benefits inquiries in collaboration with HR
You may be a good fit if you have
3 to 5+ years of general accounting experience with ownership of payroll and benefits close processes
Proficiency with ERP systems such as NetSuite, SAP, Oracle, or equivalent, and experience scaling systems in a high-growth environment
Bachelor’s degree in Accounting, Finance, or a related field
Strong communication and relationship-building skills to work effectively across departments
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\nWe are hiring a General Ledger Accountant, Payroll to own critical elements of our financial close and ensure accurate accounting for payroll, benefits, and related compensation expenses. This role sits at the intersection of People Operations and Accounting, with direct ownership over payroll accruals, reconciliations, compliance, and internal controls.\n\n\n\nYou will partner closely with People Ops and Finance to ensure compensation activity is accurately recorded in the general ledger and supported by strong documentation and controls. You will own the payroll and benefits close process while helping design systems and workflows that scale as the company grows across entities and jurisdictions. This is a hands-on role requiring strong attention to detail, comfort operating in a fast-scaling environment, and a clear understanding of how payroll and benefits activity impacts financial reporting.\n\n\n\nKey Responsibilities\n\n - Own and lead the payroll and benefits accounting close process, ensuring accurate accruals, reconciliations, reporting, and strong internal controls over employee compensation and related expenses\n\n - Reconcile payroll reports from third-party providers to the general ledger\n\n - Prepare and post payroll journal entries, including accruals for bonuses, commissions, and PTO\n\n - Reconcile benefits portal data to payroll deductions\n\n - Review and reconcile carrier invoices to ensure accuracy of employer and employee contributions\n\n - Investigate and resolve discrepancies between HRIS, payroll providers, benefits portals, and ERP\n\n - Prepare payroll-related account reconciliations and maintain supporting documentation\n\n - Maintain organized payroll and benefits documentation to support internal reviews and audits\n\n - Ensure payroll changes, including new hires, terminations, compensation updates, and bonus payments, have proper approval and supporting documentation\n\n - Maintain up-to-date process documentation for payroll and benefits workflows\n\n - Support periodic internal control reviews and testing\n\n - Maintain accurate configuration of earnings codes, deduction codes, tax settings, and pay groups within payroll systems\n\n - Support integration between payroll platforms, HRIS, benefits portals, and other connected systems\n\n - Support system setup for new states, entities, and pay frequencies as the company expands\n\n - Standardize payroll processes to reduce manual intervention and improve efficiency\n\n - Maintain payroll tax registrations across federal, state, and local jurisdictions\n\n - Track and monitor payroll tax filings prepared by third-party payroll providers\n\n - Coordinate state unemployment insurance registrations and rate updates\n\n - Support new state registrations as the company expands into additional jurisdictions\n\n - Assist with year-end reporting processes, including W-2 reconciliation and distribution oversight\n\n - Coordinate responses to payroll tax notices from government agencies\n\n - Coordinate with HR on new hires, terminations, compensation changes, and benefit elections to ensure payroll accuracy\n\n - Review and validate HR-provided employee data prior to payroll processing\n\n - Assist in resolving employee payroll and benefits inquiries in collaboration with HR\n\n\n\nYou may be a good fit if you have\n\n - 3 to 5+ years of general accounting experience with ownership of payroll and benefits close processes\n\n - Proficiency with ERP systems such as NetSuite, SAP, Oracle, or equivalent, and experience scaling systems in a high-growth environment\n\n - Bachelor’s degree in Accounting, Finance, or a related field\n\n - Strong communication and relationship-building skills to work effectively across departments\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"5bbcfd60-5917-4698-a7fc-d7e6bb16da62","title":"Security Engineer","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-02-18T21:27:42.200+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/5bbcfd60-5917-4698-a7fc-d7e6bb16da62","applyUrl":"https://jobs.ashbyhq.com/etched/5bbcfd60-5917-4698-a7fc-d7e6bb16da62/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
At Etched, building and maintaining a secure yet friction-free computing environment is central to our mission. As a Security Engineer, you will protect the networks, systems, and applications that enable our engineers to push the limits of AI hardware. You will design, implement, and operate the monitoring, detection, and response infrastructure that safeguards Etched’s intellectual property, high-performance compute clusters, and developer workflows across both on-prem and cloud environments. You will partner with infrastructure, IT, application, and external provider teams to build systems that are secure by design, resilient under pressure, and seamless and easy to use for the end users.
This role combines hands-on technical depth with a focus on scalability and automation. You will take ownership of Etched’s security posture across infrastructure, IT, and applications, driving proactive threat detection, real-time monitoring, and rapid incident response. Your decisions will always balance maintaining full firm-wide velocity while improving our security and defense posture. You will develop tools, automation, and workflows that evolve with our rapidly growing and expanding footprint and ensure that security enhances, rather than hinders, innovation. If you are motivated by precision, ownership, and impact, you will find Etched the ideal place to advance your craft and contribute to the future of AI computing.
Key Responsibilities
Manage and harden security baselines across on-prem, hybrid, and cloud systems, ensuring strong protection while maintaining speed and usability.
Integrate telemetry, logging, tracing, and management of structured, semi-structured, and unstructured data across the entire environment to provide unified and comprehensive observability into infrastructure and application activity.
Lead vulnerability management, patching, and configuration assurance programs to reduce exposure and maintain a consistent security posture.
Partner with infrastructure, IT, and application teams to strengthen identity, access, and network security through Okta, Google Workspace, and FreeIPA.
Implement and maintain zero-trust network architectures, SASE controls, CASB solutions, and conditional access policies that protect both users and data across environments to ensure full access and full control of our data and IP regardless of location or device.
Operate and enhance security operations tooling, including SIEM, SOAR, and EDR/XDR platforms, to ensure comprehensive monitoring and rapid detection of threats.
Develop and tune detection logic, automation, and playbooks for identifying and responding to threats such as insider activity, lateral movement, and anomalous behavior.
Investigate and respond to security incidents, performing root-cause analysis, containment, and remediation while coordinating with engineering and IT.
Build automation, scripts, AI agents, and integrations that streamline monitoring, alerting, and remediation workflows to improve efficiency and reliability.
Establish metrics, dashboards, and feedback mechanisms to measure detection coverage, response time, and overall security health.
Promote a culture of security awareness and ownership across engineering teams, ensuring that protection and productivity advance together.
Representative Projects
Implementing a centralized security telemetry pipeline that aggregates logs and signals from networks, compute clusters, storage, endpoints devices, build systems, and cloud services into a unified SIEM for improved detection coverage.
Designing and developing Security Orchestration, Automation, and Response (SOAR) workflows to automate repetitive tasks like alert triage, data gathering, and initial containment, which improves SOC efficiency.
Help build a secure and flexible end user access framework that uses SDWAN, SASE, CASB, conditional access, EDR and XDR, and MDM/MAM to support productive, friction-free and secure work from any location using different devices.
Network Security Monitoring: Configuring and monitoring network intrusion detection/prevention systems (IDS/IPS) and firewalls to detect anomalies in network traffic, especially on the SDWAN and client VPN links
Creating and refining detailed, documented incident response plans and playbooks tailored to specific scenarios, such as a breach in a lab environment or a compromised silicon testing machine.
Conducting regular vulnerability assessments and penetration testing on internal systems and applications, then coordinating with relevant teams to manage and remediate identified weaknesses.
You May Be a Good Fit If You Have
5-7+ years of experience in security engineering, SOC operations, detection engineering, incident response, or a similar role that blends hands-on technical work with analytical problem solving.
Strong software engineering skills with Python, Go, Bash, (C and Rust a major plus), including the ability to design, implement, and maintain high-quality code, automation frameworks, services, and integrations that improve security, observability, and operational efficiency.
Proficiency with SIEM and SOAR platforms, including experience building detections, dashboards, and automated workflows.
Deep understanding of EDR and XDR platforms, endpoint security hardening, and telemetry collection across macOS, Linux, Windows, and server environments.
Experience implementing or supporting zero trust architectures, including conditional access, SASE, CASB, and identity-driven access control models.
Familiarity with IAM and SSO systems such as Okta, Google Workspace, and FreeIPA and the ability to design secure identity, access, and authentication policies.
Strong networking knowledge, including SDWAN, VPN, IDS and IPS, firewall administration, segmentation strategy, and monitoring of network traffic for anomalies.
Hands-on experience managing or building security telemetry pipelines, log ingestion frameworks, or observability systems that support both structured and unstructured data.
Solid understanding of threat modeling, the MITRE ATT and CK framework, attacker tradecraft, and common detection and response patterns.
Experience performing vulnerability assessments, penetration testing, or secure configuration reviews and collaborating with teams to remediate identified risks.
Exposure to cloud and hybrid environments such as AWS, GCP, or on-prem clusters and the ability to evaluate risks and implement protective controls across these environments.
Benefits
Full medical, dental, and vision packages, with generous premium coverage
Housing subsidy of $2,000/month for those living within walking distance of the office
Daily lunch and dinner in our office
Relocation support for those moving to San Jose (Santana Row)
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nAt Etched, building and maintaining a secure yet friction-free computing environment is central to our mission. As a Security Engineer, you will protect the networks, systems, and applications that enable our engineers to push the limits of AI hardware. You will design, implement, and operate the monitoring, detection, and response infrastructure that safeguards Etched’s intellectual property, high-performance compute clusters, and developer workflows across both on-prem and cloud environments. You will partner with infrastructure, IT, application, and external provider teams to build systems that are secure by design, resilient under pressure, and seamless and easy to use for the end users.\n\n\n\nThis role combines hands-on technical depth with a focus on scalability and automation. You will take ownership of Etched’s security posture across infrastructure, IT, and applications, driving proactive threat detection, real-time monitoring, and rapid incident response. Your decisions will always balance maintaining full firm-wide velocity while improving our security and defense posture. You will develop tools, automation, and workflows that evolve with our rapidly growing and expanding footprint and ensure that security enhances, rather than hinders, innovation. If you are motivated by precision, ownership, and impact, you will find Etched the ideal place to advance your craft and contribute to the future of AI computing.\n\n\n\nKey Responsibilities\n\n - Manage and harden security baselines across on-prem, hybrid, and cloud systems, ensuring strong protection while maintaining speed and usability.\n\n - Integrate telemetry, logging, tracing, and management of structured, semi-structured, and unstructured data across the entire environment to provide unified and comprehensive observability into infrastructure and application activity.\n\n - Lead vulnerability management, patching, and configuration assurance programs to reduce exposure and maintain a consistent security posture.\n\n - Partner with infrastructure, IT, and application teams to strengthen identity, access, and network security through Okta, Google Workspace, and FreeIPA.\n\n - Implement and maintain zero-trust network architectures, SASE controls, CASB solutions, and conditional access policies that protect both users and data across environments to ensure full access and full control of our data and IP regardless of location or device.\n\n - Operate and enhance security operations tooling, including SIEM, SOAR, and EDR/XDR platforms, to ensure comprehensive monitoring and rapid detection of threats.\n\n - Develop and tune detection logic, automation, and playbooks for identifying and responding to threats such as insider activity, lateral movement, and anomalous behavior.\n\n - Investigate and respond to security incidents, performing root-cause analysis, containment, and remediation while coordinating with engineering and IT.\n\n - Build automation, scripts, AI agents, and integrations that streamline monitoring, alerting, and remediation workflows to improve efficiency and reliability.\n\n - Establish metrics, dashboards, and feedback mechanisms to measure detection coverage, response time, and overall security health.\n\n - Promote a culture of security awareness and ownership across engineering teams, ensuring that protection and productivity advance together.\n\n\n\nRepresentative Projects\n\n - Implementing a centralized security telemetry pipeline that aggregates logs and signals from networks, compute clusters, storage, endpoints devices, build systems, and cloud services into a unified SIEM for improved detection coverage.\n\n - Designing and developing Security Orchestration, Automation, and Response (SOAR) workflows to automate repetitive tasks like alert triage, data gathering, and initial containment, which improves SOC efficiency.\n\n - Help build a secure and flexible end user access framework that uses SDWAN, SASE, CASB, conditional access, EDR and XDR, and MDM/MAM to support productive, friction-free and secure work from any location using different devices.\n\n - Network Security Monitoring: Configuring and monitoring network intrusion detection/prevention systems (IDS/IPS) and firewalls to detect anomalies in network traffic, especially on the SDWAN and client VPN links\n\n - Creating and refining detailed, documented incident response plans and playbooks tailored to specific scenarios, such as a breach in a lab environment or a compromised silicon testing machine.\n\n - Conducting regular vulnerability assessments and penetration testing on internal systems and applications, then coordinating with relevant teams to manage and remediate identified weaknesses.\n\n\n\nYou May Be a Good Fit If You Have\n\n - 5-7+ years of experience in security engineering, SOC operations, detection engineering, incident response, or a similar role that blends hands-on technical work with analytical problem solving.\n\n - Strong software engineering skills with Python, Go, Bash, (C and Rust a major plus), including the ability to design, implement, and maintain high-quality code, automation frameworks, services, and integrations that improve security, observability, and operational efficiency.\n\n - Proficiency with SIEM and SOAR platforms, including experience building detections, dashboards, and automated workflows.\n\n - Deep understanding of EDR and XDR platforms, endpoint security hardening, and telemetry collection across macOS, Linux, Windows, and server environments.\n\n - Experience implementing or supporting zero trust architectures, including conditional access, SASE, CASB, and identity-driven access control models.\n\n - Familiarity with IAM and SSO systems such as Okta, Google Workspace, and FreeIPA and the ability to design secure identity, access, and authentication policies.\n\n - Strong networking knowledge, including SDWAN, VPN, IDS and IPS, firewall administration, segmentation strategy, and monitoring of network traffic for anomalies.\n\n - Hands-on experience managing or building security telemetry pipelines, log ingestion frameworks, or observability systems that support both structured and unstructured data.\n\n - Solid understanding of threat modeling, the MITRE ATT and CK framework, attacker tradecraft, and common detection and response patterns.\n\n - Experience performing vulnerability assessments, penetration testing, or secure configuration reviews and collaborating with teams to remediate identified risks.\n\n - Exposure to cloud and hybrid environments such as AWS, GCP, or on-prem clusters and the ability to evaluate risks and implement protective controls across these environments.\n\n\n\nBenefits\n\n - Full medical, dental, and vision packages, with generous premium coverage\n\n - Housing subsidy of $2,000/month for those living within walking distance of the office\n\n - Daily lunch and dinner in our office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"6c60c888-1b0e-4fc8-b78a-31b9c994a0f4","title":"Head of Inference Performance Visibility","department":"Architecture","team":"Architecture","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-02-19T01:08:43.303+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/6c60c888-1b0e-4fc8-b78a-31b9c994a0f4","applyUrl":"https://jobs.ashbyhq.com/etched/6c60c888-1b0e-4fc8-b78a-31b9c994a0f4/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are hiring a Head of Performance Visibility to define how performance is understood across next-generation AI accelerator systems.
Our ML accelerator platform spans custom silicon, supercomputing software, compiler stacks, runtime libraries, and distributed inference environments. Performance at this scale is no longer a device-level question — it is a high-performance distributed system problem. You will define the performance metrics that connect raw hardware signals to distributed workload context, ML cluster dynamics, pod communication patterns, and emergent bottlenecks.
This role requires more than telemetry. You will establish new abstractions, structured counter ontologies, cross-layer event correlation frameworks, distributed time-alignment strategies, and scalable reasoning systems operating across nodes, racks, and clusters. Working at the intersection of hardware design, driver architecture, runtime systems, and ML infrastructure, you will shape how these layers expose and consume performance intelligence. This is a foundational role defining not just tooling, but how our platform reasons about efficiency, scalability, and system behavior for years to come.
Key Responsibilities besides Mentorship and Leadership
System-Level Performance Design
Define the architectural approach for collecting and structuring telemetry across CPUs, drivers, interconnects, and multiple accelerators
Design scalable models for correlating performance events across device and host boundaries
Cross-Layer Event Correlation
Develop mechanisms to align hardware counters, runtime activity, communication phases, and workload semantics across model-layer execution into coherent, actionable insight
Implement time synchronization and trace-alignment strategies across multi-device systems
Telemetry & Counter Modeling
Define structured counter taxonomies separating base signals from derived metrics
Design derived performance models bridging low-level hardware signals and workload-level behavior
Influence instrumentation strategy for future hardware generations
Distributed Performance Reasoning
Build tools that identify bottlenecks among multi-accelerator workloads across chips within hosts
Build cluster-scale performance analysis for distributed inference across data center networks
Tooling & Insight Delivery
Contribute to analysis engines and developer-facing tooling that transform raw telemetry into intuitive insight
Shape how performance intelligence is surfaced to engineers debugging large-scale AI systems
You may be a good fit if you have
Deep experience building complex systems at the intersection of hardware and software
Personally envisioned and built significant portions of profiling, tracing, or observability systems — not solely defined requirements or product strategy
Demonstrated ability to translate raw hardware signals into scalable, production-grade telemetry and analysis infrastructure
Experience correlating time-series events across distributed systems
Deep systems programming expertise (C++ or Rust), with a track record of shipping low-level infrastructure operating close to hardware or runtime systems
Experience designing distributed correlation mechanisms, timestamp-alignment strategies, or performance modeling frameworks across multiple devices or hosts
Experience designing distributed tracing or observability platforms at scale
Experience with high-performance computing systems and large AI training clusters
Experience with timestamp synchronization strategies and event alignment in distributed environments
Experience with hardware counter design and instrumentation strategy
Experience with performance modeling for large-scale ML workloads
Experience leading cross-functional architectural initiatives spanning hardware and software teams
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\nWe are hiring a Head of Performance Visibility to define how performance is understood across next-generation AI accelerator systems.\n\nOur ML accelerator platform spans custom silicon, supercomputing software, compiler stacks, runtime libraries, and distributed inference environments. Performance at this scale is no longer a device-level question — it is a high-performance distributed system problem. You will define the performance metrics that connect raw hardware signals to distributed workload context, ML cluster dynamics, pod communication patterns, and emergent bottlenecks.\n\nThis role requires more than telemetry. You will establish new abstractions, structured counter ontologies, cross-layer event correlation frameworks, distributed time-alignment strategies, and scalable reasoning systems operating across nodes, racks, and clusters. Working at the intersection of hardware design, driver architecture, runtime systems, and ML infrastructure, you will shape how these layers expose and consume performance intelligence. This is a foundational role defining not just tooling, but how our platform reasons about efficiency, scalability, and system behavior for years to come.\n\n\n\nKey Responsibilities besides Mentorship and Leadership\nSystem-Level Performance Design\n\n - Define the architectural approach for collecting and structuring telemetry across CPUs, drivers, interconnects, and multiple accelerators\n\n - Design scalable models for correlating performance events across device and host boundaries\n\nCross-Layer Event Correlation\n\n - Develop mechanisms to align hardware counters, runtime activity, communication phases, and workload semantics across model-layer execution into coherent, actionable insight\n\n - Implement time synchronization and trace-alignment strategies across multi-device systems\n\nTelemetry & Counter Modeling\n\n - Define structured counter taxonomies separating base signals from derived metrics\n\n - Design derived performance models bridging low-level hardware signals and workload-level behavior\n\n - Influence instrumentation strategy for future hardware generations\n\nDistributed Performance Reasoning\n\n - Build tools that identify bottlenecks among multi-accelerator workloads across chips within hosts\n\n - Build cluster-scale performance analysis for distributed inference across data center networks\n\nTooling & Insight Delivery\n\n - Contribute to analysis engines and developer-facing tooling that transform raw telemetry into intuitive insight\n\n - Shape how performance intelligence is surfaced to engineers debugging large-scale AI systems\n\n\n\nYou may be a good fit if you have\n\n - Deep experience building complex systems at the intersection of hardware and software\n\n - Personally envisioned and built significant portions of profiling, tracing, or observability systems — not solely defined requirements or product strategy\n\n - Demonstrated ability to translate raw hardware signals into scalable, production-grade telemetry and analysis infrastructure\n\n - Experience correlating time-series events across distributed systems\n\n - Deep systems programming expertise (C++ or Rust), with a track record of shipping low-level infrastructure operating close to hardware or runtime systems\n\n - Experience designing distributed correlation mechanisms, timestamp-alignment strategies, or performance modeling frameworks across multiple devices or hosts\n\n - Experience designing distributed tracing or observability platforms at scale\n\n - Experience with high-performance computing systems and large AI training clusters\n\n - Experience with timestamp synchronization strategies and event alignment in distributed environments\n\n - Experience with hardware counter design and instrumentation strategy\n\n - Experience with performance modeling for large-scale ML workloads\n\n - Experience leading cross-functional architectural initiatives spanning hardware and software teams\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"4856eedb-4f39-42b7-927d-c8e0b880b53a","title":"Electrical Engineering Technician","department":"Platform","team":"Platform","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-03-24T03:08:01.082+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/4856eedb-4f39-42b7-927d-c8e0b880b53a","applyUrl":"https://jobs.ashbyhq.com/etched/4856eedb-4f39-42b7-927d-c8e0b880b53a/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We're looking for a hands-on Electrical Engineering Technician to support our hardware development and validation efforts. In this role, you'll own the execution of electrical test procedures, maintain rigorous documentation standards, and keep our lab environments running smoothly across multiple concurrent projects. You'll work closely with hardware engineers to ensure data integrity and help us move fast without cutting corners.
Key Responsibilities
Set up, calibrate, and operate electrical test equipment — including oscilloscopes, DMMs, power supplies, and signal analyzers — in accordance with established test procedures
Collect, record, and validate electrical measurement data, maintaining accurate and traceable documentation for analysis and quality assurance
Monitor live test runs and equipment performance, identifying anomalies and troubleshooting issues to maintain test integrity and minimize downtime
Prepare test benches, fixtures, and lab environments to support scheduled hardware experiments across multiple concurrent projects
Organize and maintain lab logs, test databases, and results reports, communicating findings clearly to hardware engineers and project teams
Enforce lab safety procedures and compliance standards while managing equipment maintenance, inventory, and calibration schedules
Must-Have Qualifications
Hands-on experience executing electrical test procedures, including bench setup, instrument calibration, and operation of standard EE lab equipment
Strong data collection and documentation habits — accurate, traceable measurement records are second nature to you
Ability to monitor live electrical tests, catch signal irregularities or out-of-spec behavior early, and troubleshoot quickly to minimize downtime
Experience preparing test benches and hardware fixtures across multiple concurrent projects
Comfort organizing and maintaining lab logs, databases, and test reports for a cross-functional engineering audience
Nice-to-Have Qualifications
Familiarity with lab safety compliance and managing EE equipment maintenance, inventory, and calibration schedules
Exposure to PCB bring-up, power rail validation, or digital/analog signal characterization
Experience with scripted test automation (Python, LabVIEW, or similar)
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by billions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed signaling. The ideal candidate will have extensive experience with large substrate designs (>50mm), complex power delivery networks, and high-speed signaling solutions (up to and beyond 50GHz). You will work closely with silicon, signal integrity, power integrity, and system help co-design world class substates with OSAT providers. Intense focus on optimization for power delivery through substrate, pushing what’s possible.
Key responsibilities
IC Substrate Layout Design
Lead the design and development of complex IC substrate layouts for high-power AI processors and accelerators.
Design large (>50mm) and complex multi-layer substrate packages with high pin counts and dense routing requirements.
Ensure robust power delivery designs capable of supporting >700W custom silicon solutions.
High-Speed Signal Routing & Integrity
Develop high-speed signal routing solutions capable of supporting >50GHz signaling while minimizing signal integrity issues such as loss and crosstalk.
Collaborate with SI/PI engineers to define signal integrity and power integrity requirements and implement solutions in substrate layout.
Advanced Packaging & CoWoS Integration
Optimize CoWoS (Chip-on-Wafer-on-Substrate) interposer designs for thermal and electrical performance.
Work closely with chip design, packaging, and manufacturing teams to ensure design feasibility and manufacturability.
Design Validation & Verification
Perform DRC (Design Rule Check) and LVS (Layout vs. Schematic) verification for all substrate designs.
Develop and maintain design documentation and guidelines for future substrate designs.
Support design reviews and provide technical guidance to junior team members.
You may be a good fit if you have
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
10+ years of experience in IC substrate layout design for high-performance processors or accelerators.
Extensive experience with large substrate packages (>50mm) and complex high-density layouts.
Proven experience with high-power (700W+) package designs and robust power delivery networks.
Expertise in high-speed signaling design (>50GHz) and mitigating signal integrity challenges (crosstalk, reflections, impedance mismatches).
Strong experience with CoWoS (Chip-on-Wafer-on-Substrate) interposer design and the impact of the substrate design to support CoWos.
Advanced proficiency in Allegro Package Designer (including constraint management, routing, and design verification).
Deep understanding of SI/PI principles and how they apply to package-level design.
Strong analytical skills and ability to work effectively in a fast-paced, cross-functional team environment.
Benefits
Competitive compensation packages, including generous equity packages
Comprehensive insurance coverage and other top-of-market benefits
How we’re different
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by billions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nAs a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed signaling. The ideal candidate will have extensive experience with large substrate designs (>50mm), complex power delivery networks, and high-speed signaling solutions (up to and beyond 50GHz). You will work closely with silicon, signal integrity, power integrity, and system help co-design world class substates with OSAT providers. Intense focus on optimization for power delivery through substrate, pushing what’s possible. \n\n\n\nKey responsibilities\n\n - IC Substrate Layout Design\n\n - Lead the design and development of complex IC substrate layouts for high-power AI processors and accelerators.\n\n - Design large (>50mm) and complex multi-layer substrate packages with high pin counts and dense routing requirements.\n\n - Ensure robust power delivery designs capable of supporting >700W custom silicon solutions.\n\n - High-Speed Signal Routing & Integrity\n\n - Develop high-speed signal routing solutions capable of supporting >50GHz signaling while minimizing signal integrity issues such as loss and crosstalk.\n\n - Collaborate with SI/PI engineers to define signal integrity and power integrity requirements and implement solutions in substrate layout.\n\n - Advanced Packaging & CoWoS Integration\n\n - Optimize CoWoS (Chip-on-Wafer-on-Substrate) interposer designs for thermal and electrical performance.\n\n - Work closely with chip design, packaging, and manufacturing teams to ensure design feasibility and manufacturability.\n\n - Design Validation & Verification\n\n - Perform DRC (Design Rule Check) and LVS (Layout vs. Schematic) verification for all substrate designs.\n\n - Develop and maintain design documentation and guidelines for future substrate designs.\n\n - Support design reviews and provide technical guidance to junior team members.\n\n\n\nYou may be a good fit if you have\n\n - Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.\n\n - 10+ years of experience in IC substrate layout design for high-performance processors or accelerators.\n\n - Extensive experience with large substrate packages (>50mm) and complex high-density layouts.\n\n - Proven experience with high-power (700W+) package designs and robust power delivery networks.\n\n - Expertise in high-speed signaling design (>50GHz) and mitigating signal integrity challenges (crosstalk, reflections, impedance mismatches).\n\n - Strong experience with CoWoS (Chip-on-Wafer-on-Substrate) interposer design and the impact of the substrate design to support CoWos. \n\n - Advanced proficiency in Allegro Package Designer (including constraint management, routing, and design verification).\n\n - Deep understanding of SI/PI principles and how they apply to package-level design.\n\n - Strong analytical skills and ability to work effectively in a fast-paced, cross-functional team environment.\n \n \n\nBenefits\n\n - Competitive compensation packages, including generous equity packages\n\n - Comprehensive insurance coverage and other top-of-market benefits\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.\n\n\n\nWe are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed."},{"id":"06398761-0950-4e5c-8590-26f485ba5509","title":"Technical Recruiter (Entry Level)","department":"People","team":"People","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-04-02T04:55:14.205+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/06398761-0950-4e5c-8590-26f485ba5509","applyUrl":"https://jobs.ashbyhq.com/etched/06398761-0950-4e5c-8590-26f485ba5509/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Technical Recruiter – Entry Level
This role is for someone early in their career who is hungry to learn and ready to take ownership. You'll be mentored by experienced recruiters and work closely with hiring managers and leadership but you'll also have your own roles to run and candidates to find. The learning curve is real, and so is the role and your responsibility.
Key Responsibilities
Own your own requisitions end-to-end - sourcing, screening, coordinating, closing
Hunt candidates in places most recruiters never look: GitHub, arXiv preprints, Apache mailing lists, niche Discord servers, conference speaker lists or phd scraping
Run structured interview coordination and lead candidate debriefs alongside hiring managers
Work directly with the lead recruiters on offer strategy and closing
Help us build our recruiting systems and processes from the ground up - your fingerprints will be on how we hire
You may be a good fit if you have (Must-have qualifications)
Have 0–2 years of recruiting, sales, sourcing, or talent coordination experience (or have taught yourself and can show the work) but you have a strong interest in grow into this field
A track record that goes beyond the classroom: clubs, side projects, sports, volunteering, or anything that shows you invest in things you care about
Are genuinely curious about AI, hardware, or deep tech - you don't need to be an engineer, but you get excited by it
Move fast, figure things out, and ask for help when you're stuck
Have low ego and high drive - you care about the outcome more than the credit
Can have real conversations with technical people without faking it
Are coachable - you want feedback and actually use it
What You'll Get
Mentorship from experienced recruiters and direct exposure to senior leadership
A front-row seat at a company building transformative technology
Real ownership, real responsibility, real growth — fast
Competitive compensation that reflects your commitment
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nTechnical Recruiter – Entry Level\n\nThis role is for someone early in their career who is hungry to learn and ready to take ownership. You'll be mentored by experienced recruiters and work closely with hiring managers and leadership but you'll also have your own roles to run and candidates to find. The learning curve is real, and so is the role and your responsibility.\n\n\n\nKey Responsibilities\n\n - Own your own requisitions end-to-end - sourcing, screening, coordinating, closing\n\n - Hunt candidates in places most recruiters never look: GitHub, arXiv preprints, Apache mailing lists, niche Discord servers, conference speaker lists or phd scraping\n\n - Run structured interview coordination and lead candidate debriefs alongside hiring managers\n\n - Work directly with the lead recruiters on offer strategy and closing\n\n - Help us build our recruiting systems and processes from the ground up - your fingerprints will be on how we hire\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - Have 0–2 years of recruiting, sales, sourcing, or talent coordination experience (or have taught yourself and can show the work) but you have a strong interest in grow into this field\n\n - A track record that goes beyond the classroom: clubs, side projects, sports, volunteering, or anything that shows you invest in things you care about\n\n - Are genuinely curious about AI, hardware, or deep tech - you don't need to be an engineer, but you get excited by it\n\n - Move fast, figure things out, and ask for help when you're stuck\n\n - Have low ego and high drive - you care about the outcome more than the credit\n\n - Can have real conversations with technical people without faking it\n\n - Are coachable - you want feedback and actually use it\n \n\nWhat You'll Get\n\n - Mentorship from experienced recruiters and direct exposure to senior leadership\n\n - A front-row seat at a company building transformative technology\n\n - Real ownership, real responsibility, real growth — fast\n\n - Competitive compensation that reflects your commitment\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"07b00790-2817-4863-a330-b0caf2322460","title":"Formal Verification - DV","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-06-10T08:41:47.749+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/07b00790-2817-4863-a330-b0caf2322460","applyUrl":"https://jobs.ashbyhq.com/etched/07b00790-2817-4863-a330-b0caf2322460/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a Formal Verification Engineer to join our ASIC Design Verification team. You will drive formal verification across the custom IP, interface IP, and SoC subsystems that power our ASICs, including compute arrays, DMA engines, NoCs, memory systems, PCIe, Ethernet, CPU subsystems, low-power peripherals, and vendor IP wrappers. You will work closely with architects, RTL designers, DV engineers, emulation teams, and software/firmware teams to prove design correctness, expose deep corner-case bugs, and improve verification closure across the full chip.
Key Responsibilities
Define and drive formal verification strategy across the ASIC DV team for complex IP blocks, interface subsystems, and SoC integration logic.
Develop formal verification plans covering functional correctness, connectivity, ordering, reset behavior, configuration legality, and deadlock/livelock freedom.
Build reusable formal environments using SystemVerilog Assertions, assumptions, constraints, checkers, cut-points, abstraction models, and reference models.
Drive proof convergence using abstractions, cut-points, assume-guarantee reasoning, cover properties, bounded-proof analysis, and coverage metrics to establish formal sign-off confidence.
Work with architects and RTL designers to translate design intent and specifications into high-value formal properties and closure criteria.
Partner with UVM DV, emulation, software, and firmware teams to align formal verification with simulation, coverage, regressions, and bring-up.
Debug complex RTL, protocol, datapath, connectivity, and integration bugs using formal counterexamples, waveforms, and design analysis.
Contribute to formal sign-off methodology, regression automation, reporting, and design-for-formal best practices.
You May Be a Good Fit If You Have
5+ years of design verification experience, including significant hands-on formal verification experience on complex digital designs or shipping silicon.
Strong proficiency with SystemVerilog, SystemVerilog Assertions, and formal verification methodology.
Experience with commercial formal tools such as Cadence JasperGold, Synopsys VC Formal, or Siemens Questa Formal.
Strong understanding of digital design, computer architecture, datapaths, interconnects, memory systems, and standard SoC interfaces.
Ability to model complex design behavior using assumptions, abstractions, constraints, cut-points, checkers, and reference models.
Strong debugging skills across RTL, specifications, formal counterexamples, simulation waveforms, and verification reports.
Experience collaborating across architecture, RTL design, UVM DV, emulation, software, firmware, and vendor teams.
You thrive in a fast-paced startup environment and can take ownership of ambiguous, high-impact verification problems.
Strong Candidates May Also Have Experience With
Formal verification of systolic arrays, DMA engines, NoCs, memory subsystems, arithmetic datapaths, PCIe, Ethernet, AXI/AMBA, CPU interfaces, or low-power controllers.
Protocol compliance checking, connectivity checking, register verification, datapath validation, reset verification, or deadlock/livelock analysis.
Vendor IP integration, encrypted or black-box IP verification, VIP configuration, and contract-based verification around subsystem boundaries.
Sequential LEC, floating-point or integer arithmetic proofs, cache coherency checks, interrupt handling, or memory-mapped IO verification.
Scripting in Python, TCL, Perl, or similar for automation, regression management, debug, and dashboarding.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a Formal Verification Engineer to join our ASIC Design Verification team. You will drive formal verification across the custom IP, interface IP, and SoC subsystems that power our ASICs, including compute arrays, DMA engines, NoCs, memory systems, PCIe, Ethernet, CPU subsystems, low-power peripherals, and vendor IP wrappers. You will work closely with architects, RTL designers, DV engineers, emulation teams, and software/firmware teams to prove design correctness, expose deep corner-case bugs, and improve verification closure across the full chip.\n\n\n\nKey Responsibilities\n\n - Define and drive formal verification strategy across the ASIC DV team for complex IP blocks, interface subsystems, and SoC integration logic.\n\n - Develop formal verification plans covering functional correctness, connectivity, ordering, reset behavior, configuration legality, and deadlock/livelock freedom.\n\n - Build reusable formal environments using SystemVerilog Assertions, assumptions, constraints, checkers, cut-points, abstraction models, and reference models.\n\n - Drive proof convergence using abstractions, cut-points, assume-guarantee reasoning, cover properties, bounded-proof analysis, and coverage metrics to establish formal sign-off confidence.\n\n - Work with architects and RTL designers to translate design intent and specifications into high-value formal properties and closure criteria.\n\n - Partner with UVM DV, emulation, software, and firmware teams to align formal verification with simulation, coverage, regressions, and bring-up.\n\n - Debug complex RTL, protocol, datapath, connectivity, and integration bugs using formal counterexamples, waveforms, and design analysis.\n\n - Contribute to formal sign-off methodology, regression automation, reporting, and design-for-formal best practices.\n\n\n\nYou May Be a Good Fit If You Have\n\n - 5+ years of design verification experience, including significant hands-on formal verification experience on complex digital designs or shipping silicon.\n\n - Strong proficiency with SystemVerilog, SystemVerilog Assertions, and formal verification methodology.\n\n - Experience with commercial formal tools such as Cadence JasperGold, Synopsys VC Formal, or Siemens Questa Formal.\n\n - Strong understanding of digital design, computer architecture, datapaths, interconnects, memory systems, and standard SoC interfaces.\n\n - Ability to model complex design behavior using assumptions, abstractions, constraints, cut-points, checkers, and reference models.\n\n - Strong debugging skills across RTL, specifications, formal counterexamples, simulation waveforms, and verification reports.\n\n - Experience collaborating across architecture, RTL design, UVM DV, emulation, software, firmware, and vendor teams.\n\n - You thrive in a fast-paced startup environment and can take ownership of ambiguous, high-impact verification problems.\n \n \n\nStrong Candidates May Also Have Experience With\n\n - Formal verification of systolic arrays, DMA engines, NoCs, memory subsystems, arithmetic datapaths, PCIe, Ethernet, AXI/AMBA, CPU interfaces, or low-power controllers.\n\n - Protocol compliance checking, connectivity checking, register verification, datapath validation, reset verification, or deadlock/livelock analysis.\n\n - Vendor IP integration, encrypted or black-box IP verification, VIP configuration, and contract-based verification around subsystem boundaries.\n\n - Sequential LEC, floating-point or integer arithmetic proofs, cache coherency checks, interrupt handling, or memory-mapped IO verification.\n\n - Scripting in Python, TCL, Perl, or similar for automation, regression management, debug, and dashboarding.\n\n - \n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"5f1f5739-3b58-467c-b351-ff183c94d96d","title":"DFT Intern","department":"ASIC","team":"ASIC","employmentType":"Intern","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-04-13T20:43:36.377+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/5f1f5739-3b58-467c-b351-ff183c94d96d","applyUrl":"https://jobs.ashbyhq.com/etched/5f1f5739-3b58-467c-b351-ff183c94d96d/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a DFT Intern at Etched, you will help review and refine DFT flow automation to support chip-level regression on Caelius. You will work across frontend and backend design teams, contribute to DFT verification (including MBIST, Scan, BSCAN, and SSN simulations), and develop flows for various ATPG fault models. You do not necessarily need prior DFT experience; just the ability to learn quickly in a fast-paced, high-autonomy environment. We are looking for Spring '27, and Summer '27 interns.
You may be a good fit if you have
Progress towards a Bachelor's, Master's, or PhD degree in electrical engineering, computer engineering, or a related field.
Familiarity with a hardware description language (Verilog or SystemVerilog)
Exposure to ASIC or SoC design concepts
Familiarity with digital logic design fundamentals
Familiarity with standard ASIC design flow steps (synthesis, STA, DFT)
Familiarity with scripting in Python, Tcl, or another language
Are able to learn quickly about transformers and other aspects of modern artificial intelligence
Strong candidates may also have experience with
Knowledge of DFT concepts such as MBIST, scan insertion, and scan compression
Experience with Tessent or similar DFT tooling
Familiarity with ATPG fault models (SAF, TDF, BDF, IDDQ, PDF)
Exposure to DFT flow automation or regression infrastructure
Familiarity with clocking and reset schemes
We encourage you to apply even if you do not believe you meet every single qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com.
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nAs a DFT Intern at Etched, you will help review and refine DFT flow automation to support chip-level regression on Caelius. You will work across frontend and backend design teams, contribute to DFT verification (including MBIST, Scan, BSCAN, and SSN simulations), and develop flows for various ATPG fault models. You do not necessarily need prior DFT experience; just the ability to learn quickly in a fast-paced, high-autonomy environment. We are looking for Spring '27, and Summer '27 interns.\n\n\n\nYou may be a good fit if you have\n\n - Progress towards a Bachelor's, Master's, or PhD degree in electrical engineering, computer engineering, or a related field.\n\n - Familiarity with a hardware description language (Verilog or SystemVerilog)\n\n - Exposure to ASIC or SoC design concepts\n\n - Familiarity with digital logic design fundamentals\n\n - Familiarity with standard ASIC design flow steps (synthesis, STA, DFT)\n\n - Familiarity with scripting in Python, Tcl, or another language\n\n - Are able to learn quickly about transformers and other aspects of modern artificial intelligence\n\n\n\nStrong candidates may also have experience with\n\n - Knowledge of DFT concepts such as MBIST, scan insertion, and scan compression\n\n - Experience with Tessent or similar DFT tooling\n\n - Familiarity with ATPG fault models (SAF, TDF, BDF, IDDQ, PDF)\n\n - Exposure to DFT flow automation or regression infrastructure\n\n - Familiarity with clocking and reset schemes\n\nWe encourage you to apply even if you do not believe you meet every single qualification.\n\n\n\nProgram details\n\n - 12-week paid internship\n\n - Generous housing support for those relocating\n\n - Daily lunch and dinner in our office\n\n - Based at our office in San Jose, CA\n\n - Direct mentorship from industry leaders and world-class engineers\n\n - Opportunity to work on one of the most important problems of our time\n\n\n\nFor any questions, contact internships@etched.com.\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"6f4df530-6d67-4df9-903c-645c20e84845","title":"Design Verification Engineer - Interface IP","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"Austin","secondaryLocations":[],"publishedAt":"2026-04-16T02:28:44.778+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressCountry":""}},"jobUrl":"https://jobs.ashbyhq.com/etched/6f4df530-6d67-4df9-903c-645c20e84845","applyUrl":"https://jobs.ashbyhq.com/etched/6f4df530-6d67-4df9-903c-645c20e84845/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a Design Verification Engineer to join our Interface IP DV team. You will work with architects, designers, and vendors to ensure that all our architecture requirements are met in the IP subsystems and interfaces being created, validate correctness and performance across the full hardware-software stack. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges.
Key responsibilities
End to end ownership of one or more of the following IP subsystems: PCIe, Ethernet, CPU (arc/arm), low power peripherals, sensors
Understand vendor IP configurations and handle handshake with internal IP team
Develop and maintain UVM/SystemVerilog-based verification environments to ensure functional correctness, performance, and compliance with IP specifications.
Collaborate with integration and SoC DV teams to validate seamless interaction of external IPs within the broader chip architecture.
Drive coverage closure and sign-off by defining metrics, analyzing gaps, and ensuring comprehensive verification across corner cases and stress scenarios.
You may be a good fit if you have
5+ years of design verification experience
You enjoy digging deep into complex verification challenges and finding creative ways to expose corner-case bugs.
You have hands-on experience with industry-standard verification methodologies like SystemVerilog/UVM and understand how to build scalable, reusable testbenches.
You are comfortable working with standard IP interfaces and protocols such as PCIe, Ethernet, AXI/AMBA, or ARM/ARC CPUs.
You thrive in a fast-paced startup environment and can take ownership of projects with minimal direction.
You collaborate naturally with cross-functional teams — from RTL design to software and emulation — and can clearly communicate technical insights.
Strong candidates may also have experience with
Experience handling vendors and integration of IP/VIP’s
UVM/System Verilog
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
This role is based in our Austin office, with regular time spent working alongside the team in San Jose. During the first quarter, expect to spend approximately two weeks per month at our San Jose headquarters to ramp quickly. After that, this shifts to roughly one week per month for ongoing collaboration.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a Design Verification Engineer to join our Interface IP DV team. You will work with architects, designers, and vendors to ensure that all our architecture requirements are met in the IP subsystems and interfaces being created, validate correctness and performance across the full hardware-software stack. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges.\n\n\n\nKey responsibilities\n\n - End to end ownership of one or more of the following IP subsystems: PCIe, Ethernet, CPU (arc/arm), low power peripherals, sensors\n\n - Understand vendor IP configurations and handle handshake with internal IP team\n\n - Develop and maintain UVM/SystemVerilog-based verification environments to ensure functional correctness, performance, and compliance with IP specifications.\n\n - Collaborate with integration and SoC DV teams to validate seamless interaction of external IPs within the broader chip architecture.\n\n - Drive coverage closure and sign-off by defining metrics, analyzing gaps, and ensuring comprehensive verification across corner cases and stress scenarios.\n\n\n\nYou may be a good fit if you have\n\n - 5+ years of design verification experience\n\n - You enjoy digging deep into complex verification challenges and finding creative ways to expose corner-case bugs.\n\n - You have hands-on experience with industry-standard verification methodologies like SystemVerilog/UVM and understand how to build scalable, reusable testbenches.\n\n - You are comfortable working with standard IP interfaces and protocols such as PCIe, Ethernet, AXI/AMBA, or ARM/ARC CPUs.\n\n - You thrive in a fast-paced startup environment and can take ownership of projects with minimal direction.\n\n - You collaborate naturally with cross-functional teams — from RTL design to software and emulation — and can clearly communicate technical insights.\n \n\nStrong candidates may also have experience with \n\n - Experience handling vendors and integration of IP/VIP’s\n\n - UVM/System Verilog\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\nThis role is based in our Austin office, with regular time spent working alongside the team in San Jose. During the first quarter, expect to spend approximately two weeks per month at our San Jose headquarters to ramp quickly. After that, this shifts to roughly one week per month for ongoing collaboration."},{"id":"77f0497f-086e-4d89-bbcd-bac7a79bf9a1","title":"Design Verification Engineer - Internal IP","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"Austin","secondaryLocations":[],"publishedAt":"2026-04-16T02:34:19.470+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressCountry":""}},"jobUrl":"https://jobs.ashbyhq.com/etched/77f0497f-086e-4d89-bbcd-bac7a79bf9a1","applyUrl":"https://jobs.ashbyhq.com/etched/77f0497f-086e-4d89-bbcd-bac7a79bf9a1/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a Design Verification Engineer to join our Internal IP DV team. You will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.
Key responsibilities
Develop and maintain UVM/SystemVerilog testbenches for high-performance IPs (compute arrays, DMAs, NoCs, memory subsystems).
Define and execute verification plans covering functional correctness, corner cases, concurrency, and performance bottlenecks.
Debug complex datapath and protocol issues in RTL and testbench environments.
Work closely with architects and designers to validate functionality and design intent.
Partner with SW, FW, and emulation teams to ensure end-to-end bring-up and debug coverage.
Contribute to reusable DV infrastructure, coverage models, and methodology improvements.
You may be a good fit if you have
Proficiency with UVM and SystemVerilog.
Strong debugging and problem-solving skills for complex digital designs.
Solid knowledge of computer architecture and digital design fundamentals.
Hands-on experience verifying datapaths, memory systems, interconnects, or high-throughput fabrics.
Strong candidates may also have experience with
Familiarity with SystemVerilog Assertions (SVA) and formal verification techniques.
Experience verifying systolic arrays, DMA engines, or NoC/AXI protocols.
Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
This role is based in our Austin office, with regular time spent working alongside the team in San Jose. During the first quarter, expect to spend approximately two weeks per month at our San Jose headquarters to ramp quickly. After that, this shifts to roughly one week per month for ongoing collaboration.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a Design Verification Engineer to join our Internal IP DV team. You will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.\n\n\n\nKey responsibilities\n\n - Develop and maintain UVM/SystemVerilog testbenches for high-performance IPs (compute arrays, DMAs, NoCs, memory subsystems).\n\n - Define and execute verification plans covering functional correctness, corner cases, concurrency, and performance bottlenecks.\n\n - Debug complex datapath and protocol issues in RTL and testbench environments.\n\n - Work closely with architects and designers to validate functionality and design intent.\n\n - Partner with SW, FW, and emulation teams to ensure end-to-end bring-up and debug coverage.\n\n - Contribute to reusable DV infrastructure, coverage models, and methodology improvements.\n\n\n\nYou may be a good fit if you have\n\n - Proficiency with UVM and SystemVerilog.\n\n - Strong debugging and problem-solving skills for complex digital designs.\n\n - Solid knowledge of computer architecture and digital design fundamentals.\n\n - Hands-on experience verifying datapaths, memory systems, interconnects, or high-throughput fabrics.\n\n\n\nStrong candidates may also have experience with\n\n - Familiarity with SystemVerilog Assertions (SVA) and formal verification techniques.\n\n - Experience verifying systolic arrays, DMA engines, or NoC/AXI protocols.\n\n - Scripting skills (Python/Perl/TCL or similar) for automation, debug and regression flows.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n\n\nThis role is based in our Austin office, with regular time spent working alongside the team in San Jose. During the first quarter, expect to spend approximately two weeks per month at our San Jose headquarters to ramp quickly. After that, this shifts to roughly one week per month for ongoing collaboration."},{"id":"33adf31c-e0ad-4080-bb83-1b3859f95d35","title":"Design Verification Engineer - SoC","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"Austin","secondaryLocations":[],"publishedAt":"2026-04-16T02:39:09.866+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressCountry":""}},"jobUrl":"https://jobs.ashbyhq.com/etched/33adf31c-e0ad-4080-bb83-1b3859f95d35","applyUrl":"https://jobs.ashbyhq.com/etched/33adf31c-e0ad-4080-bb83-1b3859f95d35/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a Design Verification Engineer to join our Systems/Performance Verification team. You will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.
Key responsibilities
Work closely with architects and RTL designers on verifying the performance features of the design and correlating with performance models (both pre-silicon and post-silicon).
Work closely with software and application developers on identifying performance bottlenecks and tuning the software.
Develop test plans and test infrastructure/tools for performance tuning, correlation, and verification.
Improve and maintain the architectural performance models.
Develop tests in SystemVerilog, Python, or vectors to debug and correlate the RTL and performance model.
Develop SystemVerilog or Python-based checkers for verifying the performance features.
Develop coverage monitors and analyze coverage to ensure all performance features are covered.
Debug performance issues and conduct performance tuning on silicon.
Drive end-to-end performance tuning, ensuring optimal hardware utilization, software efficiency, and architectural alignment across the ASIC design lifecycle.
You may be a good fit if you have
Strong understanding of digital design, RTL, and ASIC design flows.
Hands-on experience with performance verification, simulation, and modeling.
Comfortable developing checkers, coverage monitors, and testbenches in SystemVerilog.
Skilled in writing Python scripts for automation, data analysis, and performance modeling.
Experience building and maintaining performance models for chip subsystems.
Understanding of memory hierarchies, pipelines, interconnects, and compute accelerators.
Familiarity with performance bottleneck analysis, compiler optimizations, and workload tuning
Some exposure to kernel level performance metrics and profiling tools.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
This role is based in our Austin office, with regular time spent working alongside the team in San Jose. During the first quarter, expect to spend approximately two weeks per month at our San Jose headquarters to ramp quickly. After that, this shifts to roughly one week per month for ongoing collaboration.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a Design Verification Engineer to join our Systems/Performance Verification team. You will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.\n\n\n\nKey responsibilities\n\n - Work closely with architects and RTL designers on verifying the performance features of the design and correlating with performance models (both pre-silicon and post-silicon).\n\n - Work closely with software and application developers on identifying performance bottlenecks and tuning the software.\n\n - Develop test plans and test infrastructure/tools for performance tuning, correlation, and verification.\n\n - Improve and maintain the architectural performance models.\n\n - Develop tests in SystemVerilog, Python, or vectors to debug and correlate the RTL and performance model.\n\n - Develop SystemVerilog or Python-based checkers for verifying the performance features.\n\n - Develop coverage monitors and analyze coverage to ensure all performance features are covered.\n\n - Debug performance issues and conduct performance tuning on silicon.\n\n - Drive end-to-end performance tuning, ensuring optimal hardware utilization, software efficiency, and architectural alignment across the ASIC design lifecycle.\n\n\n\nYou may be a good fit if you have\n\n - Strong understanding of digital design, RTL, and ASIC design flows.\n\n - Hands-on experience with performance verification, simulation, and modeling.\n\n - Comfortable developing checkers, coverage monitors, and testbenches in SystemVerilog.\n\n - Skilled in writing Python scripts for automation, data analysis, and performance modeling.\n\n - Experience building and maintaining performance models for chip subsystems.\n\n - Understanding of memory hierarchies, pipelines, interconnects, and compute accelerators.\n\n - Familiarity with performance bottleneck analysis, compiler optimizations, and workload tuning\n\n - Some exposure to kernel level performance metrics and profiling tools.\n \n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\nThis role is based in our Austin office, with regular time spent working alongside the team in San Jose. During the first quarter, expect to spend approximately two weeks per month at our San Jose headquarters to ramp quickly. After that, this shifts to roughly one week per month for ongoing collaboration."},{"id":"e194099a-b7c0-4aa7-9e6d-06a666de6275","title":"Physical Design Engineer","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"Austin","secondaryLocations":[],"publishedAt":"2026-04-16T02:44:31.906+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressCountry":""}},"jobUrl":"https://jobs.ashbyhq.com/etched/e194099a-b7c0-4aa7-9e6d-06a666de6275","applyUrl":"https://jobs.ashbyhq.com/etched/e194099a-b7c0-4aa7-9e6d-06a666de6275/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is looking for exceptional Physical Design engineers to join our team. In this role, you
will own block-level implementation and verification, drive timing closure and PPA optimization, supervise 3rd party design work, and help improve our design flows and iteration speed.
Key Responsibilities
Deeply understand what is involved in physical design
Running PD flows to close blocks, support ASIC infrastructure, automate PD flows,
improve CAD infrastructure
Collaborate with RTL Designers and provide Physical Design feedback to improve PPA
Drive dashboards that show the convergence of projects related to PD
Optimize tool flows, working with EDA vendors to incorporate the latest features
Accountable for block level closure
Supervise the outsourcing of physical design to a 3rd party service
You may be a good fit if you have
5-10+ years of previous experience with PD
Tools, flow, and design methodology from RTL synthesis to GDSII sign-off
Experience with back-end design and timing closure on advanced process nodes (5nm
and below)
Experience with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler)
automated RTL-to-GDSII flows
Experience with sign-off tools (PrimeTime, Tempus, Voltus, etc.)
Experience with UPF-based low power design methodology, power verification,synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS,
routing, IR drop, and EM/antenna analysis
Deeply creative and able to think from first principles
Strong candidates may also have experience with
Familiarity with modern ML and LLM model architectures
Ability to program with Python or another scripting language
Familiarity with AI tools for programming/coding
Startup experience or comfort working in fast-paced environments
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We greatly value engineering skills. We do not have strict boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
This role is based in our Austin office, with regular time spent working alongside the team in San Jose. During the first quarter, expect to spend approximately two weeks per month at our San Jose headquarters to ramp quickly. After that, this shifts to roughly one week per month for ongoing collaboration.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched is looking for exceptional Physical Design engineers to join our team. In this role, you\nwill own block-level implementation and verification, drive timing closure and PPA optimization, supervise 3rd party design work, and help improve our design flows and iteration speed.\n\n\nKey Responsibilities\n\n - Deeply understand what is involved in physical design\n\n - Running PD flows to close blocks, support ASIC infrastructure, automate PD flows,\n improve CAD infrastructure\n\n - Collaborate with RTL Designers and provide Physical Design feedback to improve PPA\n\n - Drive dashboards that show the convergence of projects related to PD\n\n - Optimize tool flows, working with EDA vendors to incorporate the latest features\n\n - Accountable for block level closure\n\n - Supervise the outsourcing of physical design to a 3rd party service\n\n\n\nYou may be a good fit if you have\n\n - 5-10+ years of previous experience with PD\n\n - Tools, flow, and design methodology from RTL synthesis to GDSII sign-off\n\n - Experience with back-end design and timing closure on advanced process nodes (5nm\n and below)\n\n - Experience with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler)\n automated RTL-to-GDSII flows\n\n - Experience with sign-off tools (PrimeTime, Tempus, Voltus, etc.)\n\n - Experience with UPF-based low power design methodology, power verification,synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS,\n routing, IR drop, and EM/antenna analysis\n\n - Deeply creative and able to think from first principles\n\n\n\nStrong candidates may also have experience with\n\n - Familiarity with modern ML and LLM model architectures\n\n - Ability to program with Python or another scripting language\n\n - Familiarity with AI tools for programming/coding\n\n - Startup experience or comfort working in fast-paced environments\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe greatly value engineering skills. We do not have strict boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.\n\nThis role is based in our Austin office, with regular time spent working alongside the team in San Jose. During the first quarter, expect to spend approximately two weeks per month at our San Jose headquarters to ramp quickly. After that, this shifts to roughly one week per month for ongoing collaboration."},{"id":"72c473ba-be0f-47ea-a2bd-82eb2b30967d","title":"Technical Program Manager, Infrastructure","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-04-17T00:36:52.565+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/72c473ba-be0f-47ea-a2bd-82eb2b30967d","applyUrl":"https://jobs.ashbyhq.com/etched/72c473ba-be0f-47ea-a2bd-82eb2b30967d/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As our Technical Program Manager, Infrastructure you will own end-to-end program delivery across the org — driving alignment between internal teams, managing external vendor relationships, and ensuring that every dependency, risk, and milestone is visible to the people who need to act on it. You'll establish the KPIs and operational cadences that keep programs on track, and continuously refine our processes to make the entire Infrastructure organization faster and more effective.
You'll be the connective tissue between engineering and leadership — translating technical complexity into clear status, surfacing risks before they become blockers, and facilitating resolution of the cross-disciplinary issues that emerge at the intersection of ASIC design, hardware platforms, and software integration. When priorities shift, you don't just adapt — you help the organization navigate the shift without losing momentum.
This role demands deep technical fluency alongside exceptional organizational and communication skills. You're not just tracking tasks — you're building the program management foundation that lets world-class engineers move at the pace Etched needs to win.
Key Responsibilities
Drive collaboration across our Infrastructure org, including DevOps/DevX, Core Engineering, Security and IT.
Partner with external vendors to ensure any external services are being delivered on time and meet quality standards.
Identify risks proactively and develop mitigation strategies to minimize impact on project timelines and quality.
Optimize engineering and operational efficiency by continuously refining program management processes.
Foster a culture of accountability and transparency by regularly communicating with executive and engineering leaders on project status, risks, and opportunities.
Establish and track key performance indicators (KPIs) to monitor progress, success, and strategic alignment.
Leverage technical understanding of hardware, ASIC, and software integration to facilitate cross-disciplinary communication and resolution of technical issues.
Operate effectively in a fast-paced, dynamic environment with shifting priorities and emerging challenges.
You may be a good fit if you have:
8-10+ years of experience in technical program management, ideally in hardware, semiconductor, or AI technology environments.
A PMP certification with a demonstrated track record of delivering complex, cross-functional projects.
Strong technical knowledge in ASIC design, hardware platforms, and software integration.
Excellent organizational, communication, and leadership skills that influence without authority.
A proactive approach to identifying risks and opportunities for process improvement.
Experience using program management tools and methodologies such as Google Workspace and JIRA.
Strong candidates may also have experience with:
A bachelor’s degree in Engineering, Computer Science, or a related technical discipline (advanced degree preferred).
Managing and nurturing external vendor and supplier relationships.
Implementing best practices in program delivery to drive operational performance improvements.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row) and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched's infrastructure spans some of the most sensitive compute environments in the industry: bare-metal HPC clusters running proprietary ASIC workloads, hybrid on-prem/cloud deployments, and internal toolchains that house irreplaceable chip design IP. As we scale from early silicon to production, securing these environments is foundational — not an afterthought.
As our first dedicated Network Security Engineer, you will own the design and implementation of Etched's network security posture end to end. You'll work alongside the infrastructure team to harden our physical and virtual networks, enforce least-privilege access to chip design environments, and build the detection and response capabilities that keep our most sensitive assets safe.
This is a high-ownership role for someone who wants to shape security architecture at a company building the compute infrastructure for the next decade of AI — not maintain someone else's stack.
Key Responsibilities
Design and implement a zero-trust network architecture across on-prem datacenters, multiple office locations, and multi-cloud platforms, including secure remote access that eliminates VPN sprawl without sacrificing engineer usability and speed
Define and enforce network segmentation policies that isolate sensitive ASIC development workflows from general infrastructure, customer access, validation labs, and manufacturing infrastructure
Balancing prevention and detection, deploy, tune, and operate NDR, IDS/IPS, and next-generation firewalls across our physical and virtual network fabric; build automation to continuously assess and enforce firewall rules, ACLs, and routing policies - treating network security configuration as code
Integrate and operate EDR/XDR, MDM/MAM, SASE, and CASB tooling in partnership with end-user and IT teams, enforcing unified DLP policies and device compliance posture across endpoint, cloud, and network control planes to eliminate data exfiltration risk
Own our vulnerability management process for network-layer exposure: scanning, prioritization, and remediation tracking in partnership with infrastructure engineers
Lead incident response for network-layer security events: detection, containment, root-cause analysis, and post-incident hardening
Partner with legal, compliance, and leadership to support regulatory requirements and customer security reviews as they arise
Architect and deploy network segmentation for our HPC clusters, isolating EDA tool traffic, ASIC simulation workloads, and CI pipelines from each other and from the corporate network
Architect and deploy a ZTNA-based corporate network that eliminates VPN sprawl and ensures end-user devices maintain a consistent security posture and seamless access to sensitive development environments - whether engineers are on-site, remote, or traveling - replacing location-dependent trust with continuous identity and device health verification
Design and implement a scalable NDR pipeline that ingests flow data across bare-metal switches and cloud VPCs, feeds a centralized SIEM, and generates actionable alerts with low false-positive rates
Develop runbooks and automated playbooks for the highest-probability incident scenarios - credential compromise, lateral movement, and exfiltration from IP-sensitive environments
Integrate EDR/XDR telemetry with SASE enforcement and CASB inline controls to build a unified DLP detection and response pipeline spanning endpoints, cloud SaaS, and the corporate network
Partner with end-user and IT teams to roll out MDM/MAM policies that containerize sensitive IP on engineer devices and enforce compliance-based conditional access across managed and unmanaged environments
You may be a good fit if you have (Must-have qualifications)
Bring deep, broad networking expertise - from low-level packet analysis and firewall log forensics to BGP configuration, multi-cloud networking, and CASB/SASE integration across a diverse SaaS landscape
Have hands-on experience with the Fortinet ecosystem - firewalls, FortiSASE, FortiAPs, and switches - and are comfortable with Arista switch platforms, including configuration, EOS automation, and integration into a broader security architecture
Treat security as an engineering discipline: you write code and automation rather than relying on point-and-click tooling, version-control your configurations, and develop intent-driven network automation
Have experience securing high-value compute environments - datacenters, HPC clusters, semiconductor design environments, or similar settings where the cost of a breach is extremely high
Have deployed and integrated EDR/XDR, MDM/MAM, SASE, and CASB tooling, and understand how to stitch them together into a unified DLP and access control framework that spans endpoints, cloud, and the network
Have built or operated ZTNA-based access models and understand how to enforce consistent security posture across on-site, remote, and traveling users without degrading the experience for engineers
Are comfortable owning your domain with minimal oversight: you can independently scope a project, identify the right tooling, and drive it to completion
Have strong Linux fundamentals and understand how OS-level networking (iptables/nftables, network namespaces, eBPF) interacts with physical and virtual network security controls
Have built or operated network security monitoring at scale - you know the difference between a good alert and noise, and you can architect a detection pipeline that surfaces real signal
Can communicate risk clearly to both technical peers and non-technical leadership, and can translate security requirements into actionable infrastructure changes
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience with EDA environments or semiconductor IP security
Familiarity with cloud-native network security controls on AWS, GCP, or Azure (security groups, VPC flow logs, cloud firewalls, CSPM)
Background in or exposure to NIST, SOC 2, or ISO 27001 frameworks
Experience with eBPF-based network observability and security tooling
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we're different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched's infrastructure spans some of the most sensitive compute environments in the industry: bare-metal HPC clusters running proprietary ASIC workloads, hybrid on-prem/cloud deployments, and internal toolchains that house irreplaceable chip design IP. As we scale from early silicon to production, securing these environments is foundational — not an afterthought.\n\n\n\nAs our first dedicated Network Security Engineer, you will own the design and implementation of Etched's network security posture end to end. You'll work alongside the infrastructure team to harden our physical and virtual networks, enforce least-privilege access to chip design environments, and build the detection and response capabilities that keep our most sensitive assets safe.\n\n\n\nThis is a high-ownership role for someone who wants to shape security architecture at a company building the compute infrastructure for the next decade of AI — not maintain someone else's stack.\n\n\n\nKey Responsibilities\n\n - Design and implement a zero-trust network architecture across on-prem datacenters, multiple office locations, and multi-cloud platforms, including secure remote access that eliminates VPN sprawl without sacrificing engineer usability and speed\n\n - Define and enforce network segmentation policies that isolate sensitive ASIC development workflows from general infrastructure, customer access, validation labs, and manufacturing infrastructure\n\n - Balancing prevention and detection, deploy, tune, and operate NDR, IDS/IPS, and next-generation firewalls across our physical and virtual network fabric; build automation to continuously assess and enforce firewall rules, ACLs, and routing policies - treating network security configuration as code\n\n - Integrate and operate EDR/XDR, MDM/MAM, SASE, and CASB tooling in partnership with end-user and IT teams, enforcing unified DLP policies and device compliance posture across endpoint, cloud, and network control planes to eliminate data exfiltration risk\n\n - Own our vulnerability management process for network-layer exposure: scanning, prioritization, and remediation tracking in partnership with infrastructure engineers\n\n - Lead incident response for network-layer security events: detection, containment, root-cause analysis, and post-incident hardening\n\n - Partner with legal, compliance, and leadership to support regulatory requirements and customer security reviews as they arise\n\n - Architect and deploy network segmentation for our HPC clusters, isolating EDA tool traffic, ASIC simulation workloads, and CI pipelines from each other and from the corporate network\n\n - Architect and deploy a ZTNA-based corporate network that eliminates VPN sprawl and ensures end-user devices maintain a consistent security posture and seamless access to sensitive development environments - whether engineers are on-site, remote, or traveling - replacing location-dependent trust with continuous identity and device health verification\n\n - Design and implement a scalable NDR pipeline that ingests flow data across bare-metal switches and cloud VPCs, feeds a centralized SIEM, and generates actionable alerts with low false-positive rates\n\n - Develop runbooks and automated playbooks for the highest-probability incident scenarios - credential compromise, lateral movement, and exfiltration from IP-sensitive environments\n\n - Integrate EDR/XDR telemetry with SASE enforcement and CASB inline controls to build a unified DLP detection and response pipeline spanning endpoints, cloud SaaS, and the corporate network\n\n - Partner with end-user and IT teams to roll out MDM/MAM policies that containerize sensitive IP on engineer devices and enforce compliance-based conditional access across managed and unmanaged environments\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - Bring deep, broad networking expertise - from low-level packet analysis and firewall log forensics to BGP configuration, multi-cloud networking, and CASB/SASE integration across a diverse SaaS landscape\n\n - Have hands-on experience with the Fortinet ecosystem - firewalls, FortiSASE, FortiAPs, and switches - and are comfortable with Arista switch platforms, including configuration, EOS automation, and integration into a broader security architecture\n\n - Treat security as an engineering discipline: you write code and automation rather than relying on point-and-click tooling, version-control your configurations, and develop intent-driven network automation\n\n - Have experience securing high-value compute environments - datacenters, HPC clusters, semiconductor design environments, or similar settings where the cost of a breach is extremely high\n\n - Have deployed and integrated EDR/XDR, MDM/MAM, SASE, and CASB tooling, and understand how to stitch them together into a unified DLP and access control framework that spans endpoints, cloud, and the network\n\n - Have built or operated ZTNA-based access models and understand how to enforce consistent security posture across on-site, remote, and traveling users without degrading the experience for engineers\n\n - Are comfortable owning your domain with minimal oversight: you can independently scope a project, identify the right tooling, and drive it to completion\n\n - Have strong Linux fundamentals and understand how OS-level networking (iptables/nftables, network namespaces, eBPF) interacts with physical and virtual network security controls\n\n - Have built or operated network security monitoring at scale - you know the difference between a good alert and noise, and you can architect a detection pipeline that surfaces real signal\n\n - Can communicate risk clearly to both technical peers and non-technical leadership, and can translate security requirements into actionable infrastructure changes\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Experience with EDA environments or semiconductor IP security\n\n - Familiarity with cloud-native network security controls on AWS, GCP, or Azure (security groups, VPC flow logs, cloud firewalls, CSPM)\n\n - Background in or exposure to NIST, SOC 2, or ISO 27001 frameworks\n\n - Experience with eBPF-based network observability and security tooling\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we're different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n"},{"id":"0d381d56-ea87-4a4b-9707-a6f82a45e6a3","title":"PCB Layout Engineer (Taiwan)","department":"Platform","team":"Platform","employmentType":"FullTime","location":"Taipei","secondaryLocations":[],"publishedAt":"2026-09-21T03:10:23.207+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"Taiwan","addressCountry":"Taiwan","addressLocality":"Taipei"}},"jobUrl":"https://jobs.ashbyhq.com/etched/0d381d56-ea87-4a4b-9707-a6f82a45e6a3","applyUrl":"https://jobs.ashbyhq.com/etched/0d381d56-ea87-4a4b-9707-a6f82a45e6a3/application","descriptionHtml":"About Etched
Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We’re seeking a skilled PCB Layout Engineer to join our dynamic team and contribute to our high-performance data center products. As a PCB Layout Engineer at Etched, you will play a crucial role in designing and optimizing printed circuit boards (PCBs) using Cadence Allegro PCB design tools. Your primary focus will be on high-speed signaling, including 100G applications, power distribution, large BGA ball-map breakouts and complex HDI PCB stack-ups for high-performance data center products. Your expertise will ensure that our products meet the highest standards of performance, reliability, and efficiency.
Key Responsibilities
Lead the design and optimization of high-speed PCB layouts using Cadence Allegro, tailored for 100G signaling. Implement strategies for impedance matching, trace routing, and crosstalk mitigation, resulting in robust designs that meet the stringent performance demands of modern data centers.
Develop and implement power distribution networks for cutting-edge data center hardware. Design power planes, decoupling strategies, and thermal management solutions to support high-performance systems, ensuring reliability and efficiency under heavy operational loads.
Manage the design of complex High-Density Interconnect (HDI) PCB stack-ups for multi-layer boards. Integrate blind/buried vias and microvias to meet the advanced technological requirements of data center systems, enhancing signal integrity and achieving compact form factors.
Collaborate with electrical and mechanical engineering teams to integrate PCB designs within the overall system architecture. Provide key input during design reviews to optimize performance, ensure manufacturability, and align with system-level objectives in a data center environment.
You maybe a good fit if you
Have a Bachelor’s degree in Electrical Engineering, Electronics Engineering, or a related field. Advanced degrees or certifications are a plus.
Are equipped with 10 years of experience in PCB layout design with a focus on high-speed signaling, power distribution, and HDI stack-ups, ideally for high-performance data center products.
Demonstrate proficiency in Cadence Allegro PCB design tools
Command in-depth knowledge of high-speed digital design principles, including signal integrity and impedance control.
Have Experience with complex HDI PCB design and manufacturing processes.
Understand power distribution network design and thermal management techniques, particularly for data center applications.
Are excellent at problem-solving skills and attention to detail.
We encourage you to apply even if you do not believe you meet every single qualification.
Benefits
Competitive compensation packages, including generous equity packages
Comprehensive insurance coverage and other top-of-market benefits
US onboarding experience in our Silicon Valley HQ
How we’re different
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
","descriptionPlain":"About Etched\n\nEtched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe’re seeking a skilled PCB Layout Engineer to join our dynamic team and contribute to our high-performance data center products. As a PCB Layout Engineer at Etched, you will play a crucial role in designing and optimizing printed circuit boards (PCBs) using Cadence Allegro PCB design tools. Your primary focus will be on high-speed signaling, including 100G applications, power distribution, large BGA ball-map breakouts and complex HDI PCB stack-ups for high-performance data center products. Your expertise will ensure that our products meet the highest standards of performance, reliability, and efficiency.\n\n\n\nKey Responsibilities\n\n - Lead the design and optimization of high-speed PCB layouts using Cadence Allegro, tailored for 100G signaling. Implement strategies for impedance matching, trace routing, and crosstalk mitigation, resulting in robust designs that meet the stringent performance demands of modern data centers.\n\n - Develop and implement power distribution networks for cutting-edge data center hardware. Design power planes, decoupling strategies, and thermal management solutions to support high-performance systems, ensuring reliability and efficiency under heavy operational loads.\n\n - Manage the design of complex High-Density Interconnect (HDI) PCB stack-ups for multi-layer boards. Integrate blind/buried vias and microvias to meet the advanced technological requirements of data center systems, enhancing signal integrity and achieving compact form factors.\n\n - Collaborate with electrical and mechanical engineering teams to integrate PCB designs within the overall system architecture. Provide key input during design reviews to optimize performance, ensure manufacturability, and align with system-level objectives in a data center environment.\n\n\n\nYou maybe a good fit if you\n\n - Have a Bachelor’s degree in Electrical Engineering, Electronics Engineering, or a related field. Advanced degrees or certifications are a plus.\n\n - Are equipped with 10 years of experience in PCB layout design with a focus on high-speed signaling, power distribution, and HDI stack-ups, ideally for high-performance data center products.\n\n - Demonstrate proficiency in Cadence Allegro PCB design tools\n\n - Command in-depth knowledge of high-speed digital design principles, including signal integrity and impedance control.\n\n - Have Experience with complex HDI PCB design and manufacturing processes.\n\n - Understand power distribution network design and thermal management techniques, particularly for data center applications.\n\n - Are excellent at problem-solving skills and attention to detail.\n\nWe encourage you to apply even if you do not believe you meet every single qualification.\n\n\n\nBenefits\n\n - Competitive compensation packages, including generous equity packages\n\n - Comprehensive insurance coverage and other top-of-market benefits\n\n - US onboarding experience in our Silicon Valley HQ\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.\n\n\n\nWe are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed."},{"id":"40365c15-37d2-4266-a042-5a21bfb9212b","title":"Power Validation Engineer","department":"Platform","team":"Platform","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-04-30T19:57:50.410+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/40365c15-37d2-4266-a042-5a21bfb9212b","applyUrl":"https://jobs.ashbyhq.com/etched/40365c15-37d2-4266-a042-5a21bfb9212b/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are looking for a Power Validation Engineer to own the end-to-end power characterization of our ASIC and the mezzanine card platform — from early silicon bring-up through production qualification. You will design measurement methodology, build test benches, and drive findings directly into silicon, package, and system design decisions.
Key Responsibilities
Design and execute power measurement campaigns across all voltage rails (VDD_CORE, HBM, PCIe, AUX, etc) under realistic LLM inference and power virus workloads; characterize peak, sustained, and idle power envelopes across PVT corners and define derating curves used in system thermal and PDN specs
Validate power delivery network (PDN) performance — VRM load step response, PCIe power compliance, PDN impedance — and translate measurements into actionable feedback on capacitor placement, plane geometry, and de-cap strategy for PCB and package design teams
Profile power transient events (ramp rates, droop amplitudes, recovery profiles) and correlate them with on-die performance monitor data; build automated power sweep frameworks exercising the full inference workload space across model sizes, batch sizes, sequence lengths, and precision modes
Run extended stress workloads (72 h+ continuous) to surface reliability risks and throttling behavior; instrument multi-zone thermal profiles and support our overseas partners with SLT, production and debugging.
Validate power sequencing, PMBus telemetry accuracy, and BMC alert thresholds across cold-start, hot-restart, and fault-injection scenarios; own power-related pass/fail criteria across FAT, SFT, and RIN qualification stages
Feed characterization data back to RTL and physical design teams as input for DVFS policy, clock gating coverage, and leakage optimization; write precise validation reports that enable silicon and firmware teams to act without re-running experiments
Lead the electrical characterization, validation, and qualification process for the on-board system-level power distribution network, spanning from power converter design to ASIC power integrity validation.
Provide critical support to design engineers through debug, component validation, and failure analysis for released products, independently troubleshooting and determining the root cause of electrical component defects and design flaws.
Develop and implement automated/scripted test procedures for the general qualification and testing of Devices Under Test (DUTs) as part of a comprehensive automation suite.
Collect, analyze, and aggregate test data to support data-driven engineering decisions, generate reports on findings, reduce data sets, and thoroughly investigate test outcomes down to the hardware interface or component level.
Collaborate with hardware designers and diagnostics development teams to understand new project architectures and system components, ensuring the necessary support for testing and debug efforts is implemented.
You may be a good fit if you have (Must-have qualifications)
A Bachelor’s degree in Electrical Engineering or a related field. Advanced degrees or certifications in power electronics or related areas are a plus
Deep understanding of ASIC and system-level power delivery — VRM topology, PDN impedance, decoupling strategy, and transient response — with hands-on bench experience using precision shunts, isolated differential probes, and VNA-based PDN impedance measurement
Expertise with multi-phase solutions with high dynamic content and low tolerance.
Experience with VR tuning to a well defined power test plan to ensure VR specifications meet CPU/ ASIC
Demonstrated ability to design experiments that isolate root cause in a complex hardware-software stack, strong oscilloscope and lab instrument fluency (triggering on rare transient events, correlating multi-channel captures), and a track record of finding bugs that only surface under specific workload or environmental conditions
Relevant experience with Silicon bring ups
Strong candidates may also have experience with (Nice-to-have qualifications)
Masters Degree in Power Electronics
Experience with high voltage testing (800V and higher)
Prior power validation work on AI accelerators, GPUs, or high-performance server platforms, including HBM power characterization or memory power management interfaces
Experience with OpenBMC, IPMI, or custom BMC firmware for sensor monitoring and power capping; familiarity with LLM inference stacks (vLLM, TensorRT-LLM, or similar) sufficient to construct representative power workloads
Proficiency in Python for test automation, data pipeline construction, and statistical analysis; experience debugging across the stack from PMBus register dumps and BMC sensor logs to firmware traces and Linux kernel power management
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are looking for a Power Validation Engineer to own the end-to-end power characterization of our ASIC and the mezzanine card platform — from early silicon bring-up through production qualification. You will design measurement methodology, build test benches, and drive findings directly into silicon, package, and system design decisions.\n\n\n\nKey Responsibilities\n\n - Design and execute power measurement campaigns across all voltage rails (VDD_CORE, HBM, PCIe, AUX, etc) under realistic LLM inference and power virus workloads; characterize peak, sustained, and idle power envelopes across PVT corners and define derating curves used in system thermal and PDN specs\n\n - Validate power delivery network (PDN) performance — VRM load step response, PCIe power compliance, PDN impedance — and translate measurements into actionable feedback on capacitor placement, plane geometry, and de-cap strategy for PCB and package design teams\n\n - Profile power transient events (ramp rates, droop amplitudes, recovery profiles) and correlate them with on-die performance monitor data; build automated power sweep frameworks exercising the full inference workload space across model sizes, batch sizes, sequence lengths, and precision modes\n\n - Run extended stress workloads (72 h+ continuous) to surface reliability risks and throttling behavior; instrument multi-zone thermal profiles and support our overseas partners with SLT, production and debugging.\n\n - Validate power sequencing, PMBus telemetry accuracy, and BMC alert thresholds across cold-start, hot-restart, and fault-injection scenarios; own power-related pass/fail criteria across FAT, SFT, and RIN qualification stages\n\n - Feed characterization data back to RTL and physical design teams as input for DVFS policy, clock gating coverage, and leakage optimization; write precise validation reports that enable silicon and firmware teams to act without re-running experiments\n\n - Lead the electrical characterization, validation, and qualification process for the on-board system-level power distribution network, spanning from power converter design to ASIC power integrity validation.\n\n - Provide critical support to design engineers through debug, component validation, and failure analysis for released products, independently troubleshooting and determining the root cause of electrical component defects and design flaws.\n\n - Develop and implement automated/scripted test procedures for the general qualification and testing of Devices Under Test (DUTs) as part of a comprehensive automation suite.\n\n - Collect, analyze, and aggregate test data to support data-driven engineering decisions, generate reports on findings, reduce data sets, and thoroughly investigate test outcomes down to the hardware interface or component level.\n\n - Collaborate with hardware designers and diagnostics development teams to understand new project architectures and system components, ensuring the necessary support for testing and debug efforts is implemented.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - A Bachelor’s degree in Electrical Engineering or a related field. Advanced degrees or certifications in power electronics or related areas are a plus\n\n - Deep understanding of ASIC and system-level power delivery — VRM topology, PDN impedance, decoupling strategy, and transient response — with hands-on bench experience using precision shunts, isolated differential probes, and VNA-based PDN impedance measurement\n\n - Expertise with multi-phase solutions with high dynamic content and low tolerance.\n\n - Experience with VR tuning to a well defined power test plan to ensure VR specifications meet CPU/ ASIC\n\n - Demonstrated ability to design experiments that isolate root cause in a complex hardware-software stack, strong oscilloscope and lab instrument fluency (triggering on rare transient events, correlating multi-channel captures), and a track record of finding bugs that only surface under specific workload or environmental conditions\n\n - Relevant experience with Silicon bring ups\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Masters Degree in Power Electronics\n\n - Experience with high voltage testing (800V and higher)\n\n - Prior power validation work on AI accelerators, GPUs, or high-performance server platforms, including HBM power characterization or memory power management interfaces\n\n - Experience with OpenBMC, IPMI, or custom BMC firmware for sensor monitoring and power capping; familiarity with LLM inference stacks (vLLM, TensorRT-LLM, or similar) sufficient to construct representative power workloads\n\n - Proficiency in Python for test automation, data pipeline construction, and statistical analysis; experience debugging across the stack from PMBus register dumps and BMC sensor logs to firmware traces and Linux kernel power management\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"d02d77c6-5e99-4184-9e3b-a2180152f95d","title":"SI/PI Engineer","department":"Platform","team":"Platform","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-04-30T23:08:16.449+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/d02d77c6-5e99-4184-9e3b-a2180152f95d","applyUrl":"https://jobs.ashbyhq.com/etched/d02d77c6-5e99-4184-9e3b-a2180152f95d/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are looking for a Signal Integrity and Power Integrity (SI/PI) Engineer to join our platform electrical engineering team. In this role, you will own the SI/PI methodology for high-speed PCB and system designs — from early architecture through final release — ensuring electrical margins are met across interfaces running at multi-gigabit data rates.
Key Responsibilities
Perform pre- and post-layout SI simulations for high-speed serial interfaces including PCIe Gen5/Gen6, 112G/224G Ethernet.
Conduct channel analysis and link budget calculations; define topology constraints, trace geometry, stack-up requirements, and via optimization guidelines for PCB designers.
Develop and maintain COM, IBIS, S-parameter, and SPICE models; correlate simulation results against lab measurements.
Execute power delivery network (PDN) design and analysis: target impedance profiling, decoupling capacitor selection, AC/DC power analysis, and IR-drop simulation.
Drive DFI and design rule checks for SI/PI compliance; work with layout teams in Cadence Allegro / Sigrity or Ansys SIwave.
Collaborate with PCB design and layout engineers, and ASIC teams to define and review design guidelines early in the product lifecycle.
Support bring-up, debug signal quality issues, and document root-cause findings with clear corrective actions.
Develop and maintain simulation-to-hardware correlation databases to continuously improve modelling accuracy.
You may be a good fit if you have (Must-have qualifications)
B.S. or M.S. in Electrical Engineering or a closely related discipline.
5+ years of hands-on SI/PI experience on high-speed designs (>1 Gbps serial links or DDR4/5 and HBM3/4 memory interfaces).
Proficiency with industry SI/PI EDA tools (Cadence Sigrity, Ansys SIwave/HFSS, Keysight ADS, or equivalent).
Strong understanding of transmission line theory, return-loss, insertion-loss, crosstalk, eye-diagram analysis, and jitter decomposition.
Experience with PDN modelling, target impedance methodology, and DC IR analysis.
Working knowledge of multi-layer PCB stack-up design and controlled-impedance trace routing.
Hands-on lab skills: S-parameter measurements with VNA, time-domain reflectometry (TDR), BERT operation, and oscilloscope probing techniques
Strong candidates may also have experience with (Nice-to-have qualifications)
Prior work in data center, AI/ML accelerator, networking, or high-performance computing (HPC) hardware environments.
Experience scripting automated SI/PI simulation flows using Python or MATLAB to reduce manual simulation turnaround time.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are looking for a Signal Integrity and Power Integrity (SI/PI) Engineer to join our platform electrical engineering team. In this role, you will own the SI/PI methodology for high-speed PCB and system designs — from early architecture through final release — ensuring electrical margins are met across interfaces running at multi-gigabit data rates.\n\n\n\nKey Responsibilities\n\n - Perform pre- and post-layout SI simulations for high-speed serial interfaces including PCIe Gen5/Gen6, 112G/224G Ethernet.\n\n - Conduct channel analysis and link budget calculations; define topology constraints, trace geometry, stack-up requirements, and via optimization guidelines for PCB designers.\n\n - Develop and maintain COM, IBIS, S-parameter, and SPICE models; correlate simulation results against lab measurements.\n\n - Execute power delivery network (PDN) design and analysis: target impedance profiling, decoupling capacitor selection, AC/DC power analysis, and IR-drop simulation.\n\n - Drive DFI and design rule checks for SI/PI compliance; work with layout teams in Cadence Allegro / Sigrity or Ansys SIwave.\n\n - Collaborate with PCB design and layout engineers, and ASIC teams to define and review design guidelines early in the product lifecycle.\n\n - Support bring-up, debug signal quality issues, and document root-cause findings with clear corrective actions.\n\n - Develop and maintain simulation-to-hardware correlation databases to continuously improve modelling accuracy.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - B.S. or M.S. in Electrical Engineering or a closely related discipline.\n\n - 5+ years of hands-on SI/PI experience on high-speed designs (>1 Gbps serial links or DDR4/5 and HBM3/4 memory interfaces).\n\n - Proficiency with industry SI/PI EDA tools (Cadence Sigrity, Ansys SIwave/HFSS, Keysight ADS, or equivalent).\n\n - Strong understanding of transmission line theory, return-loss, insertion-loss, crosstalk, eye-diagram analysis, and jitter decomposition.\n\n - Experience with PDN modelling, target impedance methodology, and DC IR analysis.\n\n - Working knowledge of multi-layer PCB stack-up design and controlled-impedance trace routing.\n\n - Hands-on lab skills: S-parameter measurements with VNA, time-domain reflectometry (TDR), BERT operation, and oscilloscope probing techniques\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Prior work in data center, AI/ML accelerator, networking, or high-performance computing (HPC) hardware environments.\n\n - Experience scripting automated SI/PI simulation flows using Python or MATLAB to reduce manual simulation turnaround time.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed."},{"id":"bdec1a6d-300b-47fc-a551-3c937d76fee0","title":"ASIC Technical Program Manager","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-05-01T02:17:28.691+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/bdec1a6d-300b-47fc-a551-3c937d76fee0","applyUrl":"https://jobs.ashbyhq.com/etched/bdec1a6d-300b-47fc-a551-3c937d76fee0/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is seeking a highly skilled and motivated ASIC Technical Program Manager to join our silicon team. This is a hands-on, high-accountability role for someone who has lived inside the ASIC development cycle and can drive technical execution, not just track it. You will own program coordination across Physical Design, DFT, DV, and RTL teams while managing relationships with external vendors including IP providers, implementation partners, and EDA tool vendors. The ideal candidate has real tape-out experience, understands the full RTL-to-GDSII flow, and operates with the urgency and proactivity that a first-silicon program demands.
Key Responsibilities
Cross-Functional Technical Coordination: Own program management across Physical Design, DFT, DV, RTL, and Post-Silicon teams. Understand inter-team dependencies - know who owns what, when handoffs need to happen, and what needs to be signed off before downstream work can begin (e.g., RTL version gates for synthesis, DFT insertion checkpoints, ECO cycles).
Vendor Management: Engage directly with external vendors, including EDA partners and implementation partners. Hold vendors accountable to timelines and deliverables. Be prepared to push back, defend Etched’s technical requirements, and escalate when needed.
Risk Identification and Mitigation: Proactively surface critical path risks, schedule slippage, and cross-team blockers. Develop mitigation strategies in partnership with engineering leads and escalate appropriately to technical and executive stakeholders.
Project Planning and Execution: Manage the scheduling and execution of complex, multi-team hardware programs. Keep projects on track across tape-out milestones, synthesis respins, and signoff cycles.
Stakeholder Communication: Provide regular, clear updates to engineering leads, VP-level stakeholders, and executive leadership on project status, risks, and decisions required. Set the tone for meetings, facilitate alignment, mediate technical disagreements, and drive to decisions.
Process Coordination: Work with ops and engineering teams to maintain accurate tracking of program state, action owners, and open items. Support the adoption of tooling and dashboards that improve engineering visibility - though dashboard creation itself sits with the ops team.
Technical Acumen: Bring enough ASIC domain knowledge to communicate credibly with engineers across the design stack and with external partners. You don’t need to be a designer, but you need to know the difference between a .3 and .5 RTL release, understand where DFT fits in the flow, and have a feel for what a synthesis restart actually involves.
You may be a good fit if you have (Must-have qualifications)
At least one full ASIC tape-out under your belt. You should be able to speak fluently to what that process looks like end-to-end.
Solid understanding of the RTL-to-GDSII flow, including where Physical Design, DFT, DV, and RTL teams intersect and hand off to each other.
5+ years of experience in technical program management, engineering program management, or a closely related role within the semiconductor or hardware space.
Experience working directly with external EDA vendors or implementation partners - you’ve been in those rooms and know how to hold your ground.
Exceptional follow-through and proactivity. You chase down dependencies; you don’t wait for them to surface.
Strong communication and facilitation skills - you set a productive tone in meetings, keep discussions on track, and bring people to alignment.
Comfort with fast-paced, ambiguous startup environments where priorities shift and programs evolve quickly.
Bachelor’s degree in Engineering, Computer Science, or a related field.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched is seeking a highly skilled and motivated ASIC Technical Program Manager to join our silicon team. This is a hands-on, high-accountability role for someone who has lived inside the ASIC development cycle and can drive technical execution, not just track it. You will own program coordination across Physical Design, DFT, DV, and RTL teams while managing relationships with external vendors including IP providers, implementation partners, and EDA tool vendors. The ideal candidate has real tape-out experience, understands the full RTL-to-GDSII flow, and operates with the urgency and proactivity that a first-silicon program demands.\n\n\n\nKey Responsibilities\n\n - Cross-Functional Technical Coordination: Own program management across Physical Design, DFT, DV, RTL, and Post-Silicon teams. Understand inter-team dependencies - know who owns what, when handoffs need to happen, and what needs to be signed off before downstream work can begin (e.g., RTL version gates for synthesis, DFT insertion checkpoints, ECO cycles).\n\n - Vendor Management: Engage directly with external vendors, including EDA partners and implementation partners. Hold vendors accountable to timelines and deliverables. Be prepared to push back, defend Etched’s technical requirements, and escalate when needed.\n\n - Risk Identification and Mitigation: Proactively surface critical path risks, schedule slippage, and cross-team blockers. Develop mitigation strategies in partnership with engineering leads and escalate appropriately to technical and executive stakeholders.\n\n - Project Planning and Execution: Manage the scheduling and execution of complex, multi-team hardware programs. Keep projects on track across tape-out milestones, synthesis respins, and signoff cycles.\n\n - Stakeholder Communication: Provide regular, clear updates to engineering leads, VP-level stakeholders, and executive leadership on project status, risks, and decisions required. Set the tone for meetings, facilitate alignment, mediate technical disagreements, and drive to decisions.\n\n - Process Coordination: Work with ops and engineering teams to maintain accurate tracking of program state, action owners, and open items. Support the adoption of tooling and dashboards that improve engineering visibility - though dashboard creation itself sits with the ops team.\n\n - Technical Acumen: Bring enough ASIC domain knowledge to communicate credibly with engineers across the design stack and with external partners. You don’t need to be a designer, but you need to know the difference between a .3 and .5 RTL release, understand where DFT fits in the flow, and have a feel for what a synthesis restart actually involves.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - At least one full ASIC tape-out under your belt. You should be able to speak fluently to what that process looks like end-to-end.\n\n - Solid understanding of the RTL-to-GDSII flow, including where Physical Design, DFT, DV, and RTL teams intersect and hand off to each other.\n\n - 5+ years of experience in technical program management, engineering program management, or a closely related role within the semiconductor or hardware space.\n\n - Experience working directly with external EDA vendors or implementation partners - you’ve been in those rooms and know how to hold your ground.\n\n - Exceptional follow-through and proactivity. You chase down dependencies; you don’t wait for them to surface.\n\n - Strong communication and facilitation skills - you set a productive tone in meetings, keep discussions on track, and bring people to alignment.\n\n - Comfort with fast-paced, ambiguous startup environments where priorities shift and programs evolve quickly.\n\n - Bachelor’s degree in Engineering, Computer Science, or a related field.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n"},{"id":"d2064295-5939-4bca-a6af-5369a11a097e","title":"Product Engineer, Silicon Validation","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-05-06T17:52:02.509+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/d2064295-5939-4bca-a6af-5369a11a097e","applyUrl":"https://jobs.ashbyhq.com/etched/d2064295-5939-4bca-a6af-5369a11a097e/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking an experienced Product Engineer to lead silicon validation, test program
development, and productization for our large-format AI accelerator chips. In this role, you will develop and execute test strategies from first silicon through high-volume manufacturing, partnering with cross-functional teams and external vendors to ensure production quality and cost targets. This role is critical to achieving first-pass silicon success and seamless NPI-to-HVM transitions.
Key Responsibilities
Planning and executing comprehensive silicon characterization from first silicon through production release, including voltage-frequency-temperature characterization, corner testing, guard band determination, and production limit setting
Lead test cost optimization efforts while maintaining quality standards
Architect test flows to balance test time, coverage, and yield learning objectives for complex AI accelerator designs
Drive systematic yield improvement initiatives through data-driven root cause analysis using statistical tools and methods
Establish and track key quality metrics including DPPM and test escapes
Perform die/package level bring-ups, troubleshoot failure modes, and resolve issues by collaborating with design, system validation, and operations teams
Support OSAT bring-up, manage ATE/SLT manufacturing test program releases, and drive toward aggressive test cost goals
Productize test programs and methodologies for seamless transition from engineering to high-volume manufacturing
Analyze field return data and system-level failures to identify test coverage gaps and implement improved screening methods
Drive ATE-system correlation activities to ensure test program accuracy and validate performance against system specs
Manage relationships with test vendors, OSAT partners, and foundry partners
You may be a good fit if you have (Must-have qualifications)
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
5-10+ years of hands-on experience in silicon validation, product engineering, and ATE test development for advanced node semiconductors
Proven track record in yield optimization and DPPM reduction with quantifiable results
Experience with silicon characterization methodologies including Fmax/Vmin characterization and power/thermal validation
High-volume manufacturing test experience with demonstrated production scale results
Proficiency in yield and fail pareto analysis using JMP, Exensio, DataPower, or OptimalPlus
Strong understanding of test program debugging, failure analysis correlation, and yield enhancement techniques
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience developing and optimizing ATE test programs for wafer sort and final test on
Advantest V93K platforms
Experience managing wafer sort and final test across multiple advanced process nodes
GPU, HPC, or AI accelerator chip testing background with production scale results
HBM or high-speed memory interface testing and characterization experience
Leading NPI through high-volume production with multi-vendor qualification across multiple OSAT sites
Driving significant cost reduction initiatives
Multi-site parallel testing strategies and test time optimization for large-format dies
Scripting and automation skills (Python, Perl, TCL) for test data analysis and workflow automation
Cross-functional leadership in silicon bring-up and manufacturing ramp
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking an experienced Product Engineer to lead silicon validation, test program\n\ndevelopment, and productization for our large-format AI accelerator chips. In this role, you will develop and execute test strategies from first silicon through high-volume manufacturing, partnering with cross-functional teams and external vendors to ensure production quality and cost targets. This role is critical to achieving first-pass silicon success and seamless NPI-to-HVM transitions.\n\n\n\nKey Responsibilities\n\n - Planning and executing comprehensive silicon characterization from first silicon through production release, including voltage-frequency-temperature characterization, corner testing, guard band determination, and production limit setting\n\n - Lead test cost optimization efforts while maintaining quality standards\n\n - Architect test flows to balance test time, coverage, and yield learning objectives for complex AI accelerator designs\n\n - Drive systematic yield improvement initiatives through data-driven root cause analysis using statistical tools and methods\n\n - Establish and track key quality metrics including DPPM and test escapes\n\n - Perform die/package level bring-ups, troubleshoot failure modes, and resolve issues by collaborating with design, system validation, and operations teams\n\n - Support OSAT bring-up, manage ATE/SLT manufacturing test program releases, and drive toward aggressive test cost goals\n\n - Productize test programs and methodologies for seamless transition from engineering to high-volume manufacturing\n\n - Analyze field return data and system-level failures to identify test coverage gaps and implement improved screening methods\n\n - Drive ATE-system correlation activities to ensure test program accuracy and validate performance against system specs\n\n - Manage relationships with test vendors, OSAT partners, and foundry partners\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field\n\n - 5-10+ years of hands-on experience in silicon validation, product engineering, and ATE test development for advanced node semiconductors\n\n - Proven track record in yield optimization and DPPM reduction with quantifiable results\n\n - Experience with silicon characterization methodologies including Fmax/Vmin characterization and power/thermal validation\n\n - High-volume manufacturing test experience with demonstrated production scale results\n\n - Proficiency in yield and fail pareto analysis using JMP, Exensio, DataPower, or OptimalPlus\n\n - Strong understanding of test program debugging, failure analysis correlation, and yield enhancement techniques\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Experience developing and optimizing ATE test programs for wafer sort and final test on\n \n Advantest V93K platforms\n\n - Experience managing wafer sort and final test across multiple advanced process nodes\n\n - GPU, HPC, or AI accelerator chip testing background with production scale results\n\n - HBM or high-speed memory interface testing and characterization experience\n\n - Leading NPI through high-volume production with multi-vendor qualification across multiple OSAT sites\n\n - Driving significant cost reduction initiatives\n\n - Multi-site parallel testing strategies and test time optimization for large-format dies\n\n - Scripting and automation skills (Python, Perl, TCL) for test data analysis and workflow automation\n\n - Cross-functional leadership in silicon bring-up and manufacturing ramp\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"5c3d84b0-0d6a-430b-80b5-f378eb541202","title":"Advanced Packaging SI/PI Engineer","department":"Architecture","team":"Architecture","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-08-27T16:53:09.840+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/5c3d84b0-0d6a-430b-80b5-f378eb541202","applyUrl":"https://jobs.ashbyhq.com/etched/5c3d84b0-0d6a-430b-80b5-f378eb541202/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a Signal & Power Integrity Engineer you will be responsible for the electrical performance of our AI accelerator platform across silicon, package, and board. The ideal candidate will have extensive experience with high-power package and board designs, robust power delivery networks, and high-speed signaling solutions in advanced packaging. You will work closely with silicon, package, platform, and system teams to co-design world-class platforms with OSAT and ODM partners. Intense focus on pushing what is possible in power delivery and high-speed signaling for our silicon.
Key Responsibilities
SI/PI analysis of designs and optimization within 2D/2.5D/3D packages
Close interaction with Package Layout Designers, ASIC PD and IP teams as well as Board Schematic/Layout/SI/PI teams to optimize the best electrical performance
Drive SI requirements into interposer/substrate layout (high-speed routing: 112G/224G) from preliminary design through tape-out.
Drive PDN design and decoupling strategy across substrate and interposer, owning DC IR drop, dynamic IR drop, and impedance targets across all rails.
Own ball map / C4 / BGA pin assignment from soft freeze through final freeze in partnership with package layout, ASIC PD, and board layout teams.
Support board-level SI/PI and rack-level scale-up topology studies, including rack test vehicle design and cable characterization.
Participating in cross-functional meetings and design reviews.
You may be a good fit if you have (Must-have qualifications)
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with a strong understanding of signal integrity and power integrity concepts and fundamentals.
8+ years of SI/PI experience on high-performance ASIC, processor, or accelerator platforms.
Proven experience defining and closing PDN for high-power silicon, including substrate and PCB plane design, decap strategy, and dynamic IR/EM analysis.
Experience with developing systems with high-speed interfaces like HBM, SerDes and D2D interfaces.
Hands-on expertise with one or more of: ANSYS HFSS / SIwave, Cadence Sigrity (PowerSI / PowerDC), Keysight ADS.
Experience with CoWoS or equivalent advanced packaging materials and technologies including interposer SI/PI implications, C4 bump planning, and substrate stack-up trade-offs.
Track record of designing and correlating SI/PI test vehicles against silicon measurement during bring-up and lab characterization.
Strong analytical and communication skills, comfortable presenting risk, sign-off status, and trade-offs to cross-functional leadership.
Deeply creative and able to think from first principles.
Strong candidates may also have experience with (Nice-to-have qualifications)
Familiarity with full RTL-to-GDSII context and how PD decisions interact with package and board PDN.
Experience with multi-die, 2.5D, or 3D packaging signoff, including chip-package-system (CPS) co-design.
Project management experience coordinating across internal teams, OSAT partners, and PCB ODMs.
Familiarity with modern ML and LLM model architectures, accelerator architectures, or HPC system design.
Startup experience or comfort working in fast-paced environments.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nAs a Signal & Power Integrity Engineer you will be responsible for the electrical performance of our AI accelerator platform across silicon, package, and board. The ideal candidate will have extensive experience with high-power package and board designs, robust power delivery networks, and high-speed signaling solutions in advanced packaging. You will work closely with silicon, package, platform, and system teams to co-design world-class platforms with OSAT and ODM partners. Intense focus on pushing what is possible in power delivery and high-speed signaling for our silicon.\n\n\n\nKey Responsibilities\n\n - SI/PI analysis of designs and optimization within 2D/2.5D/3D packages\n\n - Close interaction with Package Layout Designers, ASIC PD and IP teams as well as Board Schematic/Layout/SI/PI teams to optimize the best electrical performance\n\n - Drive SI requirements into interposer/substrate layout (high-speed routing: 112G/224G) from preliminary design through tape-out.\n\n - Drive PDN design and decoupling strategy across substrate and interposer, owning DC IR drop, dynamic IR drop, and impedance targets across all rails.\n\n - Own ball map / C4 / BGA pin assignment from soft freeze through final freeze in partnership with package layout, ASIC PD, and board layout teams.\n\n - Support board-level SI/PI and rack-level scale-up topology studies, including rack test vehicle design and cable characterization.\n\n - Participating in cross-functional meetings and design reviews.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with a strong understanding of signal integrity and power integrity concepts and fundamentals.\n\n - 8+ years of SI/PI experience on high-performance ASIC, processor, or accelerator platforms.\n\n - Proven experience defining and closing PDN for high-power silicon, including substrate and PCB plane design, decap strategy, and dynamic IR/EM analysis.\n\n - Experience with developing systems with high-speed interfaces like HBM, SerDes and D2D interfaces.\n\n - Hands-on expertise with one or more of: ANSYS HFSS / SIwave, Cadence Sigrity (PowerSI / PowerDC), Keysight ADS.\n\n - Experience with CoWoS or equivalent advanced packaging materials and technologies including interposer SI/PI implications, C4 bump planning, and substrate stack-up trade-offs.\n\n - Track record of designing and correlating SI/PI test vehicles against silicon measurement during bring-up and lab characterization.\n\n - Strong analytical and communication skills, comfortable presenting risk, sign-off status, and trade-offs to cross-functional leadership.\n\n - Deeply creative and able to think from first principles.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Familiarity with full RTL-to-GDSII context and how PD decisions interact with package and board PDN.\n\n - Experience with multi-die, 2.5D, or 3D packaging signoff, including chip-package-system (CPS) co-design.\n\n - Project management experience coordinating across internal teams, OSAT partners, and PCB ODMs.\n\n - Familiarity with modern ML and LLM model architectures, accelerator architectures, or HPC system design.\n\n - Startup experience or comfort working in fast-paced environments.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"a735c757-7d39-47de-9329-77d6362b5547","title":"Firmware Engineer","department":"Software","team":"Software","employmentType":"FullTime","location":"Austin","secondaryLocations":[],"publishedAt":"2026-05-12T02:18:10.560+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressCountry":""}},"jobUrl":"https://jobs.ashbyhq.com/etched/a735c757-7d39-47de-9329-77d6362b5547","applyUrl":"https://jobs.ashbyhq.com/etched/a735c757-7d39-47de-9329-77d6362b5547/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Co-Develop cutting-edge software optimized across hardware and software driving the full potential of very large AI models.
Solve challenging problems across the full stack, from low-level drivers and APIs to high-level applications and frameworks.
Contribute to the development of AI solutions that will revolutionize industries like natural language processing, chain of reasoning automation, generative media.
You may be a good fit if you have
Bachelor's degree or equivalent practical experience.
Experience in software development, and with data structures/algorithms.
Experience developing and testing software on launching products.
Experience with firmware design, implementation, and troubleshooting.
Experience with embedded architectures, IO technologies (I2C, SPI, PCIe, DRAM etc.), as well as concepts like scalability, fault tolerance, and consistency.
Strong candidates may also have experience with (Nice-to-have qualifications)
Master’s degree Computer Science, or a related technical field.
Experience resolving customer-related issues.
Experience solving ambiguous problems.
Excellent verbal and written communication skills.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
This role is based in our Austin office, with regular time spent working alongside the team in San Jose. During the first quarter, expect to spend approximately two weeks per month at our San Jose headquarters to ramp quickly. After that, this shifts to roughly one week per month for ongoing collaboration.
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
This role owns the accelerator software that turns our custom hardware into an inference system. You'll work across the stack from first power-on through inference execution: bringing CPUs and boards to life, moving data between host and device, and translating inference requests into low-level operations that execute directly on the accelerator. The work spans ASIC software, platform firmware, and host-side kernel and drivers. We hire engineers who are deep in one area and curious about the others.
This role spans across three work areas. You would specialize in one and contribute across the others as the team grows:
ASIC Software — Build the software that runs directly on the accelerator. Work includes CPU initialization, RTOS, boot ROMs and bootloaders, MMU and IO drivers, ASIC/FW architecture and co-design, and on-device inference execution. Translate inference software requests into low-level device operations and scheduling decisions at nanosecond-level timescales to minimize overhead for highly interactive MoE and dense models.
Platform Software — Build the microcontroller and FPGA firmware that brings our custom hardware from powered off to operational. Own areas including power sequencing, board bring-up, telemetry, firmware updates, thermal and power management, and fault detection and recovery. Work directly with hardware engineers through schematic design, bring-up, validation, and production.
Host-side Kernel and Drivers — Build the software that connects the accelerator to the host and exposes it to the inference stack. Work includes Linux kernel and device drivers, PCIe and DMA, high-speed peripheral interfaces, memory management, FLR and virtualization/SR-IOV, and high-throughput, low-latency ring-buffer command flows.
You may be a good fit if you have
Bachelor's degree or equivalent practical experience.
Strong C/C++ and software engineering fundamentals.
Experience building and debugging low-level software that interacts directly with hardware.
Depth in one or more of firmware, embedded systems, device runtimes, operating systems, or kernel/driver development.
Experience shipping software on real hardware into production.
Familiarity with technologies such as ARM, PCIe, DMA, HBM, DRAM, Ethernet, UART, RTOS, or FPGA systems.
Strong systems intuition around performance, concurrency, memory, reliability, and fault handling.
Strong candidates may also have experience with (Nice-to-have qualifications)
Hardware bring-up experience on a new chip or board.
Experience with boot ROMs, secure boot, MMUs, RTOS, or CPU initialization.
Experience with PCIe virtualization, FLR, SR-IOV, DMA, ring buffers, or high-speed device communication.
Experience building accelerator runtimes, schedulers, command processors, or other latency-critical execution systems.
Experience using architecture details such as caching, memory hierarchy, or on-chip fabrics to make software decisions at nanosecond-level timescales.
Experience solving ambiguous problems where the hardware and software architecture evolve together.
Strong communication across firmware, hardware, architecture, kernel, and inference teams.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nThis role owns the accelerator software that turns our custom hardware into an inference system. You'll work across the stack from first power-on through inference execution: bringing CPUs and boards to life, moving data between host and device, and translating inference requests into low-level operations that execute directly on the accelerator. The work spans ASIC software, platform firmware, and host-side kernel and drivers. We hire engineers who are deep in one area and curious about the others.\n\n \n\nThis role spans across three work areas. You would specialize in one and contribute across the others as the team grows:\n\n - ASIC Software — Build the software that runs directly on the accelerator. Work includes CPU initialization, RTOS, boot ROMs and bootloaders, MMU and IO drivers, ASIC/FW architecture and co-design, and on-device inference execution. Translate inference software requests into low-level device operations and scheduling decisions at nanosecond-level timescales to minimize overhead for highly interactive MoE and dense models.\n\n - Platform Software — Build the microcontroller and FPGA firmware that brings our custom hardware from powered off to operational. Own areas including power sequencing, board bring-up, telemetry, firmware updates, thermal and power management, and fault detection and recovery. Work directly with hardware engineers through schematic design, bring-up, validation, and production.\n\n - Host-side Kernel and Drivers — Build the software that connects the accelerator to the host and exposes it to the inference stack. Work includes Linux kernel and device drivers, PCIe and DMA, high-speed peripheral interfaces, memory management, FLR and virtualization/SR-IOV, and high-throughput, low-latency ring-buffer command flows.\n\n\n\nYou may be a good fit if you have\n\n - Bachelor's degree or equivalent practical experience.\n\n - Strong C/C++ and software engineering fundamentals.\n\n - Experience building and debugging low-level software that interacts directly with hardware.\n\n - Depth in one or more of firmware, embedded systems, device runtimes, operating systems, or kernel/driver development.\n\n - Experience shipping software on real hardware into production.\n\n - Familiarity with technologies such as ARM, PCIe, DMA, HBM, DRAM, Ethernet, UART, RTOS, or FPGA systems.\n\n - Strong systems intuition around performance, concurrency, memory, reliability, and fault handling.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Hardware bring-up experience on a new chip or board.\n\n - Experience with boot ROMs, secure boot, MMUs, RTOS, or CPU initialization.\n\n - Experience with PCIe virtualization, FLR, SR-IOV, DMA, ring buffers, or high-speed device communication.\n\n - Experience building accelerator runtimes, schedulers, command processors, or other latency-critical execution systems.\n\n - Experience using architecture details such as caching, memory hierarchy, or on-chip fabrics to make software decisions at nanosecond-level timescales.\n\n - Experience solving ambiguous problems where the hardware and software architecture evolve together.\n\n - Strong communication across firmware, hardware, architecture, kernel, and inference teams.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n \n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"b45e357c-07ea-4499-9911-1d3cc9b9ac71","title":"Supercomputing Intern","department":"Software","team":"Software","employmentType":"Intern","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-05-19T22:14:12.985+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/b45e357c-07ea-4499-9911-1d3cc9b9ac71","applyUrl":"https://jobs.ashbyhq.com/etched/b45e357c-07ea-4499-9911-1d3cc9b9ac71/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Our supercomputing role focuses on the design, development, and deployment of ML system software required for operating rack-scale systems. Your work will span network performance, telemetry creation and processing pipelines, and analysis of system-level health and performance. Supercomputing is also responsible for the deployment and provisioning of software frameworks and hardware validation, maintaining secure and performant systems for data center scale ML workloads. We are looking for Spring '27, and Summer '27 interns.
You may be a good fit if you have
Progress towards a Bachelor’s, Master’s, or PhD degree in Computer Science, Engineering, or a related technical field.
Proficiency in C/C++ or Rust
Proficiency in Python
Strong fundamentals in data structures and algorithms
Strong understanding of low-level software engineering
Strong understanding of hardware/software co-design
Excellent communication and collaboration skills
Strong candidates may also have (Nice to have qualifications)
Experience with Linux internals, kernel development, or driver debugging
Experience with hardware diagnostics or interpreting hardware logs
Exposure to server virtualization or CI/CD pipelines
Experience with Rust or embedded development
We encourage you to apply even if you do not believe you meet every qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nOur supercomputing role focuses on the design, development, and deployment of ML system software required for operating rack-scale systems. Your work will span network performance, telemetry creation and processing pipelines, and analysis of system-level health and performance. Supercomputing is also responsible for the deployment and provisioning of software frameworks and hardware validation, maintaining secure and performant systems for data center scale ML workloads. We are looking for Spring '27, and Summer '27 interns.\n\n\n\nYou may be a good fit if you have\n\n - Progress towards a Bachelor’s, Master’s, or PhD degree in Computer Science, Engineering, or a related technical field.\n\n - Proficiency in C/C++ or Rust\n\n - Proficiency in Python\n\n - Strong fundamentals in data structures and algorithms\n\n - Strong understanding of low-level software engineering\n\n - Strong understanding of hardware/software co-design\n\n - Excellent communication and collaboration skills\n\n\n\nStrong candidates may also have (Nice to have qualifications)\n\n - Experience with Linux internals, kernel development, or driver debugging\n\n - Experience with hardware diagnostics or interpreting hardware logs\n\n - Exposure to server virtualization or CI/CD pipelines\n\n - Experience with Rust or embedded development\n\nWe encourage you to apply even if you do not believe you meet every qualification.\n\n\n\nProgram details\n\n - 12-week paid internship\n\n - Generous housing support for those relocating\n\n - Daily lunch and dinner in our office\n\n - Based at our office in San Jose, CA\n\n - Direct mentorship from industry leaders and world-class engineers\n\n - Opportunity to work on one of the most important problems of our time\n\n\nFor any questions, contact internships@etched.com\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"38eac11e-2970-40d1-a477-4e08311371f0","title":"Optical Systems Engineer","department":"Platform","team":"Platform","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-05-22T20:27:14.227+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/38eac11e-2970-40d1-a477-4e08311371f0","applyUrl":"https://jobs.ashbyhq.com/etched/38eac11e-2970-40d1-a477-4e08311371f0/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is looking for an exceptional Optical Systems Engineer to join our team. In this role, you will own the definition and implementation of the optical interconnect architecture for our next-generation accelerator systems and help us scale our manufacturing capabilities.
Key Responsibilities
Lead optical link architecture and system design for Etched's accelerator systems
Evaluate and integrate next-generation interconnect technologies (such as NPO, CPO, and OCI) into our product roadmap
Drive prototypes through definition, validation, and the transition to volume production
Partner with Signal Integrity, PCB, ASIC, Thermal, and Mechanical Engineering teams to implement electrical-optical interfaces in high-performance AI servers
Engage optical module, laser, and PIC suppliers on specifications, qualification, and integration
Capture multi-rack interconnect requirements including topology, reach, connectors, and fiber management to ensure our products meet them
Bring up optical interfaces on the accelerator card and debug link issues using BERTs, sampling scopes, and OSAs
Define optical bring-up strategies and equipment while supporting test development for high-volume manufacturing
Own optics-related documentation, including AVLs, fiber/cable BOMs, serviceability guidelines, and assembly procedures
You may be a good fit if you have (Must-have qualifications)
5–10 years of experience in optical interconnect, transceiver, or photonic system design and development for high-density compute systems
Expertise across advanced optical interconnect architectures, including Co-Packaged Optics (CPO), Near-Packaged Optics (NPO), Optical Compute Interconnect (OCI), Linear Pluggable Optics (LPO), and emerging form factors (XPO)
Clear understanding of architectural tradeoffs across these technologies: energy-per-bit, bandwidth density, reach, latency, serviceability, and reliability
Strong fundamentals in optical link engineering, including link-budget analysis, IL/RL, OSNR, eye diagrams, jitter, BER, and FEC margining
Working knowledge of laser sources, modulators, TIAs, and DSPs/retimers
Knowledge of high-speed host interfaces such as 100G/200G-per-lane PAM4
Experience with traditional pluggable solutions (OSFP, QSFP-DD)
Deep familiarity with photonic-electronic co-design and advanced packaging methods, such as fiber-attach (edge couplers, grating couplers, V-groove FAUs, detachable optical connectors), optical interposers, and 2.5D/3D heterogeneous integration
Comfort co-designing optical engines alongside the ASIC, substrate, package, and cold-plate-integrated liquid cooling solutions
Conversant in relevant industry standards and MSAs (OCI, Open CPX, OIF, UCIe)
Proven track record of bringing up optical links and PIC-based subsystems alongside silicon, including root-cause debugging with PIC foundries, ELS vendors, and OSATs
Deep understanding of datacenter infrastructure, specifically high-power (>10 kW) liquid-cooled AI servers and cluster-scale optical fabrics
Passionate about modern AIs like ChatGPT, and willing to learn about them on the job
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched is looking for an exceptional Optical Systems Engineer to join our team. In this role, you will own the definition and implementation of the optical interconnect architecture for our next-generation accelerator systems and help us scale our manufacturing capabilities.\n\n\n\nKey Responsibilities\n\n - Lead optical link architecture and system design for Etched's accelerator systems\n\n - Evaluate and integrate next-generation interconnect technologies (such as NPO, CPO, and OCI) into our product roadmap\n\n - Drive prototypes through definition, validation, and the transition to volume production\n\n - Partner with Signal Integrity, PCB, ASIC, Thermal, and Mechanical Engineering teams to implement electrical-optical interfaces in high-performance AI servers\n\n - Engage optical module, laser, and PIC suppliers on specifications, qualification, and integration\n\n - Capture multi-rack interconnect requirements including topology, reach, connectors, and fiber management to ensure our products meet them\n\n - Bring up optical interfaces on the accelerator card and debug link issues using BERTs, sampling scopes, and OSAs\n\n - Define optical bring-up strategies and equipment while supporting test development for high-volume manufacturing\n\n - Own optics-related documentation, including AVLs, fiber/cable BOMs, serviceability guidelines, and assembly procedures\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - 5–10 years of experience in optical interconnect, transceiver, or photonic system design and development for high-density compute systems\n\n - Expertise across advanced optical interconnect architectures, including Co-Packaged Optics (CPO), Near-Packaged Optics (NPO), Optical Compute Interconnect (OCI), Linear Pluggable Optics (LPO), and emerging form factors (XPO)\n\n - Clear understanding of architectural tradeoffs across these technologies: energy-per-bit, bandwidth density, reach, latency, serviceability, and reliability\n\n - Strong fundamentals in optical link engineering, including link-budget analysis, IL/RL, OSNR, eye diagrams, jitter, BER, and FEC margining\n\n - Working knowledge of laser sources, modulators, TIAs, and DSPs/retimers\n\n - Knowledge of high-speed host interfaces such as 100G/200G-per-lane PAM4\n\n - Experience with traditional pluggable solutions (OSFP, QSFP-DD)\n\n - Deep familiarity with photonic-electronic co-design and advanced packaging methods, such as fiber-attach (edge couplers, grating couplers, V-groove FAUs, detachable optical connectors), optical interposers, and 2.5D/3D heterogeneous integration\n\n - Comfort co-designing optical engines alongside the ASIC, substrate, package, and cold-plate-integrated liquid cooling solutions\n\n - Conversant in relevant industry standards and MSAs (OCI, Open CPX, OIF, UCIe)\n\n - Proven track record of bringing up optical links and PIC-based subsystems alongside silicon, including root-cause debugging with PIC foundries, ELS vendors, and OSATs\n\n - Deep understanding of datacenter infrastructure, specifically high-power (>10 kW) liquid-cooled AI servers and cluster-scale optical fabrics\n\n - Passionate about modern AIs like ChatGPT, and willing to learn about them on the job\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.\n\n"},{"id":"5cc7effb-c1d8-4cb8-a0c3-0bd4f7045fe5","title":"Product Quality Engineer","department":"Production","team":"Production","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-05-27T20:57:31.436+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/5cc7effb-c1d8-4cb8-a0c3-0bd4f7045fe5","applyUrl":"https://jobs.ashbyhq.com/etched/5cc7effb-c1d8-4cb8-a0c3-0bd4f7045fe5/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is hiring a Product Quality Engineer based in the US to ensure robust quality systems across our suppliers, domestic contract manufacturing and integration partners (L10 server, L11 rack). You will own quality assurance for our advanced AI hardware builds—driving inspection and test strategies, resolving systemic issues, and ensuring that every system leaving the factory meets Etched’s standards for performance and reliability.
This role will collaborate closely with Manufacturing Operations, Supply Chain, and Test Engineering, serving as the bridge between Etched HQ and factory teams. It is ideal for someone who enjoys being hands-on in the factory, while also establishing the scalable quality processes needed to support high-volume production.
Key Responsibilities
Lead quality assurance across semiconductor (ASIC/chip), PCB/A, L6 component suppliers, L10 server manufacturers, and L11 rack integration partners in both the US and overseas.
Establish and maintain robust IQC, IPQC, and OQC processes, including inspection criteria, control plans, and quality gates across incoming materials, PCB/A manufacturing, system assembly, and rack integration.
Partner with suppliers and contract manufacturers to oversee SMT processes, including SPI, AOI, and X-ray inspection, ensuring process capability and defect prevention throughout PCB/A production.
Partner with Test Engineering to define system-level test coverage, burn-in protocols, reliability validation, and production acceptance criteria.
Drive failure analysis, root-cause investigations, and structured corrective and preventive actions using 8D, CAPA, and FMEA methodologies.
Track, analyze, and report quality metrics including yield, Cpk/SPC, defect density, escapes, and DPPM, driving data-based improvements with engineering and operations teams.
Participate in ECO reviews, configuration changes, and NPI build reviews to establish and enforce quality gates throughout product introduction and production ramp.
Conduct supplier audits and ensure adherence to applicable quality standards (ISO/AS, IPC) and Etched manufacturing requirements.
Collaborate with Manufacturing Operations to improve line capability, documentation, training, process controls, and continuous improvement initiatives across suppliers and manufacturing partners.
You may be a good fit if you have (Must-have qualifications)
5+ years of experience in quality engineering, supplier quality, or manufacturing quality supporting ASIC/chip, semiconductor, PCB/A, server, or other high-performance hardware products.
Hands-on experience supporting quality across L6 components, L10 server assembly, and L11 rack integration in partnership with Tier 1 contract manufacturers and/or ODMs.
Strong working knowledge of PCB/A manufacturing processes, including SMT, SPI, AOI, and X-ray inspection, with the ability to drive process improvements alongside manufacturing partners.
Demonstrated experience establishing and managing IQC, IPQC, and OQC quality systems in high-volume manufacturing environments.
Deep knowledge of structured quality methodologies including 8D, CAPA, FMEA, SPC, Cpk, control plans, and statistical process control.
Experience tracking and improving manufacturing quality metrics such as yield, DPPM, defect density, and production escapes.
Familiarity with server assembly, burn-in, and system-level test workflows.
Excellent cross-functional communication skills with the ability to drive alignment across engineering, operations, suppliers, and contract manufacturers.
Comfortable working on-site at supplier and CM factories, resolving production issues in real time.
Strong candidates may also have experience with (Nice-to-have qualifications)
Background in AI ASIC or high-performance compute hardware.
Experience with L11 rack-level integration and validation.
Exposure to thermal/power stress testing and system reliability engineering.
Prior experience ramping high-complexity systems from NPI into mass production.
Engineering background in electrical, mechanical, manufacturing, or industrial engineering.
Experience developing supplier quality strategies for advanced compute hardware programs.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched is hiring a Product Quality Engineer based in the US to ensure robust quality systems across our suppliers, domestic contract manufacturing and integration partners (L10 server, L11 rack). You will own quality assurance for our advanced AI hardware builds—driving inspection and test strategies, resolving systemic issues, and ensuring that every system leaving the factory meets Etched’s standards for performance and reliability.\n\nThis role will collaborate closely with Manufacturing Operations, Supply Chain, and Test Engineering, serving as the bridge between Etched HQ and factory teams. It is ideal for someone who enjoys being hands-on in the factory, while also establishing the scalable quality processes needed to support high-volume production.\n\n\n\nKey Responsibilities\n\n - Lead quality assurance across semiconductor (ASIC/chip), PCB/A, L6 component suppliers, L10 server manufacturers, and L11 rack integration partners in both the US and overseas.\n\n - Establish and maintain robust IQC, IPQC, and OQC processes, including inspection criteria, control plans, and quality gates across incoming materials, PCB/A manufacturing, system assembly, and rack integration.\n\n - Partner with suppliers and contract manufacturers to oversee SMT processes, including SPI, AOI, and X-ray inspection, ensuring process capability and defect prevention throughout PCB/A production.\n\n - Partner with Test Engineering to define system-level test coverage, burn-in protocols, reliability validation, and production acceptance criteria.\n\n - Drive failure analysis, root-cause investigations, and structured corrective and preventive actions using 8D, CAPA, and FMEA methodologies.\n\n - Track, analyze, and report quality metrics including yield, Cpk/SPC, defect density, escapes, and DPPM, driving data-based improvements with engineering and operations teams.\n\n - Participate in ECO reviews, configuration changes, and NPI build reviews to establish and enforce quality gates throughout product introduction and production ramp.\n\n - Conduct supplier audits and ensure adherence to applicable quality standards (ISO/AS, IPC) and Etched manufacturing requirements.\n\n - Collaborate with Manufacturing Operations to improve line capability, documentation, training, process controls, and continuous improvement initiatives across suppliers and manufacturing partners.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - 5+ years of experience in quality engineering, supplier quality, or manufacturing quality supporting ASIC/chip, semiconductor, PCB/A, server, or other high-performance hardware products.\n\n - Hands-on experience supporting quality across L6 components, L10 server assembly, and L11 rack integration in partnership with Tier 1 contract manufacturers and/or ODMs.\n\n - Strong working knowledge of PCB/A manufacturing processes, including SMT, SPI, AOI, and X-ray inspection, with the ability to drive process improvements alongside manufacturing partners.\n\n - Demonstrated experience establishing and managing IQC, IPQC, and OQC quality systems in high-volume manufacturing environments.\n\n - Deep knowledge of structured quality methodologies including 8D, CAPA, FMEA, SPC, Cpk, control plans, and statistical process control.\n\n - Experience tracking and improving manufacturing quality metrics such as yield, DPPM, defect density, and production escapes.\n\n - Familiarity with server assembly, burn-in, and system-level test workflows.\n\n - Excellent cross-functional communication skills with the ability to drive alignment across engineering, operations, suppliers, and contract manufacturers.\n\n - Comfortable working on-site at supplier and CM factories, resolving production issues in real time.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Background in AI ASIC or high-performance compute hardware.\n\n - Experience with L11 rack-level integration and validation.\n\n - Exposure to thermal/power stress testing and system reliability engineering.\n\n - Prior experience ramping high-complexity systems from NPI into mass production.\n\n - Engineering background in electrical, mechanical, manufacturing, or industrial engineering.\n\n - Experience developing supplier quality strategies for advanced compute hardware programs.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"811532da-5d3a-4382-b4cf-40b620459b49","title":"Supplier Quality Engineer (Taiwan)","department":"Production","team":"Production","employmentType":"FullTime","location":"Taoyuan","secondaryLocations":[],"publishedAt":"2026-07-01T00:19:16.564+00:00","isListed":true,"isRemote":null,"workplaceType":null,"address":{"postalAddress":{"addressRegion":"Taiwan","addressCountry":"Taiwan","addressLocality":"Taoyuan"}},"jobUrl":"https://jobs.ashbyhq.com/etched/811532da-5d3a-4382-b4cf-40b620459b49","applyUrl":"https://jobs.ashbyhq.com/etched/811532da-5d3a-4382-b4cf-40b620459b49/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is hiring a Quality Engineer based in Taipei to ensure robust quality systems across our critical component suppliers, domestic contract manufacturing and integration partners (L10 server, L11 rack). You will own quality assurance for our advanced AI hardware builds—driving inspection and test strategies, resolving systemic issues, and ensuring that every system leaving the factory meets Etched’s standards for performance and reliability.
This role will collaborate closely with Manufacturing Operations, Supply Chain, and Test Engineering, serving as the bridge between Etched HQ and factory teams. It is ideal for someone who enjoys being hands-on in the factory, while also establishing the scalable quality processes needed to support high-volume production.
Key Responsibilities
Lead quality assurance for overseas and asia based component suppliers, contract manufacturers and integrators (semiconductor, PCBA, L10 servers, L11 racks).
Establish and maintain incoming, in-process, and outgoing inspection processes to ensure compliance with Etched standards.
Partner with Test Engineering to define system-level test coverage, burn-in protocols, and reliability validation.
Drive failure analysis, root-cause investigations, and corrective/preventive actions (8D, CAPA).
Track, analyze, and report on quality metrics (yield, defect density, escapes, DPPM) to both engineering and operations stakeholders.
Participate in ECO reviews, configuration changes, and NPI build reviews to enforce quality gates.
Conduct supplier audits and ensure adherence to industry standards (ISO/AS, IPC).
Collaborate with Manufacturing Operations to scale line capability, training, and documentation.
Champion continuous improvement projects across yield, throughput, and defect reduction.
You may be a good fit if you have:
Hands-on experience supporting quality across L6 components, L10 server assembly, and L11 rack integration in partnership with Tier 1 contract manufacturers and/or ODMs.
Strong working knowledge of PCB/A manufacturing processes, including SMT, SPI, AOI, and X-ray inspection, with the ability to drive process improvements alongside manufacturing partners.
Demonstrated experience establishing and managing IQC, IPQC, and OQC quality systems in high-volume manufacturing environments.
Deep knowledge of structured quality methodologies including 8D, CAPA, FMEA, SPC, Cpk, control plans, and statistical process control.
Experience tracking and improving manufacturing quality metrics such as yield, DPPM, defect density, and production escapes.
Familiarity with server assembly, burn-in, and system-level test workflows.
Excellent cross-functional communication skills with the ability to drive alignment across engineering, operations, suppliers, and contract manufacturers.
Comfortable working on-site at supplier and CM factories, resolving production issues in real time.
Strong candidates may also have:
Familiarity with the SMT and DIP process.
Exposure to thermal/power stress testing and system reliability engineering.
Prior experience ramping high-complexity systems from NPI into MP.
Engineering background in electrical, mechanical, or manufacturing domains.
Benefits
Competitive compensation packages, including generous equity packages
Comprehensive insurance coverage and other top-of-market benefit
US onboarding experience in our Silicon Valley headquarters
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched is hiring a Quality Engineer based in Taipei to ensure robust quality systems across our critical component suppliers, domestic contract manufacturing and integration partners (L10 server, L11 rack). You will own quality assurance for our advanced AI hardware builds—driving inspection and test strategies, resolving systemic issues, and ensuring that every system leaving the factory meets Etched’s standards for performance and reliability.\n\nThis role will collaborate closely with Manufacturing Operations, Supply Chain, and Test Engineering, serving as the bridge between Etched HQ and factory teams. It is ideal for someone who enjoys being hands-on in the factory, while also establishing the scalable quality processes needed to support high-volume production.\n\n\n\nKey Responsibilities\n\n - Lead quality assurance for overseas and asia based component suppliers, contract manufacturers and integrators (semiconductor, PCBA, L10 servers, L11 racks).\n\n - Establish and maintain incoming, in-process, and outgoing inspection processes to ensure compliance with Etched standards.\n\n - Partner with Test Engineering to define system-level test coverage, burn-in protocols, and reliability validation.\n\n - Drive failure analysis, root-cause investigations, and corrective/preventive actions (8D, CAPA).\n\n - Track, analyze, and report on quality metrics (yield, defect density, escapes, DPPM) to both engineering and operations stakeholders.\n\n - Participate in ECO reviews, configuration changes, and NPI build reviews to enforce quality gates.\n\n - Conduct supplier audits and ensure adherence to industry standards (ISO/AS, IPC).\n\n - Collaborate with Manufacturing Operations to scale line capability, training, and documentation.\n\n - Champion continuous improvement projects across yield, throughput, and defect reduction.\n \n \n\nYou may be a good fit if you have:\n\n - Hands-on experience supporting quality across L6 components, L10 server assembly, and L11 rack integration in partnership with Tier 1 contract manufacturers and/or ODMs.\n\n - Strong working knowledge of PCB/A manufacturing processes, including SMT, SPI, AOI, and X-ray inspection, with the ability to drive process improvements alongside manufacturing partners.\n\n - Demonstrated experience establishing and managing IQC, IPQC, and OQC quality systems in high-volume manufacturing environments.\n\n - Deep knowledge of structured quality methodologies including 8D, CAPA, FMEA, SPC, Cpk, control plans, and statistical process control.\n\n - Experience tracking and improving manufacturing quality metrics such as yield, DPPM, defect density, and production escapes.\n\n - Familiarity with server assembly, burn-in, and system-level test workflows.\n\n - Excellent cross-functional communication skills with the ability to drive alignment across engineering, operations, suppliers, and contract manufacturers.\n\n - Comfortable working on-site at supplier and CM factories, resolving production issues in real time.\n\n\n\nStrong candidates may also have:\n\n - Familiarity with the SMT and DIP process.\n\n - Exposure to thermal/power stress testing and system reliability engineering.\n\n - Prior experience ramping high-complexity systems from NPI into MP.\n\n - Engineering background in electrical, mechanical, or manufacturing domains.\n\n\n\nBenefits\n\n - Competitive compensation packages, including generous equity packages\n\n - Comprehensive insurance coverage and other top-of-market benefit\n\n - US onboarding experience in our Silicon Valley headquarters\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"bab9e9c5-d0b0-4bac-b784-20a177a6fc3a","title":"Emulation Engineer, Hardware Prototyping (HAPS)","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-06-01T22:37:15.236+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/bab9e9c5-d0b0-4bac-b784-20a177a6fc3a","applyUrl":"https://jobs.ashbyhq.com/etched/bab9e9c5-d0b0-4bac-b784-20a177a6fc3a/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
What you'll do
Own HAPS bring-up. Take RTL from the design teams and get it running on the prototype — partitioning, multi-FPGA timing closure, clocking, memory mapping, and full-chip assembly.
Expand platform coverage. Stand up new subsystem configurations so more of the chip is available to software earlier. Each new partition you enable unblocks a team.
Support your users. Firmware, driver, and software engineers are your customers. You'll help them get running, triage their failures, and figure out whether the bug is theirs, the RTL's, or the platform's.
Debug hard problems. Trace issues across FPGA boundaries with waveform capture, protocol analyzers, and whatever tooling you have to build yourself.
Bring up interfaces. PCIe, Ethernet, HBM and memory models, JTAG, I2C, UART, QSPI — both the models and the physical bridges.
Build the flows. Automate builds, regressions, and image delivery so the platform scales past the number of people who understand it.
Work across the org. Design, DV, Silicon Validation, Performance, Firmware, and Software — plus direct partnership with Synopsys on tool issues and platform capability.
Representative projects
Bring up a new subsystem partition on HAPS and get firmware booting on it end to end.
Build a self-service flow that lets software users load and run their own images without prototyping support in the loop.
Instrument deep trace capture across partition boundaries and build the tooling that surfaces it usefully.
Create configurable chip-to-chip and off-chip interface models using prototyping-efficient primitives.
Close timing on a partition that doesn't want to close, and document how you did it so the next person doesn't have to rediscover it.
You may be a good fit if you have
Hands-on FPGA prototyping experience — HAPS, Protium, proFPGA, S2C, or similar — covering partitioning, synthesis, timing closure, bring-up, and debug.
Strong SystemVerilog and Verilog, with a working understanding of what synthesizes well for FPGA and what doesn't.
Solid C/C++ and Linux system development.
Scripting fluency for automation — Python, TCL, shell.
Comfort debugging failures you didn't cause, in code you didn't write, for users who need an answer today.
Strong candidates may also have
Experience with ProtoCompiler, Vivado, or Synopsys prototyping flows.
Firmware, driver, or bootloader bring-up experience on pre-silicon platforms.
Experience with emulation platforms (ZeBu, Palladium, Veloce) alongside prototyping — we run both, and the collateral is shared.
UVM verification environments, DFT, and testbench modeling.
Waveform debug tooling: Verdi, SimVision.
Cluster and job scheduling experience (SLURM), CI systems.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
Compensation Range
$150,000 - $275,000
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nWhat you'll do\n\n - Own HAPS bring-up. Take RTL from the design teams and get it running on the prototype — partitioning, multi-FPGA timing closure, clocking, memory mapping, and full-chip assembly.\n\n - Expand platform coverage. Stand up new subsystem configurations so more of the chip is available to software earlier. Each new partition you enable unblocks a team.\n\n - Support your users. Firmware, driver, and software engineers are your customers. You'll help them get running, triage their failures, and figure out whether the bug is theirs, the RTL's, or the platform's.\n\n - Debug hard problems. Trace issues across FPGA boundaries with waveform capture, protocol analyzers, and whatever tooling you have to build yourself.\n\n - Bring up interfaces. PCIe, Ethernet, HBM and memory models, JTAG, I2C, UART, QSPI — both the models and the physical bridges.\n\n - Build the flows. Automate builds, regressions, and image delivery so the platform scales past the number of people who understand it.\n\n - Work across the org. Design, DV, Silicon Validation, Performance, Firmware, and Software — plus direct partnership with Synopsys on tool issues and platform capability.\n\n\n\nRepresentative projects\n\n - Bring up a new subsystem partition on HAPS and get firmware booting on it end to end.\n\n - Build a self-service flow that lets software users load and run their own images without prototyping support in the loop.\n\n - Instrument deep trace capture across partition boundaries and build the tooling that surfaces it usefully.\n\n - Create configurable chip-to-chip and off-chip interface models using prototyping-efficient primitives.\n\n - Close timing on a partition that doesn't want to close, and document how you did it so the next person doesn't have to rediscover it.\n \n\nYou may be a good fit if you have\n\n - Hands-on FPGA prototyping experience — HAPS, Protium, proFPGA, S2C, or similar — covering partitioning, synthesis, timing closure, bring-up, and debug.\n\n - Strong SystemVerilog and Verilog, with a working understanding of what synthesizes well for FPGA and what doesn't.\n\n - Solid C/C++ and Linux system development.\n\n - Scripting fluency for automation — Python, TCL, shell.\n\n - Comfort debugging failures you didn't cause, in code you didn't write, for users who need an answer today.\n\n\n\nStrong candidates may also have\n\n - Experience with ProtoCompiler, Vivado, or Synopsys prototyping flows.\n\n - Firmware, driver, or bootloader bring-up experience on pre-silicon platforms.\n\n - Experience with emulation platforms (ZeBu, Palladium, Veloce) alongside prototyping — we run both, and the collateral is shared.\n\n - UVM verification environments, DFT, and testbench modeling.\n\n - Waveform debug tooling: Verdi, SimVision.\n\n - Cluster and job scheduling experience (SLURM), CI systems.\n \n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nCompensation Range\n\n - $150,000 - $275,000\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"845adb04-9dbe-43f5-b927-22115dea25a1","title":"Thermal /Mechanical Hybrid Engineer","department":"Platform","team":"Platform","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-06-11T23:09:09.956+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/845adb04-9dbe-43f5-b927-22115dea25a1","applyUrl":"https://jobs.ashbyhq.com/etched/845adb04-9dbe-43f5-b927-22115dea25a1/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a highly experienced Thermal/Mechanical Engineer who has experience designing direct-to-chip cold plate modules to join our team and lead our efforts in optimizing thermal management for high-performance systems. You must be familiar with both the thermal and mechanical aspects of the cold plate module as well as their adjacent components such as thermal interface material (TIM). You will play a crucial role in developing and implementing advanced thermal management solutions for our high-performance data center products. Your expertise in water cooling, thermal simulations, mechanical engineering and cooling system design will be essential in ensuring optimal thermal performance and reliability.
Key responsibilities
Lead the in-house design and optimization of various direct-to-chip cold plate modules
Lead the design and optimization of thermal management systems for high-performance data center products, focusing on water cooling solutions and advanced cooling concepts.
Cover both the thermal and mechanical engineering design
Be very familiar with the key components of a cold plate, including but not limited to pedestals, nozzles, pedestals, internal fin designs (e.g. skived fins), etc.
Develop and implement water cooling solutions, including internal manifolds, quick disconnects, CDUs (Coolant Distribution Units), and heat exchangers. Ensure effective cooling and thermal management for high-power processors and other critical components
Candidate must be able to run liquid thermal simulations to predict and analyze thermal performance of the heat exchanger
Must be familiar with the mechanical design, fabrication, and mechanical assembly of the cold plate.
Evaluate and select thermal interface materials (TIMs) for various heat sinks and cooling solutions. Optimize TIM performance to enhance thermal conductivity and heat dissipation.
Explore and implement advanced thermal cooling concepts, including phase change cooling, liquid cooling, and other cutting-edge technologies.
Oversee the testing and validation of thermal management systems to ensure they meet performance, reliability, and efficiency standards. Address any issues related to thermal performance and provide solutions.
Create and maintain comprehensive documentation for thermal management designs, including design specifications, simulation results, and testing reports. Report on performance and any issues identified during testing.
Work closely with cross-functional teams, including mechanical engineers, electrical systems engineers, and vendors, to ensure seamless integration and operation of thermal management solutions.
You maybe a good fit if you have
A Bachelor’s degree in Mechanical Engineering or Thermal Engineering, or a related field. Advanced degrees or certifications in thermal management or related areas are highly desirable.
A Minimum of 5 years of experience in thermal and mechanical engineering with a strong focus on water cooling systems and advanced thermal management solutions.
Strong expertise in mechanical design
Proven expertise in designing and managing direct-to-processor cooling systems and thermal simulations.
Extensive experience with cold plate designs, water cooling systems, including internal manifolds, quick disconnects, CDUs, and heat exchangers
Proficiency in mechanical tolerances and generating mechanical drawings using GD&T
Proficiency in mechanical CAD software and tools such as NX, Creo, CATIA, or similar is required
Apply DFM and DFA principles to optimize designs for cost-effective manufacturing, assembly, and maintenance, ensuring high efficiency and reduced production costs.
Proven expertise in designing and managing direct-to-processor cold plate modules
Proficiency in thermal simulation tools such as Fluent and techniques to predict and analyze thermal performance of heat exchangers
Knowledge of various thermal interface materials (TIMs) and heat sink designs
Experience with advanced thermal cooling concepts and technologies.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a highly experienced Thermal/Mechanical Engineer who has experience designing direct-to-chip cold plate modules to join our team and lead our efforts in optimizing thermal management for high-performance systems. You must be familiar with both the thermal and mechanical aspects of the cold plate module as well as their adjacent components such as thermal interface material (TIM). You will play a crucial role in developing and implementing advanced thermal management solutions for our high-performance data center products. Your expertise in water cooling, thermal simulations, mechanical engineering and cooling system design will be essential in ensuring optimal thermal performance and reliability.\n\n\n\nKey responsibilities\n\n - Lead the in-house design and optimization of various direct-to-chip cold plate modules\n\n - Lead the design and optimization of thermal management systems for high-performance data center products, focusing on water cooling solutions and advanced cooling concepts.\n\n - Cover both the thermal and mechanical engineering design\n\n - Be very familiar with the key components of a cold plate, including but not limited to pedestals, nozzles, pedestals, internal fin designs (e.g. skived fins), etc.\n\n - Develop and implement water cooling solutions, including internal manifolds, quick disconnects, CDUs (Coolant Distribution Units), and heat exchangers. Ensure effective cooling and thermal management for high-power processors and other critical components\n\n - Candidate must be able to run liquid thermal simulations to predict and analyze thermal performance of the heat exchanger\n\n - Must be familiar with the mechanical design, fabrication, and mechanical assembly of the cold plate.\n\n - Evaluate and select thermal interface materials (TIMs) for various heat sinks and cooling solutions. Optimize TIM performance to enhance thermal conductivity and heat dissipation.\n\n - Explore and implement advanced thermal cooling concepts, including phase change cooling, liquid cooling, and other cutting-edge technologies.\n\n - Oversee the testing and validation of thermal management systems to ensure they meet performance, reliability, and efficiency standards. Address any issues related to thermal performance and provide solutions.\n\n - Create and maintain comprehensive documentation for thermal management designs, including design specifications, simulation results, and testing reports. Report on performance and any issues identified during testing.\n\n - Work closely with cross-functional teams, including mechanical engineers, electrical systems engineers, and vendors, to ensure seamless integration and operation of thermal management solutions.\n \n \n\nYou maybe a good fit if you have\n\n - A Bachelor’s degree in Mechanical Engineering or Thermal Engineering, or a related field. Advanced degrees or certifications in thermal management or related areas are highly desirable.\n\n - A Minimum of 5 years of experience in thermal and mechanical engineering with a strong focus on water cooling systems and advanced thermal management solutions.\n\n - Strong expertise in mechanical design\n\n - Proven expertise in designing and managing direct-to-processor cooling systems and thermal simulations.\n\n - Extensive experience with cold plate designs, water cooling systems, including internal manifolds, quick disconnects, CDUs, and heat exchangers\n\n - Proficiency in mechanical tolerances and generating mechanical drawings using GD&T\n\n - Proficiency in mechanical CAD software and tools such as NX, Creo, CATIA, or similar is required\n\n - Apply DFM and DFA principles to optimize designs for cost-effective manufacturing, assembly, and maintenance, ensuring high efficiency and reduced production costs.\n\n - Proven expertise in designing and managing direct-to-processor cold plate modules\n\n - Proficiency in thermal simulation tools such as Fluent and techniques to predict and analyze thermal performance of heat exchangers\n\n - Knowledge of various thermal interface materials (TIMs) and heat sink designs\n\n - Experience with advanced thermal cooling concepts and technologies.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n \n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"56400dde-55ea-43c8-862c-cb0b14eb063c","title":"Security Engineer (Remote)","department":"Software","team":"Software","employmentType":"FullTime","location":"Remote","secondaryLocations":[],"publishedAt":"2026-06-22T21:32:14.882+00:00","isListed":true,"isRemote":true,"workplaceType":"Remote","address":{"postalAddress":{"addressCountry":"United States"}},"jobUrl":"https://jobs.ashbyhq.com/etched/56400dde-55ea-43c8-862c-cb0b14eb063c","applyUrl":"https://jobs.ashbyhq.com/etched/56400dde-55ea-43c8-862c-cb0b14eb063c/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
At Etched, building and maintaining a secure yet friction-free computing environment is central to our mission. As a Security Engineer, you will protect the networks, systems, and applications that enable our engineers to push the limits of AI hardware. You will design, implement, and operate the monitoring, detection, and response infrastructure that safeguards Etched’s intellectual property, high-performance compute clusters, and developer workflows across both on-prem and cloud environments. You will partner with infrastructure, IT, application, and external provider teams to build systems that are secure by design, resilient under pressure, and seamless and easy to use for the end users.
This role combines hands-on technical depth with a focus on scalability and automation. You will take ownership of Etched’s security posture across infrastructure, IT, and applications, driving proactive threat detection, real-time monitoring, and rapid incident response. Your decisions will always balance maintaining full firm-wide velocity while improving our security and defense posture. You will develop tools, automation, and workflows that evolve with our rapidly growing and expanding footprint and ensure that security enhances, rather than hinders, innovation. If you are motivated by precision, ownership, and impact, you will find Etched the ideal place to advance your craft and contribute to the future of AI computing.
Key Responsibilities
Manage and harden security baselines across on-prem, hybrid, and cloud systems, ensuring strong protection while maintaining speed and usability.
Integrate telemetry, logging, tracing, and management of structured, semi-structured, and unstructured data across the entire environment to provide unified and comprehensive observability into infrastructure and application activity.
Lead vulnerability management, patching, and configuration assurance programs to reduce exposure and maintain a consistent security posture.
Partner with infrastructure, IT, and application teams to strengthen identity, access, and network security through Okta, Google Workspace, and FreeIPA.
Implement and maintain zero-trust network architectures, SASE controls, CASB solutions, and conditional access policies that protect both users and data across environments to ensure full access and full control of our data and IP regardless of location or device.
Operate and enhance security operations tooling, including SIEM, SOAR, and EDR/XDR platforms, to ensure comprehensive monitoring and rapid detection of threats.
Develop and tune detection logic, automation, and playbooks for identifying and responding to threats such as insider activity, lateral movement, and anomalous behavior.
Investigate and respond to security incidents, performing root-cause analysis, containment, and remediation while coordinating with engineering and IT.
Build automation, scripts, AI agents, and integrations that streamline monitoring, alerting, and remediation workflows to improve efficiency and reliability.
Establish metrics, dashboards, and feedback mechanisms to measure detection coverage, response time, and overall security health.
Promote a culture of security awareness and ownership across engineering teams, ensuring that protection and productivity advance together.
Representative Projects
Implementing a centralized security telemetry pipeline that aggregates logs and signals from networks, compute clusters, storage, endpoints devices, build systems, and cloud services into a unified SIEM for improved detection coverage.
Designing and developing Security Orchestration, Automation, and Response (SOAR) workflows to automate repetitive tasks like alert triage, data gathering, and initial containment, which improves SOC efficiency.
Help build a secure and flexible end user access framework that uses SDWAN, SASE, CASB, conditional access, EDR and XDR, and MDM/MAM to support productive, friction-free and secure work from any location using different devices.
Network Security Monitoring: Configuring and monitoring network intrusion detection/prevention systems (IDS/IPS) and firewalls to detect anomalies in network traffic, especially on the SDWAN and client VPN links
Creating and refining detailed, documented incident response plans and playbooks tailored to specific scenarios, such as a breach in a lab environment or a compromised silicon testing machine.
Conducting regular vulnerability assessments and penetration testing on internal systems and applications, then coordinating with relevant teams to manage and remediate identified weaknesses.
You May Be a Good Fit If You Have
5-7+ years of experience in security engineering, SOC operations, detection engineering, incident response, or a similar role that blends hands-on technical work with analytical problem solving.
Strong software engineering skills with Python, Go, Bash, (C and Rust a major plus), including the ability to design, implement, and maintain high-quality code, automation frameworks, services, and integrations that improve security, observability, and operational efficiency.
Proficiency with SIEM and SOAR platforms, including experience building detections, dashboards, and automated workflows.
Deep understanding of EDR and XDR platforms, endpoint security hardening, and telemetry collection across macOS, Linux, Windows, and server environments.
Experience implementing or supporting zero trust architectures, including conditional access, SASE, CASB, and identity-driven access control models.
Familiarity with IAM and SSO systems such as Okta, Google Workspace, and FreeIPA and the ability to design secure identity, access, and authentication policies.
Strong networking knowledge, including SDWAN, VPN, IDS and IPS, firewall administration, segmentation strategy, and monitoring of network traffic for anomalies.
Hands-on experience managing or building security telemetry pipelines, log ingestion frameworks, or observability systems that support both structured and unstructured data.
Solid understanding of threat modeling, the MITRE ATT and CK framework, attacker tradecraft, and common detection and response patterns.
Experience performing vulnerability assessments, penetration testing, or secure configuration reviews and collaborating with teams to remediate identified risks.
Exposure to cloud and hybrid environments such as AWS, GCP, or on-prem clusters and the ability to evaluate risks and implement protective controls across these environments.
Benefits
Full medical, dental, and vision packages, with generous premium coverage
Housing subsidy of $2,500 per month for those living within walking distance of the office
Daily lunch and dinner in our office
Relocation support for those moving to San Jose (Santana Row)
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are based in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nAt Etched, building and maintaining a secure yet friction-free computing environment is central to our mission. As a Security Engineer, you will protect the networks, systems, and applications that enable our engineers to push the limits of AI hardware. You will design, implement, and operate the monitoring, detection, and response infrastructure that safeguards Etched’s intellectual property, high-performance compute clusters, and developer workflows across both on-prem and cloud environments. You will partner with infrastructure, IT, application, and external provider teams to build systems that are secure by design, resilient under pressure, and seamless and easy to use for the end users.\n\n\n\nThis role combines hands-on technical depth with a focus on scalability and automation. You will take ownership of Etched’s security posture across infrastructure, IT, and applications, driving proactive threat detection, real-time monitoring, and rapid incident response. Your decisions will always balance maintaining full firm-wide velocity while improving our security and defense posture. You will develop tools, automation, and workflows that evolve with our rapidly growing and expanding footprint and ensure that security enhances, rather than hinders, innovation. If you are motivated by precision, ownership, and impact, you will find Etched the ideal place to advance your craft and contribute to the future of AI computing.\n\n\n\nKey Responsibilities\n\n - Manage and harden security baselines across on-prem, hybrid, and cloud systems, ensuring strong protection while maintaining speed and usability.\n\n - Integrate telemetry, logging, tracing, and management of structured, semi-structured, and unstructured data across the entire environment to provide unified and comprehensive observability into infrastructure and application activity.\n\n - Lead vulnerability management, patching, and configuration assurance programs to reduce exposure and maintain a consistent security posture.\n\n - Partner with infrastructure, IT, and application teams to strengthen identity, access, and network security through Okta, Google Workspace, and FreeIPA.\n\n - Implement and maintain zero-trust network architectures, SASE controls, CASB solutions, and conditional access policies that protect both users and data across environments to ensure full access and full control of our data and IP regardless of location or device.\n\n - Operate and enhance security operations tooling, including SIEM, SOAR, and EDR/XDR platforms, to ensure comprehensive monitoring and rapid detection of threats.\n\n - Develop and tune detection logic, automation, and playbooks for identifying and responding to threats such as insider activity, lateral movement, and anomalous behavior.\n\n - Investigate and respond to security incidents, performing root-cause analysis, containment, and remediation while coordinating with engineering and IT.\n\n - Build automation, scripts, AI agents, and integrations that streamline monitoring, alerting, and remediation workflows to improve efficiency and reliability.\n\n - Establish metrics, dashboards, and feedback mechanisms to measure detection coverage, response time, and overall security health.\n\n - Promote a culture of security awareness and ownership across engineering teams, ensuring that protection and productivity advance together.\n\n\n\nRepresentative Projects\n\n - Implementing a centralized security telemetry pipeline that aggregates logs and signals from networks, compute clusters, storage, endpoints devices, build systems, and cloud services into a unified SIEM for improved detection coverage.\n\n - Designing and developing Security Orchestration, Automation, and Response (SOAR) workflows to automate repetitive tasks like alert triage, data gathering, and initial containment, which improves SOC efficiency.\n\n - Help build a secure and flexible end user access framework that uses SDWAN, SASE, CASB, conditional access, EDR and XDR, and MDM/MAM to support productive, friction-free and secure work from any location using different devices.\n\n - Network Security Monitoring: Configuring and monitoring network intrusion detection/prevention systems (IDS/IPS) and firewalls to detect anomalies in network traffic, especially on the SDWAN and client VPN links\n\n - Creating and refining detailed, documented incident response plans and playbooks tailored to specific scenarios, such as a breach in a lab environment or a compromised silicon testing machine.\n\n - Conducting regular vulnerability assessments and penetration testing on internal systems and applications, then coordinating with relevant teams to manage and remediate identified weaknesses.\n\n\n\nYou May Be a Good Fit If You Have\n\n - 5-7+ years of experience in security engineering, SOC operations, detection engineering, incident response, or a similar role that blends hands-on technical work with analytical problem solving.\n\n - Strong software engineering skills with Python, Go, Bash, (C and Rust a major plus), including the ability to design, implement, and maintain high-quality code, automation frameworks, services, and integrations that improve security, observability, and operational efficiency.\n\n - Proficiency with SIEM and SOAR platforms, including experience building detections, dashboards, and automated workflows.\n\n - Deep understanding of EDR and XDR platforms, endpoint security hardening, and telemetry collection across macOS, Linux, Windows, and server environments.\n\n - Experience implementing or supporting zero trust architectures, including conditional access, SASE, CASB, and identity-driven access control models.\n\n - Familiarity with IAM and SSO systems such as Okta, Google Workspace, and FreeIPA and the ability to design secure identity, access, and authentication policies.\n\n - Strong networking knowledge, including SDWAN, VPN, IDS and IPS, firewall administration, segmentation strategy, and monitoring of network traffic for anomalies.\n\n - Hands-on experience managing or building security telemetry pipelines, log ingestion frameworks, or observability systems that support both structured and unstructured data.\n\n - Solid understanding of threat modeling, the MITRE ATT and CK framework, attacker tradecraft, and common detection and response patterns.\n\n - Experience performing vulnerability assessments, penetration testing, or secure configuration reviews and collaborating with teams to remediate identified risks.\n\n - Exposure to cloud and hybrid environments such as AWS, GCP, or on-prem clusters and the ability to evaluate risks and implement protective controls across these environments.\n\n\n\nBenefits\n\n - Full medical, dental, and vision packages, with generous premium coverage\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Daily lunch and dinner in our office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are based in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"84cd9ae3-7dbc-4200-a00d-ed080b94de42","title":"Demand Planner","department":"Production","team":"Production","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-06-23T21:38:13.907+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/84cd9ae3-7dbc-4200-a00d-ed080b94de42","applyUrl":"https://jobs.ashbyhq.com/etched/84cd9ae3-7dbc-4200-a00d-ed080b94de42/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is looking for a founding Demand Planner to own demand forecasting, supply planning, and finished goods inventory management in support of the company’s S&OP objectives. This role is responsible for developing and executing weekly, monthly, and quarterly demand-supply plans, monitoring inventory and production performance, and adjusting plans to meet evolving business needs. The Demand Planner will partner closely with Manufacturing and Global Supply Management teams to translate forecasts into executable build plans, identify and mitigate supply risks, and lead scenario planning under capacity or component constraints. The ideal candidate brings strong analytical skills, experience in production or NPI environments, and thrives in a fast-paced, cross-functional startup setting.
Key Responsibilities
Own demand-supply forecasting and finished goods inventory.
Generate and execute weekly and quarterly demand - supply plans that meet Etched’s S&OP objective. Evaluate risks. Plan and implement contingency plans to mitigate risk.
Build and execute weekly, monthly, and quarterly demand and supply plans
Monitor planned vs. actual builds, inventory levels across multiple SKU’s, and consumption rates; adjust plans as needed
Partner with Manufacturing OPM and Global Supply Management to translate forecasts into executable build plans
Lead scenario planning, risk identification, and mitigation under capacity or component constraints
Drive continuous improvement of demand planning processes, tools, and models
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience with APS, MRP/ERP systems, or scenario planning tools
Background in hardware, semiconductor, or advanced manufacturing
Experience with data visualization, SQL, or Python
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched is looking for a founding Demand Planner to own demand forecasting, supply planning, and finished goods inventory management in support of the company’s S&OP objectives. This role is responsible for developing and executing weekly, monthly, and quarterly demand-supply plans, monitoring inventory and production performance, and adjusting plans to meet evolving business needs. The Demand Planner will partner closely with Manufacturing and Global Supply Management teams to translate forecasts into executable build plans, identify and mitigate supply risks, and lead scenario planning under capacity or component constraints. The ideal candidate brings strong analytical skills, experience in production or NPI environments, and thrives in a fast-paced, cross-functional startup setting.\n\n\n\nKey Responsibilities\n\n - Own demand-supply forecasting and finished goods inventory.\n\n - Generate and execute weekly and quarterly demand - supply plans that meet Etched’s S&OP objective. Evaluate risks. Plan and implement contingency plans to mitigate risk.\n\n - Build and execute weekly, monthly, and quarterly demand and supply plans\n\n - Monitor planned vs. actual builds, inventory levels across multiple SKU’s, and consumption rates; adjust plans as needed\n\n - Partner with Manufacturing OPM and Global Supply Management to translate forecasts into executable build plans\n\n - Lead scenario planning, risk identification, and mitigation under capacity or component constraints\n\n - Drive continuous improvement of demand planning processes, tools, and models\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Experience with APS, MRP/ERP systems, or scenario planning tools\n\n - Background in hardware, semiconductor, or advanced manufacturing\n\n - Experience with data visualization, SQL, or Python\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed."},{"id":"bb2d320e-50d1-4182-a0c8-975ad2015e1c","title":"Data Center Engineer","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-06-25T02:03:48.682+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/bb2d320e-50d1-4182-a0c8-975ad2015e1c","applyUrl":"https://jobs.ashbyhq.com/etched/bb2d320e-50d1-4182-a0c8-975ad2015e1c/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Deploying next-generation inference hardware at scale requires more than great chips - it demands world-class physical infrastructure. As a Data Center Engineer at Etched, you will own the end-to-end lifecycle of our data center and hardware lab environments: from facility selection and rack design, power distribution, networking layout, cabling, hardware management, day-to-day operations, and long-term capacity planning. You'll work directly with the hardware, platform, and software teams to bring our systems online faster, keep them running harder, and push the limits of what dense, high-power AI inference design and manufacturing infrastructure can do.
This is not a traditional data center operations role. We expect you to treat data center engineering with the same rigor and craftsmanship we apply to our chip design - thinking from first principles about power density, thermal constraints, network topology, and physical security. You'll be making real architectural decisions that directly shape how our products are engineered, manufactured and reach customers.
You will be on the ground in our co-location facilities and lab environments, working hands-on with custom server platforms and high-speed networking. You'll drive the processes, tooling, and vendor relationships that allow us to scale our infrastructure as fast as our product roadmap demands.
Key Responsibilities
Own rack layout, capacity planning, power distribution, network design, cabling, and physical deployment of Etched High performance computing platforms across data center and hardware lab environments.
Design and manage power distribution and redundancy architectures — from utility feeds and PDUs to per-rack power and cooling budgets - for high-density AI compute deployments pushing 90 kW per rack.
Collaborate with physical infrastructure and facilities teams, as well as external vendors to build and manage highly sophisticated hardware labs used for bring-up, EVT, and customer demos.
Partner with co-location vendors and internal teams to evaluate sites, negotiate contracts, and enforce SLAs around power, cooling, physical security, and network connectivity.
Architect and implement high-speed networking infrastructure (100G/200G/400G Ethernet) connecting compute nodes, storage, and upstream peering, in coordination with network and platform engineering teams.
Develop and maintain asset management systems, rack diagrams, and change control processes to ensure full visibility into physical infrastructure state at all times.
Build and operate monitoring and alerting for environmental health (temperature, humidity, power draw, UPS state) and drive rapid response to hardware and facility incidents.
Define and execute preventive maintenance schedules and hardware lifecycle processes, including RMA coordination with vendors and on-site repair.
Lead capacity planning cycles in lockstep with the hardware roadmap, forecasting power, space, and network needs 6–18 months out and translating those forecasts into facility agreements and procurement plans.
Establish and enforce physical security procedures, access control policies, and audit trails across all data center sites.
You may be a good fit if you
Have 5+ years of hands-on data center engineering or operations experience, with direct responsibility for physical hardware deployment, power architecture, and facility management.
Have designed and deployed high-density compute environments (20 kW/rack and above) and have first-hand experience managing the thermal and power challenges that come with them.
Are deeply comfortable with structured cabling, fiber and copper plant management, and high-speed networking hardware at scale.
Can read and interpret electrical one-line diagrams, raised-floor and hot-aisle/cold-aisle plans, and co-location facility documentation without assistance.
Have built or operated monitoring and DCIM tooling and treat infrastructure visibility as a non-negotiable property of any environment you own.
Are a strong vendor manager - you know how to write an RFP, run a competitive evaluation, and hold a co-lo or hardware vendor to their commitments.
Thrive in fast-moving environments where requirements shift quickly and you need to make confident decisions with incomplete information.
Are driven by ownership and take pride in environments that are clean, documented, and operationally excellent - not just ones that are \"up.\"
Strong candidates may also have experience with
Physical deployment and bring-up of custom or semi-custom server platforms, including early-stage hardware that doesn't come with vendor support.
Liquid cooling systems (direct liquid cooling, rear-door heat exchangers, or immersion cooling) and the facility requirements they impose.
AI or HPC cluster environments - GPU or ASIC clusters, high-radix switch fabrics, RDMA networking.
Scripting and automation (Python, Bash, Ansible) for asset tracking, environmental monitoring integration, or operational workflows.
Working within a semiconductor or hardware startup, where roadmaps compress and infrastructure needs to keep pace with silicon.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How We're Different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nDeploying next-generation inference hardware at scale requires more than great chips - it demands world-class physical infrastructure. As a Data Center Engineer at Etched, you will own the end-to-end lifecycle of our data center and hardware lab environments: from facility selection and rack design, power distribution, networking layout, cabling, hardware management, day-to-day operations, and long-term capacity planning. You'll work directly with the hardware, platform, and software teams to bring our systems online faster, keep them running harder, and push the limits of what dense, high-power AI inference design and manufacturing infrastructure can do.\n\nThis is not a traditional data center operations role. We expect you to treat data center engineering with the same rigor and craftsmanship we apply to our chip design - thinking from first principles about power density, thermal constraints, network topology, and physical security. You'll be making real architectural decisions that directly shape how our products are engineered, manufactured and reach customers.\n\nYou will be on the ground in our co-location facilities and lab environments, working hands-on with custom server platforms and high-speed networking. You'll drive the processes, tooling, and vendor relationships that allow us to scale our infrastructure as fast as our product roadmap demands.\n\n\n\nKey Responsibilities\n\n - Own rack layout, capacity planning, power distribution, network design, cabling, and physical deployment of Etched High performance computing platforms across data center and hardware lab environments.\n\n - Design and manage power distribution and redundancy architectures — from utility feeds and PDUs to per-rack power and cooling budgets - for high-density AI compute deployments pushing 90 kW per rack.\n\n - Collaborate with physical infrastructure and facilities teams, as well as external vendors to build and manage highly sophisticated hardware labs used for bring-up, EVT, and customer demos.\n\n - Partner with co-location vendors and internal teams to evaluate sites, negotiate contracts, and enforce SLAs around power, cooling, physical security, and network connectivity.\n\n - Architect and implement high-speed networking infrastructure (100G/200G/400G Ethernet) connecting compute nodes, storage, and upstream peering, in coordination with network and platform engineering teams.\n\n - Develop and maintain asset management systems, rack diagrams, and change control processes to ensure full visibility into physical infrastructure state at all times.\n\n - Build and operate monitoring and alerting for environmental health (temperature, humidity, power draw, UPS state) and drive rapid response to hardware and facility incidents.\n\n - Define and execute preventive maintenance schedules and hardware lifecycle processes, including RMA coordination with vendors and on-site repair.\n\n - Lead capacity planning cycles in lockstep with the hardware roadmap, forecasting power, space, and network needs 6–18 months out and translating those forecasts into facility agreements and procurement plans.\n\n - Establish and enforce physical security procedures, access control policies, and audit trails across all data center sites.\n\n\n\nYou may be a good fit if you\n\n - Have 5+ years of hands-on data center engineering or operations experience, with direct responsibility for physical hardware deployment, power architecture, and facility management.\n\n - Have designed and deployed high-density compute environments (20 kW/rack and above) and have first-hand experience managing the thermal and power challenges that come with them.\n\n - Are deeply comfortable with structured cabling, fiber and copper plant management, and high-speed networking hardware at scale.\n\n - Can read and interpret electrical one-line diagrams, raised-floor and hot-aisle/cold-aisle plans, and co-location facility documentation without assistance.\n\n - Have built or operated monitoring and DCIM tooling and treat infrastructure visibility as a non-negotiable property of any environment you own.\n\n - Are a strong vendor manager - you know how to write an RFP, run a competitive evaluation, and hold a co-lo or hardware vendor to their commitments.\n\n - Thrive in fast-moving environments where requirements shift quickly and you need to make confident decisions with incomplete information.\n\n - Are driven by ownership and take pride in environments that are clean, documented, and operationally excellent - not just ones that are \"up.\"\n\n\n\nStrong candidates may also have experience with\n\n - Physical deployment and bring-up of custom or semi-custom server platforms, including early-stage hardware that doesn't come with vendor support.\n\n - Liquid cooling systems (direct liquid cooling, rear-door heat exchangers, or immersion cooling) and the facility requirements they impose.\n\n - AI or HPC cluster environments - GPU or ASIC clusters, high-radix switch fabrics, RDMA networking.\n\n - Scripting and automation (Python, Bash, Ansible) for asset tracking, environmental monitoring integration, or operational workflows.\n\n - Working within a semiconductor or hardware startup, where roadmaps compress and infrastructure needs to keep pace with silicon.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow We're Different\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"2021199f-221e-4a8c-aa66-210496cb38da","title":"General Application","department":"Other","team":"Other","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-06-30T16:13:56.718+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/2021199f-221e-4a8c-aa66-210496cb38da","applyUrl":"https://jobs.ashbyhq.com/etched/2021199f-221e-4a8c-aa66-210496cb38da/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Exceptional companies are built by exceptional people. We’ve found that exceptional people don’t always fit neatly into pre-defined job descriptions.
If you're excited about what we're building and have a clear vision for how you could create an outsized impact at Etched, we'd love to hear from you. Tell us what you'd work on, why it matters, and why you're uniquely suited to do it.
We’re looking for unconventional thinkers, builders, and problem-solvers. If that's you, introduce yourself. We’ll make room.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nExceptional companies are built by exceptional people. We’ve found that exceptional people don’t always fit neatly into pre-defined job descriptions.\n\n\n\nIf you're excited about what we're building and have a clear vision for how you could create an outsized impact at Etched, we'd love to hear from you. Tell us what you'd work on, why it matters, and why you're uniquely suited to do it.\n\n\n\nWe’re looking for unconventional thinkers, builders, and problem-solvers. If that's you, introduce yourself. We’ll make room.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed."},{"id":"fbade92c-43c8-4e8d-931a-be9c5ec27b5b","title":"Platform Product Reliability","department":"Platform","team":"Platform","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-05-12T02:31:58.682+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/fbade92c-43c8-4e8d-931a-be9c5ec27b5b","applyUrl":"https://jobs.ashbyhq.com/etched/fbade92c-43c8-4e8d-931a-be9c5ec27b5b/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a highly technical and execution-focused Platform Product Reliability Engineer to lead reliability engineering across Etched's server, rack, and datacenter platform products.
This role owns system-level product reliability from architecture through fleet deployment. You will define reliability strategy, qualification methodologies, accelerated stress testing programs, failure analysis processes, and long-term reliability standards for complex AI infrastructure systems. This team focuses specifically on product reliability engineering for platform hardware and deployed systems — ensuring every Etched product ships with the reliability profile that enterprise and hyperscale customers demand.
You will work cross-functionally with Platform Engineering, Mechanical Engineering, Thermal, Firmware, Manufacturing, Supply Chain, Datacenter Operations, and Program teams to ensure Etched products achieve exceptional reliability at scale.
Key Responsibilities
Define and own the end-to-end reliability strategy for AI servers, accelerator platforms, rack systems, and datacenter infrastructure, from design requirements through field deployment
Establish reliability requirements, qualification standards, and validation methodologies that scale across product generations
Build and institutionalize reliability engineering processes spanning the full product lifecycle:
EVT / DVT / PVT qualification gates and exit criteria
Accelerated life testing (ALT) and accelerated stress testing (AST)
Environmental testing: temperature, humidity, altitude, contamination
HALT / HASS programs for design margin and production screening
Vibration, shock, and transportation stress testing
Power cycling, thermal cycling, and long-duration soak testing
Lead root-cause investigations for reliability failures surfaced during development, manufacturing, and field deployment, driving corrective actions across hardware, firmware, thermal, and mechanical domains
Develop comprehensive system reliability models including MTBF projections, FIT rate analysis, Weibull lifetime modeling, component derating methodologies, and reliability growth tracking
Ensure reliability is considered early, partnering with Platform Engineering architects and design leads so reliability requirements shape decisions before they become expensive to change
Work closely with ODMs, JDMs, contract manufacturers, and component suppliers to validate and enforce long-term platform reliability commitments
Build fleet reliability infrastructure: telemetry analysis pipelines, field feedback loops, and monitoring frameworks that give Etched visibility into deployed system health at scale
Drive reliability signoff criteria and lead product release readiness reviews across engineering and program teams
Build and lead a high-performing product reliability engineering organization — hiring, developing, and retaining technical talent as the company scales
You may be a good fit if you have (Must-have qualifications)
BS, MS, or PhD in Electrical Engineering, Mechanical Engineering, Reliability Engineering, or a related technical field
5+ years of reliability engineering experience in hardware-centric organizations, with meaningful time spent on complex systems rather than component-level work
Experience leading reliability programs for one or more of:
AI accelerator or GPU-class compute systems
Hyperscale or cloud server infrastructure
Networking platforms, storage systems, or rack-scale infrastructure
Deep understanding of system-level failure mechanisms — including thermal, power delivery, mechanical, and connector/interconnect failure modes — and how design decisions affect long-term field reliability
Hands-on experience with FMEA, Weibull analysis, HALT/HASS, qualification planning, failure analysis methodologies, and reliability statistics and modeling
A track record of driving cross-functional root-cause investigations in fast-moving hardware organizations where schedule pressure is real and accountability is high
Strong technical judgment — capable of making defensible tradeoffs between reliability targets, cost, schedule, and performance without losing sight of customer expectations
Excellent communication skills and the credibility to influence design decisions with engineering leads, program managers, and executive stakeholders
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience with liquid-cooled systems, high-density power delivery, or thermal management for high-power AI infrastructure
Direct experience supporting hyperscale or cloud datacenter deployments at scale, including customer-facing reliability commitments and SLA management
Demonstrated experience building a reliability organization from early-stage — establishing processes, tooling, and team norms in environments without established infrastructure
Familiarity with fleet telemetry systems, large-scale field reliability analytics, and data-driven approaches to proactive reliability management
Experience working closely with ODM or JDM partners in Taiwan or broader Asia, including NPI support and on-site qualification engagement
Background in high-speed digital systems, GPU compute platforms, or accelerator-based architectures — with an understanding of how these affect system-level reliability behavior
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a highly technical and execution-focused Platform Product Reliability Engineer to lead reliability engineering across Etched's server, rack, and datacenter platform products.\n\nThis role owns system-level product reliability from architecture through fleet deployment. You will define reliability strategy, qualification methodologies, accelerated stress testing programs, failure analysis processes, and long-term reliability standards for complex AI infrastructure systems. This team focuses specifically on product reliability engineering for platform hardware and deployed systems — ensuring every Etched product ships with the reliability profile that enterprise and hyperscale customers demand.\n\nYou will work cross-functionally with Platform Engineering, Mechanical Engineering, Thermal, Firmware, Manufacturing, Supply Chain, Datacenter Operations, and Program teams to ensure Etched products achieve exceptional reliability at scale.\n\n\n\nKey Responsibilities\n\n - Define and own the end-to-end reliability strategy for AI servers, accelerator platforms, rack systems, and datacenter infrastructure, from design requirements through field deployment\n\n - Establish reliability requirements, qualification standards, and validation methodologies that scale across product generations\n\n - Build and institutionalize reliability engineering processes spanning the full product lifecycle:\n \n - EVT / DVT / PVT qualification gates and exit criteria\n \n - Accelerated life testing (ALT) and accelerated stress testing (AST)\n \n - Environmental testing: temperature, humidity, altitude, contamination\n \n - HALT / HASS programs for design margin and production screening\n \n - Vibration, shock, and transportation stress testing\n \n - Power cycling, thermal cycling, and long-duration soak testing\n\n - Lead root-cause investigations for reliability failures surfaced during development, manufacturing, and field deployment, driving corrective actions across hardware, firmware, thermal, and mechanical domains\n\n - Develop comprehensive system reliability models including MTBF projections, FIT rate analysis, Weibull lifetime modeling, component derating methodologies, and reliability growth tracking\n\n - Ensure reliability is considered early, partnering with Platform Engineering architects and design leads so reliability requirements shape decisions before they become expensive to change\n\n - Work closely with ODMs, JDMs, contract manufacturers, and component suppliers to validate and enforce long-term platform reliability commitments\n\n - Build fleet reliability infrastructure: telemetry analysis pipelines, field feedback loops, and monitoring frameworks that give Etched visibility into deployed system health at scale\n\n - Drive reliability signoff criteria and lead product release readiness reviews across engineering and program teams\n\n - Build and lead a high-performing product reliability engineering organization — hiring, developing, and retaining technical talent as the company scales\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - BS, MS, or PhD in Electrical Engineering, Mechanical Engineering, Reliability Engineering, or a related technical field\n\n - 5+ years of reliability engineering experience in hardware-centric organizations, with meaningful time spent on complex systems rather than component-level work\n\n - Experience leading reliability programs for one or more of:\n \n - AI accelerator or GPU-class compute systems\n \n - Hyperscale or cloud server infrastructure\n \n - Networking platforms, storage systems, or rack-scale infrastructure\n\n - Deep understanding of system-level failure mechanisms — including thermal, power delivery, mechanical, and connector/interconnect failure modes — and how design decisions affect long-term field reliability\n\n - Hands-on experience with FMEA, Weibull analysis, HALT/HASS, qualification planning, failure analysis methodologies, and reliability statistics and modeling\n\n - A track record of driving cross-functional root-cause investigations in fast-moving hardware organizations where schedule pressure is real and accountability is high\n\n - Strong technical judgment — capable of making defensible tradeoffs between reliability targets, cost, schedule, and performance without losing sight of customer expectations\n\n - Excellent communication skills and the credibility to influence design decisions with engineering leads, program managers, and executive stakeholders\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Experience with liquid-cooled systems, high-density power delivery, or thermal management for high-power AI infrastructure\n\n - Direct experience supporting hyperscale or cloud datacenter deployments at scale, including customer-facing reliability commitments and SLA management\n\n - Demonstrated experience building a reliability organization from early-stage — establishing processes, tooling, and team norms in environments without established infrastructure\n\n - Familiarity with fleet telemetry systems, large-scale field reliability analytics, and data-driven approaches to proactive reliability management\n\n - Experience working closely with ODM or JDM partners in Taiwan or broader Asia, including NPI support and on-site qualification engagement\n\n - Background in high-speed digital systems, GPU compute platforms, or accelerator-based architectures — with an understanding of how these affect system-level reliability behavior\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"d8ee2a43-d5be-47f0-9c89-f7a39bb9db0d","title":"Physical Design Engineer - Flow & Methodologies","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-07-23T03:23:01.486+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/d8ee2a43-d5be-47f0-9c89-f7a39bb9db0d","applyUrl":"https://jobs.ashbyhq.com/etched/d8ee2a43-d5be-47f0-9c89-f7a39bb9db0d/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is building a new category of AI hardware: frontier inference clusters. As a Physical Design Methodology Engineer, you will architect our PD flow from first principles. You will own the infrastructure that allows our design team to iterate at unprecedented speeds, directly accelerating our time-to-market and enabling PPA gains that aren't possible with off-the-shelf CAD methodologies.
Key Responsibilities
Architect, build, and maintain our automated RTL-to-GDSII flow, from synthesis through place and route to signoff handoff.
Automate PD flows end to end, including regression running, run management, and release and version control of flow configurations.
Build and own the CAD infrastructure supporting PD, including tool version qualification and deployment, and efficient use of compute and licenses.
Drive dashboards that show the convergence of projects related to PD, including timing, physical verification, and utilization trends.
Optimize tool flows and work with EDA vendors to evaluate and incorporate the latest features.
Define reference flows, QoR targets, and delivery checklists for 3rd party physical design services, and audit deliveries against them.
Partner with block and top-level owners to debug flow issues and encode fixes into the methodology rather than one-off patches.
Create block level and full chip level PG mesh from scratch using design rule documents, design requirements, and EM/IR feedback.
Create and maintain a DRC-clean floorplanning flow and enable floorplan signoff checks.
Drive PPA tuning to optimize tool settings for best power, performance, and area outcomes.
Establish and maintain timing correlation from pre-route through post-route and between implementation and signoff tools.
You may be a good fit if you have
5-10+ years of previous experience with PD or PD methodology/CAD
Experience building and owning automated RTL-to-GDSII flows used by multiple block owners
Experience creating block level and full chip level PG mesh from scratch, including interpretation of design rule documents and EM/IR analysis
Experience with DRC-clean floorplanning flows and automated checks
Experience with Cadence (Innovus, Genus) or Synopsys ( Fusion Compiler) automated RTL-to-GDSII flows
Experience with PPA tuning and timing correlation across pre-route, post-route, and signoff environments
Experience integrating sign-off tools (PrimeTime, Tempus, Voltus, Pegasus, Calibre) into production flows
Experience with back-end design on advanced process nodes (5nm and below)
Experience with UPF-based low power design methodology and multi-mode multi-corner setup
Strong Tcl and Python skills for flow development and automation
Deeply creative and able to think from first principles
Strong candidates may also have experience with
Familiarity with modern ML and LLM model architectures
Familiarity with AI tools for programming/coding
Experience with compute farm and job scheduler optimization for EDA workloads
Startup experience or comfort working in fast-paced environments
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched is building a new category of AI hardware: frontier inference clusters. As a Physical Design Methodology Engineer, you will architect our PD flow from first principles. You will own the infrastructure that allows our design team to iterate at unprecedented speeds, directly accelerating our time-to-market and enabling PPA gains that aren't possible with off-the-shelf CAD methodologies.\n\n\n\nKey Responsibilities\n\n - Architect, build, and maintain our automated RTL-to-GDSII flow, from synthesis through place and route to signoff handoff.\n\n - Automate PD flows end to end, including regression running, run management, and release and version control of flow configurations.\n\n - Build and own the CAD infrastructure supporting PD, including tool version qualification and deployment, and efficient use of compute and licenses.\n\n - Drive dashboards that show the convergence of projects related to PD, including timing, physical verification, and utilization trends.\n\n - Optimize tool flows and work with EDA vendors to evaluate and incorporate the latest features.\n\n - Define reference flows, QoR targets, and delivery checklists for 3rd party physical design services, and audit deliveries against them.\n\n - Partner with block and top-level owners to debug flow issues and encode fixes into the methodology rather than one-off patches.\n\n - Create block level and full chip level PG mesh from scratch using design rule documents, design requirements, and EM/IR feedback.\n\n - Create and maintain a DRC-clean floorplanning flow and enable floorplan signoff checks.\n\n - Drive PPA tuning to optimize tool settings for best power, performance, and area outcomes.\n\n - Establish and maintain timing correlation from pre-route through post-route and between implementation and signoff tools.\n\n\n\nYou may be a good fit if you have\n\n - 5-10+ years of previous experience with PD or PD methodology/CAD\n\n - Experience building and owning automated RTL-to-GDSII flows used by multiple block owners\n\n - Experience creating block level and full chip level PG mesh from scratch, including interpretation of design rule documents and EM/IR analysis\n\n - Experience with DRC-clean floorplanning flows and automated checks\n\n - Experience with Cadence (Innovus, Genus) or Synopsys ( Fusion Compiler) automated RTL-to-GDSII flows\n\n - Experience with PPA tuning and timing correlation across pre-route, post-route, and signoff environments\n\n - Experience integrating sign-off tools (PrimeTime, Tempus, Voltus, Pegasus, Calibre) into production flows\n\n - Experience with back-end design on advanced process nodes (5nm and below)\n\n - Experience with UPF-based low power design methodology and multi-mode multi-corner setup\n\n - Strong Tcl and Python skills for flow development and automation\n\n - Deeply creative and able to think from first principles\n\n\n\nStrong candidates may also have experience with\n\n - Familiarity with modern ML and LLM model architectures\n\n - Familiarity with AI tools for programming/coding\n\n - Experience with compute farm and job scheduler optimization for EDA workloads\n\n - Startup experience or comfort working in fast-paced environments\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"b03aad0f-6915-414c-a65e-9679df9fb1a0","title":"Physical Design Engineer - Block Level, Subsystem Implementation","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-07-23T03:17:35.567+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/b03aad0f-6915-414c-a65e-9679df9fb1a0","applyUrl":"https://jobs.ashbyhq.com/etched/b03aad0f-6915-414c-a65e-9679df9fb1a0/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is building a new category of AI hardware: frontier inference clusters. As a Physical Design Engineer, you will own block-level implementation from synthesis through GDSII sign-off. You will drive Block-level & Subsystem PPA Optimization, and collaborate closely with RTL designers to provide actionable feedback, ensuring we iterate at unprecedented speeds to bring our products to market.
Key Responsibilities
Own block-level and/or subsystem physical design end to end, including floorplanning, synthesis, placement, clock tree synthesis, and routing through GDSII.
Drive block-level timing closure across all corners and modes, including constraint development, STA debug, and functional and timing ECO implementation.
Close block-level signoff across EM, IR drop, RC extraction and correlation, and physical verification (DRC, LVS, antenna).
Generate abstracts, views, and timing budgets for clean hierarchical integration of your blocks into the top level.
Collaborate with RTL Designers and provide Physical Design feedback to improve PPA.
Continuously improve the PPA of owned blocks and contribute learnings back into the shared RTL-to-GDSII flow.
Supervise physical design work outsourced to 3rd party services and be accountable for the quality and closure of delivered blocks.
You may be a good fit if you have
5-10+ years of previous experience with PD
Tools, flow, and design methodology from RTL synthesis to GDSII sign-off
Experience with back-end design and timing closure on advanced process nodes (5nm and below)
Experience with Cadence (Innovus, Genus) or Synopsys (Fusion Compiler) automated RTL-to-GDSII flows
Experience with sign-off tools (PrimeTime, Tempus, Voltus, etc.)
Experience with UPF-based low power design methodology, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis
Scripting ability in Tcl, Python, or Perl for flow automation and debug
Deeply creative and able to think from first principles
Strong candidates may also have experience with
Familiarity with modern ML and LLM model architectures
Ability to program with Python or another scripting language
Familiarity with AI tools for programming/coding
Startup experience or comfort working in fast-paced environments
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched is building a new category of AI hardware: frontier inference clusters. As a Physical Design Engineer, you will own block-level implementation from synthesis through GDSII sign-off. You will drive Block-level & Subsystem PPA Optimization, and collaborate closely with RTL designers to provide actionable feedback, ensuring we iterate at unprecedented speeds to bring our products to market.\n\n\n\nKey Responsibilities\n\n - Own block-level and/or subsystem physical design end to end, including floorplanning, synthesis, placement, clock tree synthesis, and routing through GDSII.\n\n - Drive block-level timing closure across all corners and modes, including constraint development, STA debug, and functional and timing ECO implementation.\n\n - Close block-level signoff across EM, IR drop, RC extraction and correlation, and physical verification (DRC, LVS, antenna).\n\n - Generate abstracts, views, and timing budgets for clean hierarchical integration of your blocks into the top level.\n\n - Collaborate with RTL Designers and provide Physical Design feedback to improve PPA.\n\n - Continuously improve the PPA of owned blocks and contribute learnings back into the shared RTL-to-GDSII flow.\n\n - Supervise physical design work outsourced to 3rd party services and be accountable for the quality and closure of delivered blocks.\n\n\n\nYou may be a good fit if you have\n\n - 5-10+ years of previous experience with PD\n\n - Tools, flow, and design methodology from RTL synthesis to GDSII sign-off\n\n - Experience with back-end design and timing closure on advanced process nodes (5nm and below)\n\n - Experience with Cadence (Innovus, Genus) or Synopsys (Fusion Compiler) automated RTL-to-GDSII flows\n\n - Experience with sign-off tools (PrimeTime, Tempus, Voltus, etc.)\n\n - Experience with UPF-based low power design methodology, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis\n\n - Scripting ability in Tcl, Python, or Perl for flow automation and debug\n\n - Deeply creative and able to think from first principles\n\n\n\nStrong candidates may also have experience with\n\n - Familiarity with modern ML and LLM model architectures\n\n - Ability to program with Python or another scripting language\n\n - Familiarity with AI tools for programming/coding\n\n - Startup experience or comfort working in fast-paced environments\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"127f9760-3069-4152-b882-4e76b8f4ff1d","title":"Physical Design Engineer - Block Level, Subsystem Implementation","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"Austin","secondaryLocations":[],"publishedAt":"2026-07-30T04:41:07.225+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressCountry":""}},"jobUrl":"https://jobs.ashbyhq.com/etched/127f9760-3069-4152-b882-4e76b8f4ff1d","applyUrl":"https://jobs.ashbyhq.com/etched/127f9760-3069-4152-b882-4e76b8f4ff1d/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is building a new category of AI hardware: frontier inference clusters. As a Physical Design Engineer, you will own block-level implementation from synthesis through GDSII sign-off. You will drive Block-level & Subsystem PPA Optimization, and collaborate closely with RTL designers to provide actionable feedback, ensuring we iterate at unprecedented speeds to bring our products to market.
Key Responsibilities
Own block-level and/or subsystem physical design end to end, including floorplanning, synthesis, placement, clock tree synthesis, and routing through GDSII.
Drive block-level timing closure across all corners and modes, including constraint development, STA debug, and functional and timing ECO implementation.
Close block-level signoff across EM, IR drop, RC extraction and correlation, and physical verification (DRC, LVS, antenna).
Generate abstracts, views, and timing budgets for clean hierarchical integration of your blocks into the top level.
Collaborate with RTL Designers and provide Physical Design feedback to improve PPA.
Continuously improve the PPA of owned blocks and contribute learnings back into the shared RTL-to-GDSII flow.
Supervise physical design work outsourced to 3rd party services and be accountable for the quality and closure of delivered blocks.
You may be a good fit if you have
5-10+ years of previous experience with PD
Tools, flow, and design methodology from RTL synthesis to GDSII sign-off
Experience with back-end design and timing closure on advanced process nodes (5nm and below)
Experience with Cadence (Innovus, Genus) or Synopsys (Fusion Compiler) automated RTL-to-GDSII flows
Experience with sign-off tools (PrimeTime, Tempus, Voltus, etc.)
Experience with UPF-based low power design methodology, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis
Scripting ability in Tcl, Python, or Perl for flow automation and debug
Deeply creative and able to think from first principles
Strong candidates may also have experience with
Familiarity with modern ML and LLM model architectures
Ability to program with Python or another scripting language
Familiarity with AI tools for programming/coding
Startup experience or comfort working in fast-paced environments
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
This role is based in our Austin office, with regular time spent working alongside the team in San Jose. During the first quarter, expect to spend approximately two weeks per month at our San Jose headquarters to ramp quickly. After that, this shifts to roughly one week per month for ongoing collaboration.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n \n\nJob Summary\n\nEtched is building a new category of AI hardware: frontier inference clusters. As a Physical Design Engineer, you will own block-level implementation from synthesis through GDSII sign-off. You will drive Block-level & Subsystem PPA Optimization, and collaborate closely with RTL designers to provide actionable feedback, ensuring we iterate at unprecedented speeds to bring our products to market.\n\n \n\nKey Responsibilities\n\n - Own block-level and/or subsystem physical design end to end, including floorplanning, synthesis, placement, clock tree synthesis, and routing through GDSII.\n\n - Drive block-level timing closure across all corners and modes, including constraint development, STA debug, and functional and timing ECO implementation.\n\n - Close block-level signoff across EM, IR drop, RC extraction and correlation, and physical verification (DRC, LVS, antenna).\n\n - Generate abstracts, views, and timing budgets for clean hierarchical integration of your blocks into the top level.\n\n - Collaborate with RTL Designers and provide Physical Design feedback to improve PPA.\n\n - Continuously improve the PPA of owned blocks and contribute learnings back into the shared RTL-to-GDSII flow.\n\n - Supervise physical design work outsourced to 3rd party services and be accountable for the quality and closure of delivered blocks.\n\n \n\nYou may be a good fit if you have\n\n - 5-10+ years of previous experience with PD\n\n - Tools, flow, and design methodology from RTL synthesis to GDSII sign-off\n\n - Experience with back-end design and timing closure on advanced process nodes (5nm and below)\n\n - Experience with Cadence (Innovus, Genus) or Synopsys (Fusion Compiler) automated RTL-to-GDSII flows\n\n - Experience with sign-off tools (PrimeTime, Tempus, Voltus, etc.)\n\n - Experience with UPF-based low power design methodology, power verification, synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS, routing, IR drop, and EM/antenna analysis\n\n - Scripting ability in Tcl, Python, or Perl for flow automation and debug\n\n - Deeply creative and able to think from first principles\n\n \n\nStrong candidates may also have experience with\n\n - Familiarity with modern ML and LLM model architectures\n\n - Ability to program with Python or another scripting language\n\n - Familiarity with AI tools for programming/coding\n\n - Startup experience or comfort working in fast-paced environments\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n \n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n\n\nThis role is based in our Austin office, with regular time spent working alongside the team in San Jose. During the first quarter, expect to spend approximately two weeks per month at our San Jose headquarters to ramp quickly. After that, this shifts to roughly one week per month for ongoing collaboration."},{"id":"045b3672-d7b7-48b5-95e5-3f8793ff819b","title":"Physical Design Engineer - Full Chip Implementation","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-07-23T03:30:06.270+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/045b3672-d7b7-48b5-95e5-3f8793ff819b","applyUrl":"https://jobs.ashbyhq.com/etched/045b3672-d7b7-48b5-95e5-3f8793ff819b/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is building a new category of AI hardware: frontier inference clusters. As a top-level PD engineer, you will own full-chip implementation—encompassing floorplanning, P&R, clocking, timing analysis, physical verification, and sign-offs—from synthesis through to GDSII completion. You will lead critical efforts in these areas, leveraging our PD flows to drive aggressive PPA optimization and timing closure. You will collaborate closely with RTL designers to provide actionable feedback, ensuring we iterate at unprecedented speeds to bring our products to market.
Key Responsibilities
Own full-chip clocking across all PVT corners and modes.
Manage MMMC (Multi-Mode Multi-Corner) timing closure at the top level.
Own timing constraints and hierarchical timing budgeting between top level and blocks.
Drive functional and timing ECO closure and achieve final timing signoff for tapeout.
Own end-to-end physical verification closure at block, sub-system, and full-chip level across DRC, LVS, ERC, antenna, density, fill, and top-level integration.
Debug complex PV violations across layout, routing, macros, IP, power grid, rule decks, and tool or setup issues, and fix violations directly in layout using Innovus.
Build a repeatable, tapeout-ready PV methodology with clean runs, waiver discipline, version control, triage, and final signoff reviews.
You may be a good fit if you have
10+ years of previous experience with chip planning, top level PD, floorplanning
Experience with top-level and full-chip closure on advanced process nodes (5nm and below)
Experience with Cadence (Innovus, Genus) or Synopsys (Fusion Compiler) automated RTL-to-GDSII flows
Experience with Synopsys PrimeTime and Cadence Tempus for timing signoff
Experience with Pegasus or Calibre for physical verification signoff
Experience with hierarchical timing budgeting, constraint management, and ECO closure
Experience with Cadence Innovus for top-level assembly, routing, and layout fixes
Deeply creative and able to think from first principles
Strong candidates may also have experience with
Familiarity with modern ML and LLM model architectures
Ability to program with Python or another scripting language
Familiarity with AI tools for programming/coding
Startup experience or comfort working in fast-paced environments
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched is building a new category of AI hardware: frontier inference clusters. As a top-level PD engineer, you will own full-chip implementation—encompassing floorplanning, P&R, clocking, timing analysis, physical verification, and sign-offs—from synthesis through to GDSII completion. You will lead critical efforts in these areas, leveraging our PD flows to drive aggressive PPA optimization and timing closure. You will collaborate closely with RTL designers to provide actionable feedback, ensuring we iterate at unprecedented speeds to bring our products to market.\n\n\n\nKey Responsibilities\n\n - Own full-chip clocking across all PVT corners and modes.\n\n - Manage MMMC (Multi-Mode Multi-Corner) timing closure at the top level.\n\n - Own timing constraints and hierarchical timing budgeting between top level and blocks.\n\n - Drive functional and timing ECO closure and achieve final timing signoff for tapeout.\n\n - Own end-to-end physical verification closure at block, sub-system, and full-chip level across DRC, LVS, ERC, antenna, density, fill, and top-level integration.\n\n - Debug complex PV violations across layout, routing, macros, IP, power grid, rule decks, and tool or setup issues, and fix violations directly in layout using Innovus.\n\n - Build a repeatable, tapeout-ready PV methodology with clean runs, waiver discipline, version control, triage, and final signoff reviews.\n\n\n\nYou may be a good fit if you have\n\n - 10+ years of previous experience with chip planning, top level PD, floorplanning\n\n - Experience with top-level and full-chip closure on advanced process nodes (5nm and below)\n\n - Experience with Cadence (Innovus, Genus) or Synopsys (Fusion Compiler) automated RTL-to-GDSII flows\n\n - Experience with Synopsys PrimeTime and Cadence Tempus for timing signoff\n\n - Experience with Pegasus or Calibre for physical verification signoff\n\n - Experience with hierarchical timing budgeting, constraint management, and ECO closure\n\n - Experience with Cadence Innovus for top-level assembly, routing, and layout fixes\n\n - Deeply creative and able to think from first principles\n\n\n\nStrong candidates may also have experience with\n\n - Familiarity with modern ML and LLM model architectures\n\n - Ability to program with Python or another scripting language\n\n - Familiarity with AI tools for programming/coding\n\n - Startup experience or comfort working in fast-paced environments\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"4cd00190-49b5-44a5-b457-e3f4e3d1c2e8","title":"Capital Projects - Electrical Infrastructure Engineer ","department":"Platform","team":"Platform","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-09T08:19:31.394+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/4cd00190-49b5-44a5-b457-e3f4e3d1c2e8","applyUrl":"https://jobs.ashbyhq.com/etched/4cd00190-49b5-44a5-b457-e3f4e3d1c2e8/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Own the electrical infrastructure that enables Etched to develop, test, and scale hardware from chip to rack to data center. As an individual contributor on the Capital Projects and Facilities Engineering team, you will translate evolving product requirements into practical electrical systems and drive projects from early planning and design through construction, commissioning, and operational handoff.
You will help establish our electrical standards, practice safe operations, build internal design capability, and accelerate decisions across new facilities and retrofits. You will serve as the electrical technical owner for assigned projects, develop internal concepts and preliminary designs, and direct technical work with consultants, contractors, and equipment vendors. External engineers of record will support detailed design and permitting where required.
We value strong fundamentals, practical judgment, and demonstrated ownership. Your experience may come from consulting, contracting, electrical trades, commissioning, facilities operations, military technical training, or another path. You should be comfortable with high velocity projects, working in the field, challenging assumptions, and turning incomplete or changing requirements into safe, executable solutions.
Key Responsibilities
Translate stakeholder needs into electrical load forecasts, capacity plans, design criteria, and distribution concepts for bench, lab, rack test, and data center environments.
Assess prospective sites and identify infrastructure constraints and expansion options.
Develop single-line diagrams, load calculations, equipment requirements, and preliminary layouts. Evaluate distribution architectures and equipment including transformers, switchgear, UPS, generators, ATS, panelboards, busway, and rack power distribution.
Lead technical reviews of consultant designs, equipment submittals, and field installations. Scope and review short-circuit, protection coordination, arc-flash, and power-quality studies with qualified design partners; resolve constructability, maintainability, and system integration issues.
Own assigned electrical projects through scope definition, equipment selection, procurement support, construction coordination, commissioning, and handoff. Projects range from swapping receptacles to designing our pod. Develop BOM and specs, evaluate technical proposals, track cost and schedule impacts, and hold vendors accountable for deliverables.
Rapidly assess changing requirements, identify downstream impacts, and recommend options that balance safety, capacity, reliability, cost, and schedule. Drive agreed changes into coordinated designs and field execution; communicate risks and decisions early.
Define commissioning plans and acceptance criteria; coordinate energization, shutdowns, load testing, and integrated system testing with qualified personnel. Verify performance and drive deficiencies to closure.
Troubleshoot electrical problems, lead root-cause investigations, and deliver corrective actions. Use metering, monitoring, and trend data to identify capacity and reliability risks before they affect development or operations.
Partner with operations on electrical maintenance strategy, critical spares, training, and independently authored operating and maintenance procedures. Provide technical incident support and ensure complete as-builts, settings, test records, and handoff documentation.
Build repeatable standards, design tools, and lessons learned; mentor teammates and improve how the team delivers infrastructure. Coordinate across disciplines and geographic regions as project needs evolve. Travel to project sites, including the wider bay area and beyond as Etched grows. Support planned shutdowns or commissioning outside normal business hours as needed.
You may be a good fit if you have (Must-have qualifications)
Strong applied electrical fundamentals and the ability to reason through power distribution, three-phase loads, grounding and bonding, protection, power quality, and failure modes.
Demonstrated personal ownership across at least three areas: design, construction, commissioning, troubleshooting, or operations. Typically 5+ years of relevant experience; exceptional demonstrated capability matters more than a fixed tenure requirement.
The ability to develop or critically review electrical designs, interpret drawings and specifications, quantify system constraints, and reconcile documentation with field conditions.
A record of independently delivering meaningful technical work: explaining the problem, evaluating options, making decisions, and verifying the outcome.
Practical knowledge of applicable electrical and building codes and safe electrical work practices, with sound judgment about when to involve licensed engineers or qualified specialists.
Comfort with ambiguity, changing priorities, and multiple projects. You communicate clearly, challenge assumptions constructively, and make progress while managing risk.
Relevant preparation through an electrical engineering degree, apprenticeship or trade progression, military technical training, field service, commissioning, or equivalent practical experience. A degree is not required.
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience in one or more of the following is valuable; we do not expect every candidate to bring all of it:
Mission-critical or high-power facilities; medium-voltage systems; redundancy strategies; utility coordination; brownfield upgrades or live-site cutovers.
Electrical testing, protective relays, equipment startup, load-bank testing, or integrated systems commissioning; applicable trade, testing, commissioning, or professional engineering credentials.
Power-system analysis, CAD/BIM, automation, or tools that improve design quality and turnaround; EPMS, BAS, or controls integration, including Tridium/Niagara and ALC
Electrical safety program implementation and NFPA 70E training; reliability improvements, capacity planning, and technical vendor or project leadership.
Target Backgrounds
We welcome candidates from consulting engineering and design-build firms; electrical contractors and trades; testing and commissioning companies; switchgear, UPS, and other equipment manufacturers or field-service teams; data centers and critical facilities; industrial plants and utilities; semiconductor, biotech, and advanced manufacturing facilities; research laboratories; and military power systems.
Relevant titles may include Electrical Engineer, Electrical Designer, Commissioning Engineer, Field Service Engineer or Technician, Electrical Superintendent, Industrial Electrician, Relay or Test Technician, Critical Facilities Engineer, Chief Engineer, or Plant Engineer. What matters is the depth of your electrical expertise, your judgment, and what you have personally delivered.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nOwn the electrical infrastructure that enables Etched to develop, test, and scale hardware from chip to rack to data center. As an individual contributor on the Capital Projects and Facilities Engineering team, you will translate evolving product requirements into practical electrical systems and drive projects from early planning and design through construction, commissioning, and operational handoff.\n\n\n\nYou will help establish our electrical standards, practice safe operations, build internal design capability, and accelerate decisions across new facilities and retrofits. You will serve as the electrical technical owner for assigned projects, develop internal concepts and preliminary designs, and direct technical work with consultants, contractors, and equipment vendors. External engineers of record will support detailed design and permitting where required.\n\n\n\nWe value strong fundamentals, practical judgment, and demonstrated ownership. Your experience may come from consulting, contracting, electrical trades, commissioning, facilities operations, military technical training, or another path. You should be comfortable with high velocity projects, working in the field, challenging assumptions, and turning incomplete or changing requirements into safe, executable solutions.\n\n\n\nKey Responsibilities\n\n - Translate stakeholder needs into electrical load forecasts, capacity plans, design criteria, and distribution concepts for bench, lab, rack test, and data center environments.\n\n - Assess prospective sites and identify infrastructure constraints and expansion options.\n\n - Develop single-line diagrams, load calculations, equipment requirements, and preliminary layouts. Evaluate distribution architectures and equipment including transformers, switchgear, UPS, generators, ATS, panelboards, busway, and rack power distribution.\n\n - Lead technical reviews of consultant designs, equipment submittals, and field installations. Scope and review short-circuit, protection coordination, arc-flash, and power-quality studies with qualified design partners; resolve constructability, maintainability, and system integration issues.\n\n - Own assigned electrical projects through scope definition, equipment selection, procurement support, construction coordination, commissioning, and handoff. Projects range from swapping receptacles to designing our pod. Develop BOM and specs, evaluate technical proposals, track cost and schedule impacts, and hold vendors accountable for deliverables.\n\n - Rapidly assess changing requirements, identify downstream impacts, and recommend options that balance safety, capacity, reliability, cost, and schedule. Drive agreed changes into coordinated designs and field execution; communicate risks and decisions early.\n\n - Define commissioning plans and acceptance criteria; coordinate energization, shutdowns, load testing, and integrated system testing with qualified personnel. Verify performance and drive deficiencies to closure.\n\n - Troubleshoot electrical problems, lead root-cause investigations, and deliver corrective actions. Use metering, monitoring, and trend data to identify capacity and reliability risks before they affect development or operations.\n\n - Partner with operations on electrical maintenance strategy, critical spares, training, and independently authored operating and maintenance procedures. Provide technical incident support and ensure complete as-builts, settings, test records, and handoff documentation.\n\n - Build repeatable standards, design tools, and lessons learned; mentor teammates and improve how the team delivers infrastructure. Coordinate across disciplines and geographic regions as project needs evolve. Travel to project sites, including the wider bay area and beyond as Etched grows. Support planned shutdowns or commissioning outside normal business hours as needed.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - Strong applied electrical fundamentals and the ability to reason through power distribution, three-phase loads, grounding and bonding, protection, power quality, and failure modes.\n\n - Demonstrated personal ownership across at least three areas: design, construction, commissioning, troubleshooting, or operations. Typically 5+ years of relevant experience; exceptional demonstrated capability matters more than a fixed tenure requirement.\n\n - The ability to develop or critically review electrical designs, interpret drawings and specifications, quantify system constraints, and reconcile documentation with field conditions.\n\n - A record of independently delivering meaningful technical work: explaining the problem, evaluating options, making decisions, and verifying the outcome.\n\n - Practical knowledge of applicable electrical and building codes and safe electrical work practices, with sound judgment about when to involve licensed engineers or qualified specialists.\n\n - Comfort with ambiguity, changing priorities, and multiple projects. You communicate clearly, challenge assumptions constructively, and make progress while managing risk.\n\n - Relevant preparation through an electrical engineering degree, apprenticeship or trade progression, military technical training, field service, commissioning, or equivalent practical experience. A degree is not required.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\nExperience in one or more of the following is valuable; we do not expect every candidate to bring all of it:\n\n - Mission-critical or high-power facilities; medium-voltage systems; redundancy strategies; utility coordination; brownfield upgrades or live-site cutovers.\n\n - Electrical testing, protective relays, equipment startup, load-bank testing, or integrated systems commissioning; applicable trade, testing, commissioning, or professional engineering credentials.\n\n - Power-system analysis, CAD/BIM, automation, or tools that improve design quality and turnaround; EPMS, BAS, or controls integration, including Tridium/Niagara and ALC\n\n - Electrical safety program implementation and NFPA 70E training; reliability improvements, capacity planning, and technical vendor or project leadership.\n\n\n\nTarget Backgrounds\n\nWe welcome candidates from consulting engineering and design-build firms; electrical contractors and trades; testing and commissioning companies; switchgear, UPS, and other equipment manufacturers or field-service teams; data centers and critical facilities; industrial plants and utilities; semiconductor, biotech, and advanced manufacturing facilities; research laboratories; and military power systems.\n\nRelevant titles may include Electrical Engineer, Electrical Designer, Commissioning Engineer, Field Service Engineer or Technician, Electrical Superintendent, Industrial Electrician, Relay or Test Technician, Critical Facilities Engineer, Chief Engineer, or Plant Engineer. What matters is the depth of your electrical expertise, your judgment, and what you have personally delivered.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"3f00dfa5-7f63-4dfb-8ef4-4c56307b85d5","title":"Corporate Paralegal","department":"Operations","team":"Operations","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-07-21T17:50:16.610+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/3f00dfa5-7f63-4dfb-8ef4-4c56307b85d5","applyUrl":"https://jobs.ashbyhq.com/etched/3f00dfa5-7f63-4dfb-8ef4-4c56307b85d5/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We're looking for a Corporate Paralegal who wants to take ownership of critical legal work at a rapidly scaling company. You'll work closely with our Legal team and leaders across the business on corporate governance, financings and strategic transactions, Board matters, contracts, entity management, and other major company milestones.
This is a hands-on role with significant ownership. You'll manage important legal processes and records, coordinate complex workstreams, and build systems that help Legal and the broader company move quickly without sacrificing accuracy. If you're excited by complexity, meticulous about details, and energized by the opportunity to build the legal infrastructure of an ambitious company, we'd love to talk.
Key Responsibilities
Own and maintain corporate records, minute books, resolutions, written consents, governance materials, and other key legal records.
Support Board and committee processes, including meeting materials, resolutions, minutes, approvals, signatures, and equity plan issuances.
Support financings, strategic transactions, and other major corporate matters by managing diligence requests, data rooms, transaction checklists, signatures, closing documents, and closing binders.
Partner with Legal, Finance, People, executives, outside counsel, and other teams to keep complex legal workstreams moving.
Maintain subsidiary and entity records and coordinate corporate filings, annual reports, foreign qualifications, registered agent matters, and related requirements.
Support securities and equity-related matters, including director and officer questionnaires, insider lists, stockholder actions, and other corporate compliance processes.
Help administer commercial agreements, including contract intake, approvals, execution, storage, renewals, and maintaining accurate contract records in Ironclad.
Coordinate signatures, notarizations, certifications, good-standing certificates, and other transaction and corporate requirements.
Maintain corporate, governance, transaction, and compliance calendars and ensure critical deadlines and deliverables don't slip.
Build practical templates, checklists, workflows, and systems that make recurring legal work faster and more reliable.
Take on new legal and corporate projects as Etched continues to scale.
You may be a good fit if you have (Must-have qualifications)
4+ years of experience as a corporate paralegal at a leading law firm, high-growth technology company, or similar environment.
Experience supporting venture financings, M&A, strategic transactions, tender offers, or other complex corporate matters.
Strong experience with corporate governance, Board processes, entity management, and maintaining corporate records.
Experience managing Carta, Ironclad, DocuSign, and virtual data rooms for a variety of diligence requests, transactions, and closing documents.
Exceptional attention to detail and a high bar for complete and accurate work.
Strong project management skills and the ability to manage multiple time-sensitive workstreams at once.
Sound judgment when handling confidential, privileged, and sensitive information.
Strong written and verbal communication skills.
The ability to work effectively with attorneys, executives, outside counsel, and teams across the company.
A track record of taking ownership, identifying what needs to happen next, and driving work through completion.
Comfort operating in a fast-moving environment where processes are still being built.
Strong candidates may also have experience with (Nice-to-have qualifications)
Supporting an IPO, public-company readiness, major financing, acquisition, tender offer, or other significant corporate transaction.
Working both at a leading corporate law firm and in-house at a high-growth company.
Securities compliance, SEC reporting, Section 16, or public-company governance.
Equity plans, stock administration, director and officer questionnaires, or stockholder matters.
Contract lifecycle management, Board management, entity management, or other legal technology.
Building or scaling legal processes at a rapidly growing company.
Supporting companies in semiconductors, AI infrastructure, advanced manufacturing, or other technically complex industries.
A paralegal certificate or equivalent corporate paralegal training.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe're looking for a Corporate Paralegal who wants to take ownership of critical legal work at a rapidly scaling company. You'll work closely with our Legal team and leaders across the business on corporate governance, financings and strategic transactions, Board matters, contracts, entity management, and other major company milestones.\n\n\n\nThis is a hands-on role with significant ownership. You'll manage important legal processes and records, coordinate complex workstreams, and build systems that help Legal and the broader company move quickly without sacrificing accuracy. If you're excited by complexity, meticulous about details, and energized by the opportunity to build the legal infrastructure of an ambitious company, we'd love to talk.\n\n\n\nKey Responsibilities\n\n - Own and maintain corporate records, minute books, resolutions, written consents, governance materials, and other key legal records.\n\n - Support Board and committee processes, including meeting materials, resolutions, minutes, approvals, signatures, and equity plan issuances.\n\n - Support financings, strategic transactions, and other major corporate matters by managing diligence requests, data rooms, transaction checklists, signatures, closing documents, and closing binders.\n\n - Partner with Legal, Finance, People, executives, outside counsel, and other teams to keep complex legal workstreams moving.\n\n - Maintain subsidiary and entity records and coordinate corporate filings, annual reports, foreign qualifications, registered agent matters, and related requirements.\n\n - Support securities and equity-related matters, including director and officer questionnaires, insider lists, stockholder actions, and other corporate compliance processes.\n\n - Help administer commercial agreements, including contract intake, approvals, execution, storage, renewals, and maintaining accurate contract records in Ironclad.\n\n - Coordinate signatures, notarizations, certifications, good-standing certificates, and other transaction and corporate requirements.\n\n - Maintain corporate, governance, transaction, and compliance calendars and ensure critical deadlines and deliverables don't slip.\n\n - Build practical templates, checklists, workflows, and systems that make recurring legal work faster and more reliable.\n\n - Take on new legal and corporate projects as Etched continues to scale.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - 4+ years of experience as a corporate paralegal at a leading law firm, high-growth technology company, or similar environment.\n\n - Experience supporting venture financings, M&A, strategic transactions, tender offers, or other complex corporate matters.\n\n - Strong experience with corporate governance, Board processes, entity management, and maintaining corporate records.\n\n - Experience managing Carta, Ironclad, DocuSign, and virtual data rooms for a variety of diligence requests, transactions, and closing documents.\n\n - Exceptional attention to detail and a high bar for complete and accurate work.\n\n - Strong project management skills and the ability to manage multiple time-sensitive workstreams at once.\n\n - Sound judgment when handling confidential, privileged, and sensitive information.\n\n - Strong written and verbal communication skills.\n\n - The ability to work effectively with attorneys, executives, outside counsel, and teams across the company.\n\n - A track record of taking ownership, identifying what needs to happen next, and driving work through completion.\n\n - Comfort operating in a fast-moving environment where processes are still being built.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Supporting an IPO, public-company readiness, major financing, acquisition, tender offer, or other significant corporate transaction.\n\n - Working both at a leading corporate law firm and in-house at a high-growth company.\n\n - Securities compliance, SEC reporting, Section 16, or public-company governance.\n\n - Equity plans, stock administration, director and officer questionnaires, or stockholder matters.\n\n - Contract lifecycle management, Board management, entity management, or other legal technology.\n\n - Building or scaling legal processes at a rapidly growing company.\n\n - Supporting companies in semiconductors, AI infrastructure, advanced manufacturing, or other technically complex industries.\n\n - A paralegal certificate or equivalent corporate paralegal training.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"74709ee1-a4a4-4acf-9e7e-b4f9babdc481","title":"Manufacturing Design Program Manager","department":"Production","team":"Production","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-07-23T21:33:14.559+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/74709ee1-a4a4-4acf-9e7e-b4f9babdc481","applyUrl":"https://jobs.ashbyhq.com/etched/74709ee1-a4a4-4acf-9e7e-b4f9babdc481/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is seeking a Manufacturing Design Program Manager to drive technical manufacturing readiness across new product introduction and mass production for our transformer-specific AI systems. This highly cross-functional individual contributor role sits at the intersection of design engineering, test engineering, SMT, FATP, supply chain, and operations. You will lead manufacturing execution from early design-for-manufacturing (DFM) reviews through production ramp, ensuring products are designed for manufacturability and successfully transitioned into high-volume production.
Key Responsibilities
Drive manufacturing technical readiness across NPI and mass production in close partnership with hardware design, test engineering, SMT engineering, FATP process engineering, supply chain, and operations teams.
Lead DFM reviews across L6, L10, and L11 assemblies, identifying manufacturability risks, integration challenges, and process constraints early in the product development cycle.
Own manufacturing readiness for assigned programs, tracking build readiness, factory execution, process capability, yield, schedule, and key manufacturing risks.
Coordinate cross-functional execution across prototype, EVT, DVT, PVT, and production builds, ensuring manufacturing deliverables remain on schedule.
Partner with contract manufacturers and supply chain teams to develop production plans, line bring-up schedules, tooling readiness, and factory ramp strategies.
Drive issue resolution during engineering and production builds through structured root cause analysis and cross-functional coordination.
Monitor manufacturing KPIs including yield, cycle time, quality, and factory readiness while driving continuous improvement initiatives.
Prepare and communicate manufacturing status, risks, mitigation plans, and execution updates to engineering leadership and executive stakeholders.
Partner closely with design engineering to ensure manufacturing considerations are incorporated throughout the product development lifecycle.
Travel to domestic and international manufacturing partners as needed to support production readiness and critical builds.
You may be a good fit if you have (Must-have qualifications)
7+ years of experience in hardware engineering, with experience transitioning into Technical Program Management, Design Program Management, or Manufacturing Program Management.
Strong preference for candidates with a background in mechanical, electrical, systems, or manufacturing engineering who have led cross-functional hardware programs through NPI and production.
Experience managing manufacturing readiness for complex electromechanical systems or high-performance compute hardware.
Strong understanding of manufacturing development phases including EVT, DVT, PVT, and production ramp.
Experience leading DFM reviews and partnering closely with hardware engineering throughout product development.
Experience working directly with contract manufacturers, FATP partners, or ODM/OEM manufacturing operations.
Excellent cross-functional program management skills with the ability to coordinate engineering, manufacturing, supply chain, and operations teams.
Strong analytical and problem-solving skills with experience driving manufacturing issue resolution.
Excellent written and verbal communication skills, including presenting program status, risks, and tradeoffs to senior leadership.
Willingness to work in-person from our San Jose office and travel internationally to manufacturing partners as needed.
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience building AI servers, accelerator systems, networking hardware, storage systems, or other high-performance compute platforms.
Familiarity with SMT manufacturing, factory operations, automated test systems, or final system integration.
Experience with manufacturing yield analytics, SPC methodologies, process capability metrics, or manufacturing data systems.
Experience with liquid-cooled systems, advanced packaging, or high-density compute platforms.
Experience partnering closely with ASIC, systems, thermal, reliability, or validation engineering teams.
Experience working in fast-paced startup environments bringing first-generation hardware products into production.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched is seeking a Manufacturing Design Program Manager to drive technical manufacturing readiness across new product introduction and mass production for our transformer-specific AI systems. This highly cross-functional individual contributor role sits at the intersection of design engineering, test engineering, SMT, FATP, supply chain, and operations. You will lead manufacturing execution from early design-for-manufacturing (DFM) reviews through production ramp, ensuring products are designed for manufacturability and successfully transitioned into high-volume production.\n\n\n\nKey Responsibilities\n\n - Drive manufacturing technical readiness across NPI and mass production in close partnership with hardware design, test engineering, SMT engineering, FATP process engineering, supply chain, and operations teams.\n\n - Lead DFM reviews across L6, L10, and L11 assemblies, identifying manufacturability risks, integration challenges, and process constraints early in the product development cycle.\n\n - Own manufacturing readiness for assigned programs, tracking build readiness, factory execution, process capability, yield, schedule, and key manufacturing risks.\n\n - Coordinate cross-functional execution across prototype, EVT, DVT, PVT, and production builds, ensuring manufacturing deliverables remain on schedule.\n\n - Partner with contract manufacturers and supply chain teams to develop production plans, line bring-up schedules, tooling readiness, and factory ramp strategies.\n\n - Drive issue resolution during engineering and production builds through structured root cause analysis and cross-functional coordination.\n\n - Monitor manufacturing KPIs including yield, cycle time, quality, and factory readiness while driving continuous improvement initiatives.\n\n - Prepare and communicate manufacturing status, risks, mitigation plans, and execution updates to engineering leadership and executive stakeholders.\n\n - Partner closely with design engineering to ensure manufacturing considerations are incorporated throughout the product development lifecycle.\n\n - Travel to domestic and international manufacturing partners as needed to support production readiness and critical builds.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - 7+ years of experience in hardware engineering, with experience transitioning into Technical Program Management, Design Program Management, or Manufacturing Program Management.\n\n - Strong preference for candidates with a background in mechanical, electrical, systems, or manufacturing engineering who have led cross-functional hardware programs through NPI and production.\n\n - Experience managing manufacturing readiness for complex electromechanical systems or high-performance compute hardware.\n\n - Strong understanding of manufacturing development phases including EVT, DVT, PVT, and production ramp.\n\n - Experience leading DFM reviews and partnering closely with hardware engineering throughout product development.\n\n - Experience working directly with contract manufacturers, FATP partners, or ODM/OEM manufacturing operations.\n\n - Excellent cross-functional program management skills with the ability to coordinate engineering, manufacturing, supply chain, and operations teams.\n\n - Strong analytical and problem-solving skills with experience driving manufacturing issue resolution.\n\n - Excellent written and verbal communication skills, including presenting program status, risks, and tradeoffs to senior leadership.\n\n - Willingness to work in-person from our San Jose office and travel internationally to manufacturing partners as needed.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\nExperience building AI servers, accelerator systems, networking hardware, storage systems, or other high-performance compute platforms.\n\nFamiliarity with SMT manufacturing, factory operations, automated test systems, or final system integration.\n\nExperience with manufacturing yield analytics, SPC methodologies, process capability metrics, or manufacturing data systems.\n\nExperience with liquid-cooled systems, advanced packaging, or high-density compute platforms.\n\nExperience partnering closely with ASIC, systems, thermal, reliability, or validation engineering teams.\n\nExperience working in fast-paced startup environments bringing first-generation hardware products into production.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"7db7f5f0-dbb9-41c7-9fda-4a010ec6a868","title":"Test Technical Program Manager","department":"Production","team":"Production","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-07-23T21:43:45.924+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/7db7f5f0-dbb9-41c7-9fda-4a010ec6a868","applyUrl":"https://jobs.ashbyhq.com/etched/7db7f5f0-dbb9-41c7-9fda-4a010ec6a868/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is seeking a Test Technical Program Manager to drive manufacturing test strategy and execution across new product introduction and mass production for our transformer-specific AI systems. This highly cross-functional individual contributor role sits at the intersection of hardware engineering, test engineering, manufacturing engineering, firmware, software, supply chain, and operations. You will own the program management of manufacturing test development—from early architecture and test strategy through factory deployment, production ramp, and yield optimization—ensuring every system ships with robust, scalable, and high-quality manufacturing test coverage.
Key Responsibilities
Drive end-to-end execution of manufacturing test programs across prototype, EVT, DVT, PVT, and mass production builds.
Partner with hardware, firmware, software, systems, validation, and manufacturing engineering teams to define manufacturing test strategy, milestones, and deliverables.
Coordinate development and deployment of board-level, subsystem, and system-level manufacturing test solutions across L6, L10, and L11 assemblies.
Drive cross-functional execution to ensure manufacturing test hardware, software, fixtures, automation, and infrastructure are ready to support production milestones.
Partner with contract manufacturers and FATP partners to deploy, validate, and scale manufacturing test processes globally.
Track manufacturing test readiness, station bring-up, throughput, capacity, coverage, and factory deployment status for assigned programs.
Lead cross-functional resolution of manufacturing test issues during engineering and production builds through structured root cause analysis and execution tracking.
Drive manufacturing test yield improvements, failure analysis, retest reduction, and continuous optimization of factory test processes.
Prepare and communicate manufacturing test status, risks, dependencies, and mitigation plans to engineering leadership and executive stakeholders.
Travel to domestic and international manufacturing partners to support production readiness, factory bring-up, and critical builds.
You may be a good fit if you have (Must-have qualifications)
7+ years of experience in hardware test engineering, with experience transitioning into a Technical Program Management role.
Strong preference for candidates with a background in electrical, systems, validation, or test engineering who have led cross-functional hardware programs through NPI and production.
Experience managing manufacturing test programs for complex hardware systems from development through production.
Strong understanding of manufacturing development phases including EVT, DVT, PVT, and production ramp.
Experience partnering closely with hardware, firmware, software, validation, and manufacturing engineering teams.
Experience working with contract manufacturers, FATP partners, or ODM/OEM manufacturing organizations.
Understanding of manufacturing test concepts including test coverage, station architecture, fixture development, automation, yield analysis, and failure diagnostics.
Excellent cross-functional program management skills with the ability to coordinate engineering, manufacturing, and operations teams.
Strong communication skills with experience presenting technical program status, risks, and tradeoffs to senior leadership.
Willingness to work in-person from our San Jose office and travel internationally to manufacturing partners as needed.
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience developing manufacturing test for AI servers, accelerator systems, networking hardware, storage systems, or other high-performance compute platforms.
Familiarity with board-level test, system-level test, boundary scan, functional test, burn-in, HASS/HALT, or factory automation.
Experience with automated test equipment, test software frameworks, fixture development, or manufacturing diagnostics.
Experience analyzing manufacturing yield, failure Pareto, and test escape data to improve product quality.
Experience working closely with ASIC, firmware, systems, validation, reliability, or hardware engineering teams.
Experience supporting first-generation hardware products through factory bring-up in a fast-paced startup environment.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched is seeking a Test Technical Program Manager to drive manufacturing test strategy and execution across new product introduction and mass production for our transformer-specific AI systems. This highly cross-functional individual contributor role sits at the intersection of hardware engineering, test engineering, manufacturing engineering, firmware, software, supply chain, and operations. You will own the program management of manufacturing test development—from early architecture and test strategy through factory deployment, production ramp, and yield optimization—ensuring every system ships with robust, scalable, and high-quality manufacturing test coverage.\n\n\n\nKey Responsibilities\n\n - Drive end-to-end execution of manufacturing test programs across prototype, EVT, DVT, PVT, and mass production builds.\n\n - Partner with hardware, firmware, software, systems, validation, and manufacturing engineering teams to define manufacturing test strategy, milestones, and deliverables.\n\n - Coordinate development and deployment of board-level, subsystem, and system-level manufacturing test solutions across L6, L10, and L11 assemblies.\n\n - Drive cross-functional execution to ensure manufacturing test hardware, software, fixtures, automation, and infrastructure are ready to support production milestones.\n\n - Partner with contract manufacturers and FATP partners to deploy, validate, and scale manufacturing test processes globally.\n\n - Track manufacturing test readiness, station bring-up, throughput, capacity, coverage, and factory deployment status for assigned programs.\n\n - Lead cross-functional resolution of manufacturing test issues during engineering and production builds through structured root cause analysis and execution tracking.\n\n - Drive manufacturing test yield improvements, failure analysis, retest reduction, and continuous optimization of factory test processes.\n\n - Prepare and communicate manufacturing test status, risks, dependencies, and mitigation plans to engineering leadership and executive stakeholders.\n\n - Travel to domestic and international manufacturing partners to support production readiness, factory bring-up, and critical builds.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - 7+ years of experience in hardware test engineering, with experience transitioning into a Technical Program Management role.\n\n - Strong preference for candidates with a background in electrical, systems, validation, or test engineering who have led cross-functional hardware programs through NPI and production.\n\n - Experience managing manufacturing test programs for complex hardware systems from development through production.\n\n - Strong understanding of manufacturing development phases including EVT, DVT, PVT, and production ramp.\n\n - Experience partnering closely with hardware, firmware, software, validation, and manufacturing engineering teams.\n\n - Experience working with contract manufacturers, FATP partners, or ODM/OEM manufacturing organizations.\n\n - Understanding of manufacturing test concepts including test coverage, station architecture, fixture development, automation, yield analysis, and failure diagnostics.\n\n - Excellent cross-functional program management skills with the ability to coordinate engineering, manufacturing, and operations teams.\n\n - Strong communication skills with experience presenting technical program status, risks, and tradeoffs to senior leadership.\n\n - Willingness to work in-person from our San Jose office and travel internationally to manufacturing partners as needed.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Experience developing manufacturing test for AI servers, accelerator systems, networking hardware, storage systems, or other high-performance compute platforms.\n\n - Familiarity with board-level test, system-level test, boundary scan, functional test, burn-in, HASS/HALT, or factory automation.\n\n - Experience with automated test equipment, test software frameworks, fixture development, or manufacturing diagnostics.\n\n - Experience analyzing manufacturing yield, failure Pareto, and test escape data to improve product quality.\n\n - Experience working closely with ASIC, firmware, systems, validation, reliability, or hardware engineering teams.\n\n - Experience supporting first-generation hardware products through factory bring-up in a fast-paced startup environment.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"7b34b2af-a0dc-42fa-8c19-7e27cf9c68af","title":"Thermal Manufacturing Engineer","department":"Production","team":"Production","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-07-27T23:45:11.869+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/7b34b2af-a0dc-42fa-8c19-7e27cf9c68af","applyUrl":"https://jobs.ashbyhq.com/etched/7b34b2af-a0dc-42fa-8c19-7e27cf9c68af/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a Thermal Manufacturing Engineer to own the development, qualification, and scaling of thermal management manufacturing processes for Etched's silicon-to-system products. This role is focused on liquid cooling systems—primarily cold plates—and the manufacturing processes required to bring them from prototype to high-volume production.
You will be the technical authority on cold plate fabrication methods including skiving, brazing, friction stir welding, diffusion bonding, and related processes. You'll work hands-on with contract manufacturing partners and internal hardware, thermal, and systems teams to ensure our liquid cooling solutions meet the demanding performance, quality, and reliability requirements of frontier AI infrastructure.
Key Responsibilities
Own the end-to-end manufacturing engineering for thermal components and assemblies (focus on cold plates & manifolds), from NPI through mass production.
Develop, qualify, and optimize cold plate fabrication processes including but not limited to skiving, vacuum brazing, friction stir welding, diffusion bonding, gun drilling, and extrusion-based channel formation.
Define process parameters, controls, and acceptance criteria for each manufacturing method; establish capability benchmarks (Cpk, yield, leak rate, flatness, pressure drop).
Partner with thermal and mechanical design teams early in development to drive DFx for liquid cooling system designs.
Lead process qualification and first-article inspection at CM/supplier sites; own PFMEA, control plans, and process validation documentation.
Drive root cause analysis and corrective action for manufacturing defects—leaks, delamination, warpage, insufficient bonding, dimensional non-conformance.
Evaluate and qualify new suppliers and manufacturing technologies for cold plates and thermal interface materials.
Define and monitor key manufacturing KPIs: yield, leak rate, flatness, cycle time, rework rate, and cost per unit.
Collaborate with Manufacturing Test to integrate cold plate pressure testing, flow testing, and thermal performance validation into production lines.
Support failure analysis and closed-loop feedback between factory, design, and reliability teams for thermal-related field issues.
Build manufacturing dashboards and reporting for cold plate yield, defect pareto, and process capability trends.
Drive continuous improvement in cold plate cost, cycle time, and quality through systematic DOEs and process optimization.
You may be a good fit if you have (Must-have qualifications)
7+ years of experience in manufacturing engineering, process engineering, or thermal systems manufacturing, with direct hands-on experience producing liquid cold plates or heat exchangers.
Demonstrated expertise in two or more of the following cold plate fabrication processes: skiving, vacuum brazing, friction stir welding, diffusion bonding, gun drilling, or extrusion-based channel formation.
Strong understanding of aluminum and copper alloy properties, braze alloy selection, and metallurgical failure modes relevant to thermal hardware.
Experience qualifying cold plate manufacturers and running process capability studies (Cpk, GR&R) for leak rate, flatness, pressure drop, and thermal resistance.
Hands-on experience with cold plate inspection and test methods: helium leak testing, hydrostatic pressure testing, flow/pressure-drop characterization, flatness measurement.
Experience with DFM/DFY reviews for cold plate and liquid cooling system designs.
Track record of driving root cause analysis and corrective action for cold plate manufacturing defects in production.
Experience working directly with contract manufacturers and thermal component suppliers, preferably in Asia.
Familiarity with system-level liquid cooling architectures (single-loop, CDU-based, direct liquid cooling) and how cold plate manufacturing choices affect system-level performance.
Strong technical documentation skills: PFMEA, control plans, work instructions, first-article inspection reports.
Bachelor's degree in Mechanical Engineering, Materials Science, Manufacturing Engineering, or a related field.
Prior experience in server, HPC, datacenter, or power electronics thermal management is strongly preferred.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a Thermal Manufacturing Engineer to own the development, qualification, and scaling of thermal management manufacturing processes for Etched's silicon-to-system products. This role is focused on liquid cooling systems—primarily cold plates—and the manufacturing processes required to bring them from prototype to high-volume production.\n\n\n\nYou will be the technical authority on cold plate fabrication methods including skiving, brazing, friction stir welding, diffusion bonding, and related processes. You'll work hands-on with contract manufacturing partners and internal hardware, thermal, and systems teams to ensure our liquid cooling solutions meet the demanding performance, quality, and reliability requirements of frontier AI infrastructure.\n\n\n\nKey Responsibilities\n\n - Own the end-to-end manufacturing engineering for thermal components and assemblies (focus on cold plates & manifolds), from NPI through mass production.\n\n - Develop, qualify, and optimize cold plate fabrication processes including but not limited to skiving, vacuum brazing, friction stir welding, diffusion bonding, gun drilling, and extrusion-based channel formation.\n\n - Define process parameters, controls, and acceptance criteria for each manufacturing method; establish capability benchmarks (Cpk, yield, leak rate, flatness, pressure drop).\n\n - Partner with thermal and mechanical design teams early in development to drive DFx for liquid cooling system designs.\n\n - Lead process qualification and first-article inspection at CM/supplier sites; own PFMEA, control plans, and process validation documentation.\n\n - Drive root cause analysis and corrective action for manufacturing defects—leaks, delamination, warpage, insufficient bonding, dimensional non-conformance.\n\n - Evaluate and qualify new suppliers and manufacturing technologies for cold plates and thermal interface materials.\n\n - Define and monitor key manufacturing KPIs: yield, leak rate, flatness, cycle time, rework rate, and cost per unit.\n\n - Collaborate with Manufacturing Test to integrate cold plate pressure testing, flow testing, and thermal performance validation into production lines.\n\n - Support failure analysis and closed-loop feedback between factory, design, and reliability teams for thermal-related field issues.\n\n - Build manufacturing dashboards and reporting for cold plate yield, defect pareto, and process capability trends.\n\n - Drive continuous improvement in cold plate cost, cycle time, and quality through systematic DOEs and process optimization.\n\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - 7+ years of experience in manufacturing engineering, process engineering, or thermal systems manufacturing, with direct hands-on experience producing liquid cold plates or heat exchangers.\n\n - Demonstrated expertise in two or more of the following cold plate fabrication processes: skiving, vacuum brazing, friction stir welding, diffusion bonding, gun drilling, or extrusion-based channel formation.\n\n - Strong understanding of aluminum and copper alloy properties, braze alloy selection, and metallurgical failure modes relevant to thermal hardware.\n\n - Experience qualifying cold plate manufacturers and running process capability studies (Cpk, GR&R) for leak rate, flatness, pressure drop, and thermal resistance.\n\n - Hands-on experience with cold plate inspection and test methods: helium leak testing, hydrostatic pressure testing, flow/pressure-drop characterization, flatness measurement.\n\n - Experience with DFM/DFY reviews for cold plate and liquid cooling system designs.\n\n - Track record of driving root cause analysis and corrective action for cold plate manufacturing defects in production.\n\n - Experience working directly with contract manufacturers and thermal component suppliers, preferably in Asia.\n\n - Familiarity with system-level liquid cooling architectures (single-loop, CDU-based, direct liquid cooling) and how cold plate manufacturing choices affect system-level performance.\n\n - Strong technical documentation skills: PFMEA, control plans, work instructions, first-article inspection reports.\n\n - Bachelor's degree in Mechanical Engineering, Materials Science, Manufacturing Engineering, or a related field.\n\n - Prior experience in server, HPC, datacenter, or power electronics thermal management is strongly preferred.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"ce3105a1-b9a2-4ebf-a228-7f07e5654ab6","title":"Prototype Engineering Lead","department":"Production","team":"Production","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-07-28T19:39:38.292+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/ce3105a1-b9a2-4ebf-a228-7f07e5654ab6","applyUrl":"https://jobs.ashbyhq.com/etched/ce3105a1-b9a2-4ebf-a228-7f07e5654ab6/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are standing up an in-house prototyping division at our 80,000 square foot Milpitas facility: a quick-turn machine shop and sheet metal cell, a system assembly and integration area, and a prototype SMT line. The outcome you are hired to deliver is simple to state and hard to do: any Etched engineer can get a prototype part made with same-day or next-day turnaround. You own the entire outcome required to make that true — hiring, shop setup, process, and execution.
Key Responsibilities
Own the end-to-end stand-up of the prototyping division: space planning, equipment selection and procurement, facility improvements, permits, and commissioning of the machine shop, sheet metal cell, assembly area, and prototype SMT line
Hire, lead, and develop a team of machinists, fabricators, and assembly technicians.
Run day-to-day operations against the division's core metric: same-day or next-day turnaround on prototype parts for engineering
Build the systems that make a shop run: work intake and prioritization, quoting, scheduling, traceability, inventory and vendor-managed consumables, and preventive maintenance
Own the division budget (capex and opex), make build-vs-buy calls, and manage relationships with machine dealers, riggers, and overflow vendors
Stand up quality infrastructure: first-article inspection, calibration program, cross-section/failure-analysis lab, and inspection criteria for incoming and in-process work
Partner daily with mechanical, electrical, and thermal engineering teams to close design-for-manufacturability feedback loops and pull schedules in.
You may be a good fit if you have
Bachelor's degree in mechanical engineering, manufacturing engineering, industrial engineering, or other engineering discipline; OR 4+ years of professional experience in manufacturing or prototype operations in lieu of a degree
3+ years of experience in manufacturing, machine shop, or hardware prototyping operations
2+ years of experience directly leading technicians, machinists, or manufacturing teams
Hands-on experience with CNC machining and/or sheet metal fabrication processes
Strong candidates may also have experience with
Experience standing up a machine shop, prototype lab, or manufacturing line from an empty floor: equipment selection, rigging, utilities, and permits
Working knowledge across the processes we run: 3-axis CNC milling, manual machining, waterjet cutting, CNC press brake forming, welding, and hardware insertion
Experience with PCBA/SMT NPI processes (stencil printing, pick and place, reflow, AOI, X-ray, rework) or willingness to build that capability with a strong process engineer
Experience with liquid-cooled systems, server/rack-scale hardware, or data center equipment assembly and test
Familiarity with California manufacturing compliance: Cal/OSHA, CUPA/HMBP hazmat programs, BAAQMD air permits, wastewater discharge
Experience implementing ERP/MES or lightweight traceability systems in a job-shop or NPI environment
Ability to personally run a mill, brake, or lathe when the queue demands it
Experience in a high-growth startup or program-driven environment (aerospace, automotive, consumer hardware NPI)
Track record of hiring and retaining skilled trades talent in a competitive market
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are standing up an in-house prototyping division at our 80,000 square foot Milpitas facility: a quick-turn machine shop and sheet metal cell, a system assembly and integration area, and a prototype SMT line. The outcome you are hired to deliver is simple to state and hard to do: any Etched engineer can get a prototype part made with same-day or next-day turnaround. You own the entire outcome required to make that true — hiring, shop setup, process, and execution.\n\n\n\nKey Responsibilities\n\n - Own the end-to-end stand-up of the prototyping division: space planning, equipment selection and procurement, facility improvements, permits, and commissioning of the machine shop, sheet metal cell, assembly area, and prototype SMT line\n\n - Hire, lead, and develop a team of machinists, fabricators, and assembly technicians.\n\n - Run day-to-day operations against the division's core metric: same-day or next-day turnaround on prototype parts for engineering\n\n - Build the systems that make a shop run: work intake and prioritization, quoting, scheduling, traceability, inventory and vendor-managed consumables, and preventive maintenance\n\n - Own the division budget (capex and opex), make build-vs-buy calls, and manage relationships with machine dealers, riggers, and overflow vendors\n\n - Stand up quality infrastructure: first-article inspection, calibration program, cross-section/failure-analysis lab, and inspection criteria for incoming and in-process work\n\n - Partner daily with mechanical, electrical, and thermal engineering teams to close design-for-manufacturability feedback loops and pull schedules in.\n\n\n\nYou may be a good fit if you have\n\n - Bachelor's degree in mechanical engineering, manufacturing engineering, industrial engineering, or other engineering discipline; OR 4+ years of professional experience in manufacturing or prototype operations in lieu of a degree\n\n - 3+ years of experience in manufacturing, machine shop, or hardware prototyping operations\n\n - 2+ years of experience directly leading technicians, machinists, or manufacturing teams\n\n - Hands-on experience with CNC machining and/or sheet metal fabrication processes\n\n\n\nStrong candidates may also have experience with\n\n - Experience standing up a machine shop, prototype lab, or manufacturing line from an empty floor: equipment selection, rigging, utilities, and permits\n\n - Working knowledge across the processes we run: 3-axis CNC milling, manual machining, waterjet cutting, CNC press brake forming, welding, and hardware insertion\n\n - Experience with PCBA/SMT NPI processes (stencil printing, pick and place, reflow, AOI, X-ray, rework) or willingness to build that capability with a strong process engineer\n\n - Experience with liquid-cooled systems, server/rack-scale hardware, or data center equipment assembly and test\n\n - Familiarity with California manufacturing compliance: Cal/OSHA, CUPA/HMBP hazmat programs, BAAQMD air permits, wastewater discharge\n\n - Experience implementing ERP/MES or lightweight traceability systems in a job-shop or NPI environment\n\n - Ability to personally run a mill, brake, or lathe when the queue demands it\n\n - Experience in a high-growth startup or program-driven environment (aerospace, automotive, consumer hardware NPI)\n\n - Track record of hiring and retaining skilled trades talent in a competitive market\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"b90f3b95-3fd4-467e-a675-27812d47c195","title":"Head of Technical Accounting","department":"Finance","team":"Finance","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-07-29T06:57:38.294+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/b90f3b95-3fd4-467e-a675-27812d47c195","applyUrl":"https://jobs.ashbyhq.com/etched/b90f3b95-3fd4-467e-a675-27812d47c195/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As our first hire on the technical accounting and financial reporting team, you will be a key architect behind some of our most critical accounting initiatives. From implementing our revenue, inventory, and warranty policies, to building our external financial reporting capability from 0 to 1, we are looking for a driven and talented accounting lead to execute on some of our most important day-to-day financial operations.
You will work closely with the leadership across go-to-market, finance, and legal to build out our deal desk playbook to execute novel structures and ensure the company can continue to scale with accurate, compliant, and well-supported financial statements. This is a high-trust role that will require end-to-end ownership over key strategic projects. We’re looking for the type of individual that is constantly looking to improve existing processes and do deep research on high leverage projects.
Key Responsibilities
Own end-to-end revenue accounting policies under ASC 606 (or IFRS 15), including review of complex contracts, multiple performance obligations, variable consideration, and non-standard deal terms
Partner with Go-to-market, Legal, and the Deal Desk function to assess revenue treatment for new products, bundled offerings, and non-standard contracts before deals close
Ensure Netsuite’s Advanced Revenue Management (ARM) is implemented in accordance with technical guidance and compliant with all internal and external accounting standards
Research and document the company's position on complex and emerging accounting issues (e.g., R&D NRE, leases, stock-based compensation, debt/equity instruments, impairments)
Draft technical memos and accounting position papers for review by controller and external auditors
Provide guidance on Inventory, Cost of Sales, Warranty Technical accounting guidance and serve as the internal subject matter expert on technical accounting matters
Lead preparation of external financial statements and footnote disclosures (10-K/10-Q if public, or audited financials if private)
Ensure compliance with GAAP/IFRS, SEC reporting requirements (if applicable), and internal accounting policies
Sign-off on the quarterly and annual close process as it relates to revenue and technical accounting areas
Own Equity related financial reporting: tool selection, data conversion, financial reporting related to Equity
Build, manage, and develop a team of revenue and technical accounting professionals
Strengthening internal controls (SOX, if applicable) related to revenue and financial reporting
You may be a good fit if you have
Bachelor’s degree in accounting, Finance, or related field; CPA required
10+ years of progressive accounting experience, including significant time in public accounting (Big 4 preferred) and/or a corporate technical accounting/revenue role
Deep expertise in ASC 606 and broad technical accounting knowledge across multiple areas of GAAP
Experience with SEC reporting and public company requirements strongly preferred
Prior people management experience, with a track record of building and developing high-performing teams
Excellent written and verbal communication skills, with the ability to translate complex accounting concepts for non-accounting stakeholders
Strong candidates may also have experience with
Experience building the technical accounting and financial reporting function from 0 to 1 at a high-growth, venture-backed company.
Experience in inventory accounting, manufacturing cost accounting, and hardware revenue recognition, including warranty reserves, NRE, and complex customer contracts.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nAs our first hire on the technical accounting and financial reporting team, you will be a key architect behind some of our most critical accounting initiatives. From implementing our revenue, inventory, and warranty policies, to building our external financial reporting capability from 0 to 1, we are looking for a driven and talented accounting lead to execute on some of our most important day-to-day financial operations.\n\n\n\nYou will work closely with the leadership across go-to-market, finance, and legal to build out our deal desk playbook to execute novel structures and ensure the company can continue to scale with accurate, compliant, and well-supported financial statements. This is a high-trust role that will require end-to-end ownership over key strategic projects. We’re looking for the type of individual that is constantly looking to improve existing processes and do deep research on high leverage projects.\n\n\n\nKey Responsibilities\n\n - Own end-to-end revenue accounting policies under ASC 606 (or IFRS 15), including review of complex contracts, multiple performance obligations, variable consideration, and non-standard deal terms\n\n - Partner with Go-to-market, Legal, and the Deal Desk function to assess revenue treatment for new products, bundled offerings, and non-standard contracts before deals close\n\n - Ensure Netsuite’s Advanced Revenue Management (ARM) is implemented in accordance with technical guidance and compliant with all internal and external accounting standards\n\n - Research and document the company's position on complex and emerging accounting issues (e.g., R&D NRE, leases, stock-based compensation, debt/equity instruments, impairments)\n\n - Draft technical memos and accounting position papers for review by controller and external auditors\n\n - Provide guidance on Inventory, Cost of Sales, Warranty Technical accounting guidance and serve as the internal subject matter expert on technical accounting matters\n\n - Lead preparation of external financial statements and footnote disclosures (10-K/10-Q if public, or audited financials if private)\n\n - Ensure compliance with GAAP/IFRS, SEC reporting requirements (if applicable), and internal accounting policies\n\n - Sign-off on the quarterly and annual close process as it relates to revenue and technical accounting areas\n\n - Own Equity related financial reporting: tool selection, data conversion, financial reporting related to Equity\n\n - Build, manage, and develop a team of revenue and technical accounting professionals\n\n - Strengthening internal controls (SOX, if applicable) related to revenue and financial reporting\n\n\n\nYou may be a good fit if you have\n\n - Bachelor’s degree in accounting, Finance, or related field; CPA required\n\n - 10+ years of progressive accounting experience, including significant time in public accounting (Big 4 preferred) and/or a corporate technical accounting/revenue role\n\n - Deep expertise in ASC 606 and broad technical accounting knowledge across multiple areas of GAAP\n\n - Experience with SEC reporting and public company requirements strongly preferred\n\n - Prior people management experience, with a track record of building and developing high-performing teams\n\n - Excellent written and verbal communication skills, with the ability to translate complex accounting concepts for non-accounting stakeholders\n\n\n\nStrong candidates may also have experience with\n\n - Experience building the technical accounting and financial reporting function from 0 to 1 at a high-growth, venture-backed company.\n\n - Experience in inventory accounting, manufacturing cost accounting, and hardware revenue recognition, including warranty reserves, NRE, and complex customer contracts.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"ba35dfd4-168a-46c9-884a-f02570ad8a99","title":"Power Integrity Engineer","department":"Platform","team":"Platform","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-07-30T06:14:58.694+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/ba35dfd4-168a-46c9-884a-f02570ad8a99","applyUrl":"https://jobs.ashbyhq.com/etched/ba35dfd4-168a-46c9-884a-f02570ad8a99/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are looking for a Power Integrity (PI) Engineer to join our platform electrical engineering team. In this role, you will own the power integrity methodology for high-power PCB and system designs — from early architecture through final release — ensuring robust power delivery to high-performance ASICs and supporting components across all operating conditions.
Key Responsibilities
Perform pre- and post-layout PDN analysis for high-current ASIC power rails: target impedance profiling, decoupling capacitor selection and placement optimization, and plane resonance analysis.
Execute DC IR-drop and current density simulations; define copper weight, plane shapes, via stitching, and layer allocation requirements for PCB designers.
Conduct AC impedance analysis from VRM output through package and die, including ESR/ESL modeling of the full decoupling network.
Develop and validate VRM models; analyze load transient response, AVP/load-line behavior, and multiphase converter performance against ASIC power specifications.
Perform power-plane thermal co-simulation and work with mechanical teams on thermal-electrical tradeoffs for high-current delivery.
Drive design rule checks for PI compliance; work with layout teams in Cadence Allegro / Sigrity PowerDC/PowerSI or Ansys SIwave.
Collaborate with power design, PCB layout, and ASIC/package teams to define power delivery architecture and review guidelines early in the product lifecycle.
Support bring-up, debug rail-level issues (droop, ripple, transient excursions), and document root-cause findings with clear corrective actions.
Develop and maintain simulation-to-hardware correlation databases to continuously improve PDN modeling accuracy.
You may be a good fit if you have (Must-have qualifications)
B.S. or M.S. in Electrical Engineering or a closely related discipline.
5+ years of hands-on PI experience on high-current, high-performance designs (ASIC/CPU/GPU power delivery, server boards, or accelerator platforms).
Proficiency with industry PI EDA tools (Ansys SIwave, Cadence Sigrity PowerDC/PowerSI/OptimizePI, or equivalent).
Strong understanding of target impedance methodology, decoupling network design, plane resonances, and anti-resonance mitigation.
Experience with DC IR-drop analysis, current density limits, and via/plane current-carrying capacity.
Working knowledge of VRM fundamentals: buck converter operation, multiphase design, transient response, and load-line/AVP concepts.
Working knowledge of multi-layer PCB stack-up design and power plane allocation strategies.
Strong candidates may also have experience with (Nice-to-have qualifications)
Prior work in data center, AI/ML accelerator, networking, or high-performance computing (HPC) hardware environments.
Experience with vertical power delivery, high-current lateral delivery tradeoffs, or 48V-to-point-of-load architectures.
Package-level PDN co-analysis and experience working with die/package power models from ASIC teams.
Experience scripting automated PI simulation flows using Python or MATLAB to reduce manual simulation turnaround time.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are looking for a Power Integrity (PI) Engineer to join our platform electrical engineering team. In this role, you will own the power integrity methodology for high-power PCB and system designs — from early architecture through final release — ensuring robust power delivery to high-performance ASICs and supporting components across all operating conditions.\n\n\n\nKey Responsibilities\n\n - Perform pre- and post-layout PDN analysis for high-current ASIC power rails: target impedance profiling, decoupling capacitor selection and placement optimization, and plane resonance analysis.\n\n - Execute DC IR-drop and current density simulations; define copper weight, plane shapes, via stitching, and layer allocation requirements for PCB designers.\n\n - Conduct AC impedance analysis from VRM output through package and die, including ESR/ESL modeling of the full decoupling network.\n\n - Develop and validate VRM models; analyze load transient response, AVP/load-line behavior, and multiphase converter performance against ASIC power specifications.\n\n - Perform power-plane thermal co-simulation and work with mechanical teams on thermal-electrical tradeoffs for high-current delivery.\n\n - Drive design rule checks for PI compliance; work with layout teams in Cadence Allegro / Sigrity PowerDC/PowerSI or Ansys SIwave.\n\n - Collaborate with power design, PCB layout, and ASIC/package teams to define power delivery architecture and review guidelines early in the product lifecycle.\n\n - Support bring-up, debug rail-level issues (droop, ripple, transient excursions), and document root-cause findings with clear corrective actions.\n\n - Develop and maintain simulation-to-hardware correlation databases to continuously improve PDN modeling accuracy.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - B.S. or M.S. in Electrical Engineering or a closely related discipline.\n\n - 5+ years of hands-on PI experience on high-current, high-performance designs (ASIC/CPU/GPU power delivery, server boards, or accelerator platforms).\n\n - Proficiency with industry PI EDA tools (Ansys SIwave, Cadence Sigrity PowerDC/PowerSI/OptimizePI, or equivalent).\n\n - Strong understanding of target impedance methodology, decoupling network design, plane resonances, and anti-resonance mitigation.\n\n - Experience with DC IR-drop analysis, current density limits, and via/plane current-carrying capacity.\n\n - Working knowledge of VRM fundamentals: buck converter operation, multiphase design, transient response, and load-line/AVP concepts.\n\n - Working knowledge of multi-layer PCB stack-up design and power plane allocation strategies.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Prior work in data center, AI/ML accelerator, networking, or high-performance computing (HPC) hardware environments.\n\n - Experience with vertical power delivery, high-current lateral delivery tradeoffs, or 48V-to-point-of-load architectures.\n\n - Package-level PDN co-analysis and experience working with die/package power models from ASIC teams.\n\n - Experience scripting automated PI simulation flows using Python or MATLAB to reduce manual simulation turnaround time.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"6bb1c827-e9f0-4384-8113-1bb8ad8efb47","title":"Senior Manufacturing Software Engineer","department":"Production","team":"Production","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-08-03T18:03:47.811+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/6bb1c827-e9f0-4384-8113-1bb8ad8efb47","applyUrl":"https://jobs.ashbyhq.com/etched/6bb1c827-e9f0-4384-8113-1bb8ad8efb47/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is seeking a Senior Manufacturing Software Engineer to build the software platform that powers manufacturing test across new product introduction and mass production for our frontier AI systems.
This is a software engineering role embedded within Manufacturing Test Engineering, working closely with hardware, firmware, software, quality, and factory operations. You'll build the backend services, APIs, data pipelines, release infrastructure, and test station software that enable scalable, automated manufacturing across our global factory network. Your work will help ensure every Etched system can be built, tested, and deployed with speed, quality, and traceability.
Key Responsibilities
Design and build backend services, APIs, and data pipelines that support manufacturing test and factory operations.
Own software for manufacturing release management, deployment, versioning, and traceability across production environments.
Develop scalable manufacturing data platforms for test results, yield analysis, genealogy, and production reporting.
Build reusable manufacturing test station applications, operator interfaces, and automation frameworks.
Integrate manufacturing software with MES, SFIS, and other factory systems used by contract manufacturers.
Partner with Manufacturing Test, Hardware, Firmware, Software, Quality, and NPI teams to support product development through production ramp.
Productionize prototype engineering tools into reliable, production-ready manufacturing software.
Travel to domestic and international manufacturing partners to support factory bring-up and production deployments.
You may be a good fit if you have (Must-have qualifications)
6+ years of experience building production software, backend services, or data platforms.
Strong Python development experience (or equivalent expertise in Go, Java, C#, or TypeScript with Python proficiency).
Strong software engineering fundamentals including testing, CI/CD, version control, code review, debugging, and production monitoring.
Experience designing scalable APIs, databases, data models, and distributed systems.
Experience integrating software with external systems and building reliable production services.
Experience developing internal applications, dashboards, or operator-facing software.
Comfortable owning technical architecture and building greenfield software platforms.
Bachelor's degree in Computer Science, Software Engineering, or equivalent practical experience.
Willingness to work onsite from our San Jose office and travel internationally to manufacturing partners as needed.
Strong candidates may also have experience with (Nice-to-have qualifications)
Manufacturing software, factory automation, MES, SFIS, or production operations.
Manufacturing test software, hardware validation, or automated test infrastructure.
Yield analysis, manufacturing analytics, traceability, or genealogy systems.
Firmware release tooling or embedded software development.
AI servers, accelerator systems, networking hardware, storage systems, or other high-performance compute platforms.
Supporting first-generation hardware products through manufacturing scale-up in a fast-paced startup environment.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\nEtched is seeking a Senior Manufacturing Software Engineer to build the software platform that powers manufacturing test across new product introduction and mass production for our frontier AI systems.\n\n\nThis is a software engineering role embedded within Manufacturing Test Engineering, working closely with hardware, firmware, software, quality, and factory operations. You'll build the backend services, APIs, data pipelines, release infrastructure, and test station software that enable scalable, automated manufacturing across our global factory network. Your work will help ensure every Etched system can be built, tested, and deployed with speed, quality, and traceability.\n\n\n\n\nKey Responsibilities\n\n - Design and build backend services, APIs, and data pipelines that support manufacturing test and factory operations.\n\n - Own software for manufacturing release management, deployment, versioning, and traceability across production environments.\n\n - Develop scalable manufacturing data platforms for test results, yield analysis, genealogy, and production reporting.\n\n - Build reusable manufacturing test station applications, operator interfaces, and automation frameworks.\n\n - Integrate manufacturing software with MES, SFIS, and other factory systems used by contract manufacturers.\n\n - Partner with Manufacturing Test, Hardware, Firmware, Software, Quality, and NPI teams to support product development through production ramp.\n\n - Productionize prototype engineering tools into reliable, production-ready manufacturing software.\n\n - Travel to domestic and international manufacturing partners to support factory bring-up and production deployments.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - 6+ years of experience building production software, backend services, or data platforms.\n\n - Strong Python development experience (or equivalent expertise in Go, Java, C#, or TypeScript with Python proficiency).\n\n - Strong software engineering fundamentals including testing, CI/CD, version control, code review, debugging, and production monitoring.\n\n - Experience designing scalable APIs, databases, data models, and distributed systems.\n\n - Experience integrating software with external systems and building reliable production services.\n\n - Experience developing internal applications, dashboards, or operator-facing software.\n\n - Comfortable owning technical architecture and building greenfield software platforms.\n\n - Bachelor's degree in Computer Science, Software Engineering, or equivalent practical experience.\n\n - Willingness to work onsite from our San Jose office and travel internationally to manufacturing partners as needed.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Manufacturing software, factory automation, MES, SFIS, or production operations.\n\n - Manufacturing test software, hardware validation, or automated test infrastructure.\n\n - Yield analysis, manufacturing analytics, traceability, or genealogy systems.\n\n - Firmware release tooling or embedded software development.\n\n - AI servers, accelerator systems, networking hardware, storage systems, or other high-performance compute platforms.\n\n - Supporting first-generation hardware products through manufacturing scale-up in a fast-paced startup environment.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"f02e8035-7dc9-4b0c-aab7-75bbb4e975b8","title":"Performance Tools Intern","department":"Architecture","team":"Architecture","employmentType":"Intern","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-08-03T17:44:43.499+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/f02e8035-7dc9-4b0c-aab7-75bbb4e975b8","applyUrl":"https://jobs.ashbyhq.com/etched/f02e8035-7dc9-4b0c-aab7-75bbb4e975b8/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Join our team and take the lead in illuminating the performance landscape of our cutting-edge ML accelerator. We are seeking a highly skilled engineer to design and develop a sophisticated performance analysis tool, tailored specifically for our hardware. You will be instrumental in creating the essential tooling that enables our ML engineers and customers to understand workload behavior, identify performance bottlenecks, and unlock the full potential of our hardware, accelerating the most demanding ML applications in the world. This is a unique opportunity to shape performance analysis for novel hardware from the ground up.
During your internship, you may:
Build components of our performance analysis and profiling infrastructure.
Collect and analyze performance data from our custom ML accelerators, including hardware counters, execution traces, and memory behavior.
Develop tooling to trace host-side runtime activity, system behavior, and accelerator execution.
Help correlate performance events across CPUs, accelerators, storage, networking, and distributed workloads.
Build analysis and visualization tools that help engineers identify performance bottlenecks and optimize models.
Work alongside hardware, compiler, firmware, and inference engineers to understand performance challenges and develop tools that improve developer productivity.
Representative projects
Implement the data collection framework for hardware performance counters on a custom PCIe-based accelerator.
Develop a user-space service for low-overhead tracing of accelerator activity.
Design and build a correlated timeline view visualizing CPU API calls, driver submissions, PCIe transfers, and accelerator execution units.
Create an analysis pass to detect and quantify memory access inefficiencies or PCIe bandwidth saturation while transacting on a PCIe-attached accelerator.
You may be a good fit if you have
Strong programming skills in C++ or Rust. Experience with Python is a plus.
Solid understanding of computer architecture, including CPUs, GPUs or AI accelerators, memory hierarchies, and parallel programming.
Experience or strong interest in low-level performance analysis, profiling, and performance optimization.
Familiarity with performance analysis tools such as Nsight, VTune, Xprof, Perfetto, or similar tools is a plus.
Experience or strong interest in operating systems, compilers, firmware, drivers, or other low-level systems software.
Passion for understanding how complex systems behave under real workloads and building tools that help other engineers optimize performance.
Strong problem-solving skills and curiosity to learn quickly in a fast-paced engineering environment.
Strong candidates may also have experience with (Nice-to-have qualifications)
Direct experience developing performance analysis or debugging tools.
Experience with ML accelerator architectures (GPUs, TPUs, etc.).
Experience with kernel-mode driver development (Linux or Windows).
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nJoin our team and take the lead in illuminating the performance landscape of our cutting-edge ML accelerator. We are seeking a highly skilled engineer to design and develop a sophisticated performance analysis tool, tailored specifically for our hardware. You will be instrumental in creating the essential tooling that enables our ML engineers and customers to understand workload behavior, identify performance bottlenecks, and unlock the full potential of our hardware, accelerating the most demanding ML applications in the world. This is a unique opportunity to shape performance analysis for novel hardware from the ground up.\n\n\n\nDuring your internship, you may:\n\n - Build components of our performance analysis and profiling infrastructure.\n\n - Collect and analyze performance data from our custom ML accelerators, including hardware counters, execution traces, and memory behavior.\n\n - Develop tooling to trace host-side runtime activity, system behavior, and accelerator execution.\n\n - Help correlate performance events across CPUs, accelerators, storage, networking, and distributed workloads.\n\n - Build analysis and visualization tools that help engineers identify performance bottlenecks and optimize models.\n\n - Work alongside hardware, compiler, firmware, and inference engineers to understand performance challenges and develop tools that improve developer productivity.\n \n \n\nRepresentative projects\n\n - Implement the data collection framework for hardware performance counters on a custom PCIe-based accelerator.\n\n - Develop a user-space service for low-overhead tracing of accelerator activity.\n\n - Design and build a correlated timeline view visualizing CPU API calls, driver submissions, PCIe transfers, and accelerator execution units.\n\n - Create an analysis pass to detect and quantify memory access inefficiencies or PCIe bandwidth saturation while transacting on a PCIe-attached accelerator.\n \n\nYou may be a good fit if you have\n\n - Strong programming skills in C++ or Rust. Experience with Python is a plus.\n\n - Solid understanding of computer architecture, including CPUs, GPUs or AI accelerators, memory hierarchies, and parallel programming.\n\n - Experience or strong interest in low-level performance analysis, profiling, and performance optimization.\n\n - Familiarity with performance analysis tools such as Nsight, VTune, Xprof, Perfetto, or similar tools is a plus.\n\n - Experience or strong interest in operating systems, compilers, firmware, drivers, or other low-level systems software.\n\n - Passion for understanding how complex systems behave under real workloads and building tools that help other engineers optimize performance.\n\n - Strong problem-solving skills and curiosity to learn quickly in a fast-paced engineering environment.\n \n \n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Direct experience developing performance analysis or debugging tools.\n\n - Experience with ML accelerator architectures (GPUs, TPUs, etc.).\n\n - Experience with kernel-mode driver development (Linux or Windows).\n \n \n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"42c1179a-e709-4f2f-b793-9f6818639a95","title":"CNC Machinist","department":"Operations","team":"Operations","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-08-14T20:55:02.200+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/42c1179a-e709-4f2f-b793-9f6818639a95","applyUrl":"https://jobs.ashbyhq.com/etched/42c1179a-e709-4f2f-b793-9f6818639a95/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Hardware as ambitious as we are building is won or lost in iteration speed. To meet that requirement, we are standing up an in-house quick-turn prototyping shop at our 80,000 square foot Milpitas facility: CNC machining, a full sheet metal cell (waterjet + CNC press brake), and system assembly. As one of the first machinist/fabricators on the floor, you will take parts from CAD to finished metal the same week — sometimes the same day — and help shape how the shop itself runs.
Key Responsibilities
Program CAM (Fusion 360 / Mastercam) from engineering CAD models and own jobs end-to-end: setup, first article, and production of prototype parts
Design and build fixtures, soft jaws, and workholding to make repeat jobs fast
Set up and operate 3-axis CNC vertical mills, manual mill and lathe, and supporting shop equipment
Operate the sheet metal cell: waterjet cutting and CNC press brake forming, including nesting and bend programming
TIG weld brackets, enclosures, and fixtures as needed
Fabricate parts end-to-end: hardware insertion (PEM), deburring and surface finishing, and final fit-up of formed and welded assemblies
Manage the tool crib: track cutter and consumable inventory, buy tooling, and own vendor relationships for cutters, stock, and shop supplies
Inspect your own work using surface plate, height gauge, micrometers, and calipers to drawing GD&T
Support assembly and integration of prototype systems and racks when the schedule calls for it
Be flexible and help out around the shop: machine maintenance, material handling, rigging support, and keeping the floor safe and organized
Give design-for-manufacturability feedback directly to the engineers who sit a few steps away
You may be a good fit if you have (Must-have qualifications)
Trade school, apprenticeship, or journeyman machinist certification
Experience with Fusion 360 or Mastercam and Haas controls
Sheet metal fabrication experience: CNC press brake setup/operation, waterjet or laser cutting
TIG and/or MIG welding proficiency on aluminum and steel
Background in prototype, R&D, or quick-turn job shop environments where every job is different
Experience owning tool crib inventory and tooling purchases
Basic CAD ability (Fusion 360, SolidWorks, or similar) for fixture design
Experience machining thermal/cooling components (coldplates, manifolds) or server/rack hardware
Comfort in a fast-moving startup environment with shifting priorities
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience owning tool crib inventory and tooling purchases
Basic CAD ability (Fusion 360, SolidWorks, or similar) for fixture design
Experience machining thermal/cooling components (coldplates, manifolds) or server/rack hardware
Comfort in a fast-moving startup environment with shifting priorities
Additional Requirements:
This position is based on-site in San Jose, CA and Milpitas, CA
Willingness to work extended hours and occasional weekends to support program-critical builds
Ability to lift up to 50 lbs. with assistance and stand for extended periods on a shop floor
Ability to obtain forklift certification
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\n\nJob Summary\n\nHardware as ambitious as we are building is won or lost in iteration speed. To meet that requirement, we are standing up an in-house quick-turn prototyping shop at our 80,000 square foot Milpitas facility: CNC machining, a full sheet metal cell (waterjet + CNC press brake), and system assembly. As one of the first machinist/fabricators on the floor, you will take parts from CAD to finished metal the same week — sometimes the same day — and help shape how the shop itself runs.\n\n\n\n\n\nKey Responsibilities\n\n - Program CAM (Fusion 360 / Mastercam) from engineering CAD models and own jobs end-to-end: setup, first article, and production of prototype parts\n\n - Design and build fixtures, soft jaws, and workholding to make repeat jobs fast\n\n - Set up and operate 3-axis CNC vertical mills, manual mill and lathe, and supporting shop equipment\n\n - Operate the sheet metal cell: waterjet cutting and CNC press brake forming, including nesting and bend programming\n\n - TIG weld brackets, enclosures, and fixtures as needed\n\n - Fabricate parts end-to-end: hardware insertion (PEM), deburring and surface finishing, and final fit-up of formed and welded assemblies\n\n - Manage the tool crib: track cutter and consumable inventory, buy tooling, and own vendor relationships for cutters, stock, and shop supplies\n\n - Inspect your own work using surface plate, height gauge, micrometers, and calipers to drawing GD&T\n\n - Support assembly and integration of prototype systems and racks when the schedule calls for it\n\n - Be flexible and help out around the shop: machine maintenance, material handling, rigging support, and keeping the floor safe and organized\n\n - Give design-for-manufacturability feedback directly to the engineers who sit a few steps away\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - Trade school, apprenticeship, or journeyman machinist certification\n\n - Experience with Fusion 360 or Mastercam and Haas controls\n\n - Sheet metal fabrication experience: CNC press brake setup/operation, waterjet or laser cutting\n\n - TIG and/or MIG welding proficiency on aluminum and steel\n\n - Background in prototype, R&D, or quick-turn job shop environments where every job is different\n\n - Experience owning tool crib inventory and tooling purchases\n\n - Basic CAD ability (Fusion 360, SolidWorks, or similar) for fixture design\n\n - Experience machining thermal/cooling components (coldplates, manifolds) or server/rack hardware\n\n - Comfort in a fast-moving startup environment with shifting priorities\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Experience owning tool crib inventory and tooling purchases\n\n - Basic CAD ability (Fusion 360, SolidWorks, or similar) for fixture design\n\n - Experience machining thermal/cooling components (coldplates, manifolds) or server/rack hardware\n\n - Comfort in a fast-moving startup environment with shifting priorities\n\n\n\nAdditional Requirements:\n\n - This position is based on-site in San Jose, CA and Milpitas, CA\n\n - Willingness to work extended hours and occasional weekends to support program-critical builds\n\n - Ability to lift up to 50 lbs. with assistance and stand for extended periods on a shop floor\n\n - Ability to obtain forklift certification\n \n \n \n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"7349bab7-ab3a-4943-8e78-645148304b0e","title":"Lab Technician (Contractor)","department":"Operations","team":"Operations","employmentType":"Contract","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-08-06T01:05:44.995+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/7349bab7-ab3a-4943-8e78-645148304b0e","applyUrl":"https://jobs.ashbyhq.com/etched/7349bab7-ab3a-4943-8e78-645148304b0e/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We're looking for a hands-on Lab Technician to support our hardware development and validation efforts. As a Lab Technician, you'll build, integrate, and debug prototype servers and racks — assembling boards into chassis, routing power and signal cabling, and getting systems to mechanical bring-up so engineers can start testing. In this role, you'll also own the execution of test procedures, maintain rigorous documentation standards, and keep our lab environments running smoothly across multiple concurrent projects. You'll work closely with lab operations team and hardware engineers to ensure data integrity and help us move fast without cutting corners.
Key Responsibilities
Prepare mechanical set-ups, test benches, fixtures, and lab environments to support platform validation, inference kernal development, firmware engineering and more across multiple concurrent projects
Collect, record, and validate system health data, maintaining accurate and traceable documentation for analysis and quality assurance
Monitor equipment performance, identifying anomalies and troubleshooting issues to maintain system integrity and minimize downtime
Organize and maintain lab logs, test databases, and results reports, communicating findings clearly to hardware engineers and project teams
Enforce lab safety procedures and compliance standards while managing equipment maintenance, inventory, and calibration schedules
Must-Have Qualifications
Experience preparing test benches and hardware fixtures across multiple concurrent projects
Strong data collection and documentation habits — accurate, traceable records are second nature to you
Comfort organizing and maintaining lab logs, databases, and test reports for a cross-functional engineering audience
Nice-to-Have Qualifications
Familiarity with lab safety compliance and managing equipment maintenance, inventory, and calibration schedules
Benefits
• Daily lunch and dinner in our office
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As AI models become larger, more capable, and more widely deployed, the economics of compute increasingly determine what products can be built, how they are priced, and how quickly they can scale. We are looking for a Product Finance Lead to own the financial strategy behind our products from silicon economics through customer monetization. This role will connect product cost, manufacturing, supply, pricing, and margin into a single view of the business, helping Etched make the highest-leverage decisions across our product roadmap.
This is a high-ownership role for someone who genuinely loves to model and is energized by hard, ambiguous questions. You will work across Product, Engineering, Production, Supply Chain, GTM, and Finance to understand the economics of what we build, what it costs to produce, how we bring it to market, and where we should invest next. You will be expected to form a point of view, defend it with rigorous analysis, and drive decisions. A deep interest in AI infrastructure and an understanding of semiconductor and hardware economics will make you especially effective here.
Key Responsibilities
Own product economics end to end. Build and maintain the financial models connecting semiconductor and system costs, manufacturing yields, supply commitments, customer demand, pricing, and gross margin.
Drive pricing and monetization strategy. Partner with Product and go-to-market teams to evaluate pricing, packaging, customer economics, and commercial structures across Etched's product portfolio.
Own the financial lens on the product roadmap. Build business cases for new products and major roadmap investments, including opportunity sizing, cost structure, expected margins, capital requirements, and returns.
Partner deeply with manufacturing and supply chain. Model wafer, packaging, component, inventory, supply, and purchase commitments across quarterly and multi-year forecasts, helping determine manufacturing volumes and timing.
Understand the drivers of product cost. Develop performance measures for major cost drivers, including yields, manufacturing volumes, supplier economics, new product ramps, and supply agreements, and identify opportunities to improve product margins.
Translate AI infrastructure economics into financial decisions. Develop a detailed understanding of how performance, power, system architecture, and total cost of ownership translate into customer value and Etched's pricing and margin opportunities.
Shape investment decisions. Evaluate competing product, manufacturing, and commercial investments and make clear recommendations about where Etched should deploy capital and resources.
Own inventory and supply economics. Analyze inventory levels, purchase commitments, supply availability, and demand scenarios to help Etched balance growth, customer commitments, and working capital.
Build the financial operating system for the product. Establish dashboards, forecasting processes, and metrics that give leadership a clear view of product costs, supply, pricing, margins, inventory, and performance.
Make our processes scale. Automate and redesign financial models, systems, and workflows as Etched moves from product development into increasingly complex manufacturing and commercial operations.
Drive executive decision-making. Turn complex product, manufacturing, and financial data into concise, opinionated recommendations for leadership.
Partner with Finance counterparts on forecasting, planning, monthly and quarterly close processes, and company-wide financial strategy.
You may be a good fit if you have
Significant experience in finance, strategy, or another analytically rigorous role, with demonstrated ownership of complex financial or operational decisions.
Exceptional financial modeling skills. You can build sophisticated operating models from the ground up and genuinely enjoy doing it.
Experience with product cost, manufacturing, inventory, supply planning, or hardware unit economics.
Ability to take an ambiguous question, structure the analysis, develop a point of view, and independently drive it through to a decision.
Strong analytical skills and comfort working with large, messy datasets to identify the few insights that actually matter.
The judgment and conviction to make recommendations with imperfect information, paired with the willingness to update your view as new information emerges.
Strong cross-functional instincts and the ability to work effectively with technical, operational, commercial, and finance teams.
Excellent communication skills, particularly the ability to translate complicated financial and technical concepts into clear recommendations for executives and non-finance audiences.
Advanced Excel or Google Sheets proficiency.
Strong candidates may also have experience with
Experience in semiconductors, AI infrastructure, data center hardware, or another technically complex hardware business.
Deep familiarity with semiconductor manufacturing economics, including wafers, yields, packaging, components, inventory, purchase commitments, and product ramps.
Experience owning pricing, monetization, or product finance for a hardware or infrastructure product.
Experience evaluating customer total cost of ownership and translating technical performance advantages into pricing and commercial strategy.
Experience building or improving financial systems, dashboards, and automated reporting processes.
Familiarity with ERP, BI, data visualization, or financial planning tools.
Experience partnering directly with manufacturing, supply chain, engineering, or product organizations.
A deep interest in AI infrastructure and a perspective on where AI compute economics are heading.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n \n\nJob Summary\n\nAs AI models become larger, more capable, and more widely deployed, the economics of compute increasingly determine what products can be built, how they are priced, and how quickly they can scale. We are looking for a Product Finance Lead to own the financial strategy behind our products from silicon economics through customer monetization. This role will connect product cost, manufacturing, supply, pricing, and margin into a single view of the business, helping Etched make the highest-leverage decisions across our product roadmap.\n\n \n\nThis is a high-ownership role for someone who genuinely loves to model and is energized by hard, ambiguous questions. You will work across Product, Engineering, Production, Supply Chain, GTM, and Finance to understand the economics of what we build, what it costs to produce, how we bring it to market, and where we should invest next. You will be expected to form a point of view, defend it with rigorous analysis, and drive decisions. A deep interest in AI infrastructure and an understanding of semiconductor and hardware economics will make you especially effective here.\n\n \n\nKey Responsibilities\n\n - Own product economics end to end. Build and maintain the financial models connecting semiconductor and system costs, manufacturing yields, supply commitments, customer demand, pricing, and gross margin.\n\n - Drive pricing and monetization strategy. Partner with Product and go-to-market teams to evaluate pricing, packaging, customer economics, and commercial structures across Etched's product portfolio.\n\n - Own the financial lens on the product roadmap. Build business cases for new products and major roadmap investments, including opportunity sizing, cost structure, expected margins, capital requirements, and returns.\n\n - Partner deeply with manufacturing and supply chain. Model wafer, packaging, component, inventory, supply, and purchase commitments across quarterly and multi-year forecasts, helping determine manufacturing volumes and timing.\n\n - Understand the drivers of product cost. Develop performance measures for major cost drivers, including yields, manufacturing volumes, supplier economics, new product ramps, and supply agreements, and identify opportunities to improve product margins.\n\n - Translate AI infrastructure economics into financial decisions. Develop a detailed understanding of how performance, power, system architecture, and total cost of ownership translate into customer value and Etched's pricing and margin opportunities.\n\n - Shape investment decisions. Evaluate competing product, manufacturing, and commercial investments and make clear recommendations about where Etched should deploy capital and resources.\n\n - Own inventory and supply economics. Analyze inventory levels, purchase commitments, supply availability, and demand scenarios to help Etched balance growth, customer commitments, and working capital.\n\n - Build the financial operating system for the product. Establish dashboards, forecasting processes, and metrics that give leadership a clear view of product costs, supply, pricing, margins, inventory, and performance.\n\n - Make our processes scale. Automate and redesign financial models, systems, and workflows as Etched moves from product development into increasingly complex manufacturing and commercial operations.\n\n - Drive executive decision-making. Turn complex product, manufacturing, and financial data into concise, opinionated recommendations for leadership.\n\n - Partner with Finance counterparts on forecasting, planning, monthly and quarterly close processes, and company-wide financial strategy.\n\n \n\nYou may be a good fit if you have\n\n - Significant experience in finance, strategy, or another analytically rigorous role, with demonstrated ownership of complex financial or operational decisions.\n\n - Exceptional financial modeling skills. You can build sophisticated operating models from the ground up and genuinely enjoy doing it.\n\n - Experience with product cost, manufacturing, inventory, supply planning, or hardware unit economics.\n\n - Ability to take an ambiguous question, structure the analysis, develop a point of view, and independently drive it through to a decision.\n\n - Strong analytical skills and comfort working with large, messy datasets to identify the few insights that actually matter.\n\n - The judgment and conviction to make recommendations with imperfect information, paired with the willingness to update your view as new information emerges.\n\n - Strong cross-functional instincts and the ability to work effectively with technical, operational, commercial, and finance teams.\n\n - Excellent communication skills, particularly the ability to translate complicated financial and technical concepts into clear recommendations for executives and non-finance audiences.\n\n - Advanced Excel or Google Sheets proficiency.\n\n \n\nStrong candidates may also have experience with\n\n - Experience in semiconductors, AI infrastructure, data center hardware, or another technically complex hardware business.\n\n - Deep familiarity with semiconductor manufacturing economics, including wafers, yields, packaging, components, inventory, purchase commitments, and product ramps.\n\n - Experience owning pricing, monetization, or product finance for a hardware or infrastructure product.\n\n - Experience evaluating customer total cost of ownership and translating technical performance advantages into pricing and commercial strategy.\n\n - Experience building or improving financial systems, dashboards, and automated reporting processes.\n\n - Familiarity with ERP, BI, data visualization, or financial planning tools.\n\n - Experience partnering directly with manufacturing, supply chain, engineering, or product organizations.\n\n - A deep interest in AI infrastructure and a perspective on where AI compute economics are heading.\n\n \n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n \n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"35838e18-0e32-4a8c-8df3-1cbb8ae2f89c","title":"New Media, Special Projects","department":"GTM","team":"GTM","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-08-18T21:23:20.085+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/35838e18-0e32-4a8c-8df3-1cbb8ae2f89c","applyUrl":"https://jobs.ashbyhq.com/etched/35838e18-0e32-4a8c-8df3-1cbb8ae2f89c/application","descriptionHtml":"Job Summary
We’re building a small team of multi-disciplinary creatives with the ambition to create the most consequential brand of the 21st century.
Our mission is to run the world’s inference. Your work will define how the wider world understands who we are, what we’re building, and why it matters – all during the most important inflection in the company’s history.
If you’re a fan of our work and think we can do better, reach out and tell us what you’d change. We want to talk.
You may be a good fit if
You’ve created at least one “banger” across mediums (e.g. video, brand design, tweet, manifesto)
Your brain can’t stop generating ideas
You have a maniacal attention to detail
You’re curious
You’re looking for your magnum opus
You have extreme agency
Key Responsibilities
Create a brand that becomes synonymous with AI and its promise
Translate the founders’ vision into multi-media creative artifacts
Strong candidates may also have
A large X following
A defined viewpoint on the future of AI
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
","descriptionPlain":"Job Summary\n\nWe’re building a small team of multi-disciplinary creatives with the ambition to create the most consequential brand of the 21st century.\n\nOur mission is to run the world’s inference. Your work will define how the wider world understands who we are, what we’re building, and why it matters – all during the most important inflection in the company’s history.\n\n\n\nIf you’re a fan of our work and think we can do better, reach out and tell us what you’d change. We want to talk.\n\n\n\nYou may be a good fit if\n\n - You’ve created at least one “banger” across mediums (e.g. video, brand design, tweet, manifesto)\n\n - Your brain can’t stop generating ideas\n\n - You have a maniacal attention to detail\n\n - You’re curious\n\n - You’re looking for your magnum opus\n\n - You have extreme agency\n \n \n\nKey Responsibilities\n\n - Create a brand that becomes synonymous with AI and its promise\n\n - Translate the founders’ vision into multi-media creative artifacts\n\n\n\nStrong candidates may also have\n\n - A large X following\n\n - A defined viewpoint on the future of AI\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n\n\nAbout Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history."},{"id":"7d07db47-7e6f-4685-a817-2f3d0dd5faad","title":"Inventory Warehouse Coordinator","department":"Operations","team":"Operations","employmentType":"Contract","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-08-25T02:41:08.325+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/7d07db47-7e6f-4685-a817-2f3d0dd5faad","applyUrl":"https://jobs.ashbyhq.com/etched/7d07db47-7e6f-4685-a817-2f3d0dd5faad/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are hiring an Inventory Warehouse Coordinator to support inventory operations across Etched facilities and in-house engineering labs. This role is critical to ensuring engineers have the right parts, tools, and systems available when needed to keep development and builds on schedule.
This is a highly hands-on role centered on receiving, inventory control, material organization, and internal fulfillment. You will pick up incoming packages from the loading dock, inspect and receive materials into our internal systems, check items into inventory, maintain accurate inventory records, and fulfill requests from engineering teams. You will manage incoming and outgoing shipments, inventory organization and warehouse processes while maintaining high accuracy and safety standards.
It is ideal for someone who enjoys hands-on work, has strong attention to detail, and takes pride in maintaining accurate and organized inventory in a fast-paced hardware environment. This role runs on a swing shift (3pm–12am, Monday through Friday) and requires reliable transportation between Etched locations in San Jose (Santana Row) and Milpitas.
Key Responsibilities
Receiving & Material Handling
Pick up incoming packages and deliveries from the loading dock and transport them to the receiving area
Receive, inspect, and log incoming components, assemblies, tools, equipment, and supplies
Record detailed item information in internal systems and check materials into the inventory tracking system
Verify quantities, part information, and documentation against purchase orders and packing lists
Coordinate with Supply Chain, Logistic and Engineering teams on discrepancies or missing information
Label and route materials to the lab, storage locations, or build areas
Package items and prepare packages for outbound shipment
Operate 8000 lbs forklift (training will be provided)
Inventory & Organization
Maintain accurate inventory records in internal systems and spreadsheets
Maintain real-time visibility into material status via ERP (NetSuite) and inventory tracking tools
Organize and manage storage areas to ensure efficient retrieval and clear part identification
Conduct cycle counts and support inventory reconciliation efforts
Warehouse Operations Management
Maintain clean, safe, and organized lab and warehouse spaces
Operate basic material-handling equipment, such as pallet jacks, carts and a forklift
Ensure compliance with safety and handling requirements for sensitive components, including ESD, fragile, and high-value parts
Identify opportunities to improve labeling, storage systems, and material flow efficiency
Transport and coordinated packages and material movement between Etched facilities
Internal Lab Support
Serve as a point of contact for engineers requesting parts, tools, equipment, and supplies
Pick, stage, and distribute inventory for engineering builds, testing activities, and daily operational needs
Enable engineering production through efficient material movement
You may be a good fit if you have
2–5 years of experience in warehouse operations, shipping/receiving, or inventory control
Familiarity with ERP or inventory tracking systems, such as NetSuite or SAP
High attention to detail and ability to follow standard operating procedures precisely
Strong communication skills and ability to coordinate closely with Engineering and Operations teams
Comfort working in a hands-on, physical environment, including lifting and moving materials up to approximately 50 lbs
Basic proficiency with spreadsheets and inventory tracking systems
Prior lab or warehouse experience in a semiconductor or hardware environment
Familiarity with startup operations or fast-paced R&D cycles
Experience supporting inventory audits or compliance processes
Compensation
This is a 1099 contract position, expected to be 40 - 50 hours per week. Compensation is hourly and competitive, based on experience and qualifications.
As a contractor, this role is not eligible for full-time benefits (e.g., medical, dental, vision insurance), but you will have:
Access to daily lunch and dinner at our San Jose office and provided daily meal stipend
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are hiring an Inventory Warehouse Coordinator to support inventory operations across Etched facilities and in-house engineering labs. This role is critical to ensuring engineers have the right parts, tools, and systems available when needed to keep development and builds on schedule.\n\n\n\nThis is a highly hands-on role centered on receiving, inventory control, material organization, and internal fulfillment. You will pick up incoming packages from the loading dock, inspect and receive materials into our internal systems, check items into inventory, maintain accurate inventory records, and fulfill requests from engineering teams. You will manage incoming and outgoing shipments, inventory organization and warehouse processes while maintaining high accuracy and safety standards.\n\n\n\nIt is ideal for someone who enjoys hands-on work, has strong attention to detail, and takes pride in maintaining accurate and organized inventory in a fast-paced hardware environment. This role runs on a swing shift (3pm–12am, Monday through Friday) and requires reliable transportation between Etched locations in San Jose (Santana Row) and Milpitas.\n\n\n\nKey Responsibilities\n\nReceiving & Material Handling\n\n - Pick up incoming packages and deliveries from the loading dock and transport them to the receiving area\n\n - Receive, inspect, and log incoming components, assemblies, tools, equipment, and supplies\n\n - Record detailed item information in internal systems and check materials into the inventory tracking system\n\n - Verify quantities, part information, and documentation against purchase orders and packing lists\n\n - Coordinate with Supply Chain, Logistic and Engineering teams on discrepancies or missing information\n\n - Label and route materials to the lab, storage locations, or build areas\n\n - Package items and prepare packages for outbound shipment\n\n - Operate 8000 lbs forklift (training will be provided)\n\nInventory & Organization\n\n - Maintain accurate inventory records in internal systems and spreadsheets\n\n - Maintain real-time visibility into material status via ERP (NetSuite) and inventory tracking tools\n\n - Organize and manage storage areas to ensure efficient retrieval and clear part identification\n\n - Conduct cycle counts and support inventory reconciliation efforts\n\nWarehouse Operations Management\n\n - Maintain clean, safe, and organized lab and warehouse spaces\n\n - Operate basic material-handling equipment, such as pallet jacks, carts and a forklift\n\n - Ensure compliance with safety and handling requirements for sensitive components, including ESD, fragile, and high-value parts\n\n - Identify opportunities to improve labeling, storage systems, and material flow efficiency\n\n - Transport and coordinated packages and material movement between Etched facilities\n\nInternal Lab Support\n\n - Serve as a point of contact for engineers requesting parts, tools, equipment, and supplies\n\n - Pick, stage, and distribute inventory for engineering builds, testing activities, and daily operational needs\n\n - Enable engineering production through efficient material movement\n\n\n\nYou may be a good fit if you have\n\n - 2–5 years of experience in warehouse operations, shipping/receiving, or inventory control\n\n - Familiarity with ERP or inventory tracking systems, such as NetSuite or SAP\n\n - High attention to detail and ability to follow standard operating procedures precisely\n\n - Strong communication skills and ability to coordinate closely with Engineering and Operations teams\n\n - Comfort working in a hands-on, physical environment, including lifting and moving materials up to approximately 50 lbs\n\n - Basic proficiency with spreadsheets and inventory tracking systems\n\n - Prior lab or warehouse experience in a semiconductor or hardware environment\n\n - Familiarity with startup operations or fast-paced R&D cycles\n\n - Experience supporting inventory audits or compliance processes\n\n\n\nCompensation\n\n - This is a 1099 contract position, expected to be 40 - 50 hours per week. Compensation is hourly and competitive, based on experience and qualifications.\n\n - As a contractor, this role is not eligible for full-time benefits (e.g., medical, dental, vision insurance), but you will have:\n\n - Access to daily lunch and dinner at our San Jose office and provided daily meal stipend\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n"},{"id":"4696006a-a43b-450b-95e1-6d9b55ed2665","title":"Thermal Engineer, Rack Level","department":"Platform","team":"Platform","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-20T00:30:58.642+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/4696006a-a43b-450b-95e1-6d9b55ed2665","applyUrl":"https://jobs.ashbyhq.com/etched/4696006a-a43b-450b-95e1-6d9b55ed2665/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a Thermal Engineer, Rack Level to own the thermal design and validation of Etched’s L11 rack system: the liquid-cooled racks that carry our inference hardware into customer datacenters. You will take the rack from design through deployment. That means defining how it is filled, commissioned, and brought online, validating the reference CDU systems it runs on, and serving as the technical voice on facility integration for our go-to-market team and customers.
This role fits someone who has commissioned liquid cooling systems in a real datacenter and knows what goes wrong between the spec sheet and the white space. You will work closely with our tray- and module-level thermal engineers, with the mechanical, electrical, and systems teams, and with CDU and liquid-loop suppliers.
Key Responsibilities
Own thermal design and validation of the L11 rack system, including the rack-level liquid loop, manifolds, quick disconnects, and interfaces to facility cooling..
Develop and document deployment, fill, and commissioning processes for liquid-cooled racks, from first fill and leak checks through bring-up at customer sites.
Validate reference CDU systems. This includes writing and executing test plans in the lab and in the field, and qualifying CDU partners on thermal performance, reliability, and controls.
Characterize rack-level thermal and hydraulic performance (flow distribution, pressure drop, supply and return temperatures) and use the results to drive design decisions.
Define and validate cooling-loop control strategies and how they interact with datacenter facility control systems.
Support GTM and customers as the technical point of contact on facility integration questions, such as facility water requirements, CDU selection and sizing, secondary loop design, and water quality.
Partner with tray and module (L6–L10) thermal engineers so that server-level designs meet rack-level and facility constraints.
Create and maintain rack thermal specifications, commissioning procedures, validation reports, and customer-facing facility requirements documents.
Investigate and resolve thermal and fluid-related issues in the lab and in deployed systems.
You may be a good fit if you have
5–10 years of experience in thermal or mechanical engineering with direct, hands-on CDU and datacenter liquid cooling experience.
Experience installing, commissioning, or validating liquid cooling systems at datacenter scale.
Experience with CDU validation and commissioning, including flow, pressure, temperature, and controls testing.
Strong working knowledge of datacenter cooling loops (facility water and technology cooling system / secondary loops) and the control systems that run them.
Comfort working directly with customers, facility teams, and suppliers to resolve integration issues.
A Bachelor’s degree in Mechanical Engineering, Thermal Engineering, or a related field.
Nice to have
Experience deploying rack-scale direct-to-chip liquid cooling for AI or HPC systems at a hyperscaler, server OEM, or CDU vendor.
Familiarity with industry guidelines for datacenter liquid cooling, such as OCP and ASHRAE TC 9.9.
Experience with 1D flow network or system-level thermal/hydraulic modeling tools (e.g., Flownex, MacroFlow).
Knowledge of coolant chemistry, filtration, leak detection, and fluid integrity testing.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
Compensation Range: $200,000 - $350,000 with significant equity.
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\nWe are seeking a Thermal Engineer, Rack Level to own the thermal design and validation of Etched’s L11 rack system: the liquid-cooled racks that carry our inference hardware into customer datacenters. You will take the rack from design through deployment. That means defining how it is filled, commissioned, and brought online, validating the reference CDU systems it runs on, and serving as the technical voice on facility integration for our go-to-market team and customers.\n\nThis role fits someone who has commissioned liquid cooling systems in a real datacenter and knows what goes wrong between the spec sheet and the white space. You will work closely with our tray- and module-level thermal engineers, with the mechanical, electrical, and systems teams, and with CDU and liquid-loop suppliers.\n\n\n\nKey Responsibilities\n\n - Own thermal design and validation of the L11 rack system, including the rack-level liquid loop, manifolds, quick disconnects, and interfaces to facility cooling..\n\n - Develop and document deployment, fill, and commissioning processes for liquid-cooled racks, from first fill and leak checks through bring-up at customer sites.\n\n - Validate reference CDU systems. This includes writing and executing test plans in the lab and in the field, and qualifying CDU partners on thermal performance, reliability, and controls.\n\n - Characterize rack-level thermal and hydraulic performance (flow distribution, pressure drop, supply and return temperatures) and use the results to drive design decisions.\n\n - Define and validate cooling-loop control strategies and how they interact with datacenter facility control systems.\n\n - Support GTM and customers as the technical point of contact on facility integration questions, such as facility water requirements, CDU selection and sizing, secondary loop design, and water quality.\n\n - Partner with tray and module (L6–L10) thermal engineers so that server-level designs meet rack-level and facility constraints.\n\n - Create and maintain rack thermal specifications, commissioning procedures, validation reports, and customer-facing facility requirements documents.\n\n - Investigate and resolve thermal and fluid-related issues in the lab and in deployed systems.\n\n\n\nYou may be a good fit if you have\n\n - 5–10 years of experience in thermal or mechanical engineering with direct, hands-on CDU and datacenter liquid cooling experience.\n\n - Experience installing, commissioning, or validating liquid cooling systems at datacenter scale.\n\n - Experience with CDU validation and commissioning, including flow, pressure, temperature, and controls testing.\n\n - Strong working knowledge of datacenter cooling loops (facility water and technology cooling system / secondary loops) and the control systems that run them.\n\n - Comfort working directly with customers, facility teams, and suppliers to resolve integration issues.\n\n - A Bachelor’s degree in Mechanical Engineering, Thermal Engineering, or a related field.\n\n\n\nNice to have\n\n - Experience deploying rack-scale direct-to-chip liquid cooling for AI or HPC systems at a hyperscaler, server OEM, or CDU vendor.\n\n - Familiarity with industry guidelines for datacenter liquid cooling, such as OCP and ASHRAE TC 9.9.\n\n - Experience with 1D flow network or system-level thermal/hydraulic modeling tools (e.g., Flownex, MacroFlow).\n\n - Knowledge of coolant chemistry, filtration, leak detection, and fluid integrity testing.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nCompensation Range: $200,000 - $350,000 with significant equity.\n\n\n\nHow we’re different\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"4e770111-c9c1-457d-8530-c3dd28971b3a","title":"Substrate IC Package Layout Design Engineer","department":"Architecture","team":"Architecture","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-08-27T16:50:57.000+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/4e770111-c9c1-457d-8530-c3dd28971b3a","applyUrl":"https://jobs.ashbyhq.com/etched/4e770111-c9c1-457d-8530-c3dd28971b3a/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed signaling. The ideal candidate will have extensive experience with large substrate designs (>50mm), complex power delivery networks, and high-speed signaling solutions (up to and beyond 50GHz). You will work closely with silicon, signal integrity, power integrity, and system help co-design world class substates with OSAT providers. Intense focus on optimization for power delivery through substrate, pushing what’s possible.
Key Responsibilities
IC Substrate Layout Design
Lead the design and development of complex IC substrate layouts for high-power AI processors and accelerators.
Design large (>50mm) and complex multi-layer substrate packages with high pin counts and dense routing requirements.
Ensure robust power delivery designs capable of supporting >700W custom silicon solutions.
High-Speed Signal Routing & Integrity
Develop high-speed signal routing solutions capable of supporting >50GHz signaling while minimizing signal integrity issues such as loss and crosstalk.
Collaborate with SI/PI engineers to define signal integrity and power integrity requirements and implement solutions in substrate layout.
Advanced Packaging & CoWoS Integration
Optimize CoWoS (Chip-on-Wafer-on-Substrate) interposer designs for thermal and electrical performance.
Work closely with chip design, packaging, and manufacturing teams to ensure design feasibility and manufacturability.
Design Validation & Verification
Perform DRC (Design Rule Check) and LVS (Layout vs. Schematic) verification for all substrate designs.
Develop and maintain design documentation and guidelines for future substrate designs.
Support design reviews and provide technical guidance to junior team members.
You may be a good fit if you have
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
10+ years of experience in IC substrate layout design for high-performance processors or accelerators.
Extensive experience with large substrate packages (>50mm) and complex high-density layouts.
Proven experience with high-power (700W+) package designs and robust power delivery networks.
Expertise in high-speed signaling design (>50GHz) and mitigating signal integrity challenges (crosstalk, reflections, impedance mismatches).
Strong experience with CoWoS (Chip-on-Wafer-on-Substrate) interposer design and the impact of the substrate design to support CoWos.
Advanced proficiency in Allegro Package Designer (including constraint management, routing, and design verification).
Deep understanding of SI/PI principles and how they apply to package-level design.
Strong analytical skills and ability to work effectively in a fast-paced, cross-functional team environment.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\nAs a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed signaling. The ideal candidate will have extensive experience with large substrate designs (>50mm), complex power delivery networks, and high-speed signaling solutions (up to and beyond 50GHz). You will work closely with silicon, signal integrity, power integrity, and system help co-design world class substates with OSAT providers. Intense focus on optimization for power delivery through substrate, pushing what’s possible.\n\n\n\nKey Responsibilities\n\n - IC Substrate Layout Design\n\n - Lead the design and development of complex IC substrate layouts for high-power AI processors and accelerators.\n\n - Design large (>50mm) and complex multi-layer substrate packages with high pin counts and dense routing requirements.\n\n - Ensure robust power delivery designs capable of supporting >700W custom silicon solutions.\n\n - High-Speed Signal Routing & Integrity\n\n - Develop high-speed signal routing solutions capable of supporting >50GHz signaling while minimizing signal integrity issues such as loss and crosstalk.\n\n - Collaborate with SI/PI engineers to define signal integrity and power integrity requirements and implement solutions in substrate layout.\n\n - Advanced Packaging & CoWoS Integration\n\n - Optimize CoWoS (Chip-on-Wafer-on-Substrate) interposer designs for thermal and electrical performance.\n\n - Work closely with chip design, packaging, and manufacturing teams to ensure design feasibility and manufacturability.\n\n - Design Validation & Verification\n\n - Perform DRC (Design Rule Check) and LVS (Layout vs. Schematic) verification for all substrate designs.\n\n - Develop and maintain design documentation and guidelines for future substrate designs.\n\n - Support design reviews and provide technical guidance to junior team members.\n\n\n\nYou may be a good fit if you have\n\n - Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.\n\n - 10+ years of experience in IC substrate layout design for high-performance processors or accelerators.\n\n - Extensive experience with large substrate packages (>50mm) and complex high-density layouts.\n\n - Proven experience with high-power (700W+) package designs and robust power delivery networks.\n\n - Expertise in high-speed signaling design (>50GHz) and mitigating signal integrity challenges (crosstalk, reflections, impedance mismatches).\n\n - Strong experience with CoWoS (Chip-on-Wafer-on-Substrate) interposer design and the impact of the substrate design to support CoWos. \n\n - Advanced proficiency in Allegro Package Designer (including constraint management, routing, and design verification).\n\n - Deep understanding of SI/PI principles and how they apply to package-level design.\n\n - Strong analytical skills and ability to work effectively in a fast-paced, cross-functional team environment.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"b003657e-f8dc-440e-9356-1133ba1796ec","title":"RMA & Repair Lead","department":"Production","team":"Production","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-09-01T01:28:35.884+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/b003657e-f8dc-440e-9356-1133ba1796ec","applyUrl":"https://jobs.ashbyhq.com/etched/b003657e-f8dc-440e-9356-1133ba1796ec/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is seeking an RMA and Repair Lead to build and run the end-to-end returns and repair operation for our AI hardware — from the moment a customer reports a failure through diagnosis, repair, and supplier recovery. You’ll be responsible for managing the repair capability whether it’s in-house or through outsourced partners. This role is deeply technical and hands-on: you'll own the repair, debug, and failure analysis requirements for our products, translate our manufacturing processes into repeatable repair processes, and feed what you learn back into design and production.
If you thrive in fast-paced environments, enjoy solving ambiguous problems, and want to shape the repair ecosystem at a rapidly scaling startup, this role is for you.
Key responsibilities
Own the end-to-end RMA process — from customer return authorization through triage, repair or replacement, reverse logistics, and supplier recovery/warranty claims
Develop and manage RMA workflows, including return authorization, repair/replacement, and reverse logistics
Build and manage Etched's repair operations, whether in-house or outsourced, capacity planning, and day-to-day management of in-house depots and/or outsourced repair partners
Own the technical definition of repair: repair strategy by product and level (rack, server, module, component), debug flows, failure analysis requirements, test coverage, and repair-vs-scrap criteria
Translate production and manufacturing processes into repair processes — repair travelers, work instructions, tooling and fixtures, test stations, calibration, and operator training and certification
Build the data layer for repair: turnaround time, failure rates by part and failure mode, cost of service, and repeat-failure tracking — and close the loop with design, quality, and manufacturing to drive corrective actions and improve product reliability
Design and implement metrics and dashboards (turnaround time, failure rates, cost of service) to monitor and improve operations
Define SLAs and escalation paths, and act as the technical point of contact for escalated customer issues.
You may be a good fit if you have (Must-have qualifications)
8+ years of experience in Repair operations, RMA, or hardware support operations, including ownership of end-to-end returns flow
Direct experience standing up a repair operation — either building an in-house depot or selecting and managing an outsourced repair partner [ especially from scratch in a fast-paced environment
Strong hands-on technical depth in hardware debug, board- and system-level troubleshooting, and failure analysis.
Experience converting NPI/manufacturing process documentation into repair processes, work instructions, and test flows
Strong understanding of failure analysis (FA), root cause, and corrective action processes
Excellent communication skills and ability to work closely with customers, suppliers, and internal teams
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience supporting server, networking, or AI hardware deployments at rack scale
Familiarity with PLM/ERP systems for tracking returns, parts, repairs and warranty claims
Contract manufacturer or ODM relationship management, including repair statements of work and pricing
Data-driven service analytics — failure rate analysis, Pareto/FMEA, cost optimization, predictive maintenance
Global reverse logistics, customs, and cross-border repair flows
ISO standards, quality systems, and regulatory requirements for hardware returns and repairs
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Etched is building AI systems that accelerate its own development. As a Research Engineer on the RL Frontiers team, you will train our proprietary frontier models to automate kernel development, ASIC engineering, production pipelines, and 3-D hardware operating systems.
You will use our proprietary simulators and environments to create custom data mixes and post-train models to SOTA performance on our hardest engineering tasks.
Own the post-training stack completely end to end.
Build RL environments with ASIC, kernel, and supercomputing engineers, rewarded by simulation, formal tools, tests, and hardware measurements.
Create custom data mixes that unlock frontier performance on relevant tasks.
Create benchmarks that drive real productivity in the models and avoid reward hacking
Have hands-on post-training experience, including SFT and RL (e.g., PPO, GRPO), and have shipped models people used.
Have taken a model from bad to good on a task it wasn’t built for, ideally with scarce data, for example as an early post-training hire at an applied AI company.
Are a strong PyTorch and distributed-training engineer who reads the rollouts and checks the numbers before trusting a result.
Understand the systems side of RL well enough to make the loop faster and cheaper, not just better.
Are entrepreneurial and make good calls under compute and data constraints. Former founders are a plus.
RL or post-training frameworks (e.g., verl, OpenRLHF, TRL, prime-rl) or inference engines (vLLM, SGLang).
Agentic, multi-turn RL with verifiable rewards.
Distillation and training small, specialized models for production.
ASIC design or verification, accelerator kernels, or large-scale compute infrastructure.
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
$400K+
Plus Significant Equity
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
","descriptionPlain":"JOB SUMMARY\n\nEtched is building AI systems that accelerate its own development. As a Research Engineer on the RL Frontiers team, you will train our proprietary frontier models to automate kernel development, ASIC engineering, production pipelines, and 3-D hardware operating systems.\n\nYou will use our proprietary simulators and environments to create custom data mixes and post-train models to SOTA performance on our hardest engineering tasks.\n\n\nKEY RESPONSIBILITIES\n\n - Own the post-training stack completely end to end.\n\n - Build RL environments with ASIC, kernel, and supercomputing engineers, rewarded by simulation, formal tools, tests, and hardware measurements.\n\n - Create custom data mixes that unlock frontier performance on relevant tasks.\n\n - Create benchmarks that drive real productivity in the models and avoid reward hacking\n\n\nYOU MAY BE A GOOD FIT IF YOU\n\n - Have hands-on post-training experience, including SFT and RL (e.g., PPO, GRPO), and have shipped models people used.\n\n - Have taken a model from bad to good on a task it wasn’t built for, ideally with scarce data, for example as an early post-training hire at an applied AI company.\n\n - Are a strong PyTorch and distributed-training engineer who reads the rollouts and checks the numbers before trusting a result.\n\n - Understand the systems side of RL well enough to make the loop faster and cheaper, not just better.\n\n - Are entrepreneurial and make good calls under compute and data constraints. Former founders are a plus.\n\n\nSTRONG CANDIDATES MAY ALSO HAVE EXPERIENCE WITH\n\n - RL or post-training frameworks (e.g., verl, OpenRLHF, TRL, prime-rl) or inference engines (vLLM, SGLang).\n\n - Agentic, multi-turn RL with verifiable rewards.\n\n - Distillation and training small, specialized models for production.\n\n - ASIC design or verification, accelerator kernels, or large-scale compute infrastructure.\n\n\nBENEFITS\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\nBASE COMPENSATION RANGE\n\n - $400K+\n\n - Plus Significant Equity\n\n\nHOW WE’RE DIFFERENT\n\nEtched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n\nABOUT ETCHED\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history."},{"id":"82622c6f-9b8f-44d1-b8fc-2d4634f5abbf","title":"Silicon Validation Engineer, Software","department":"ASIC","team":"ASIC","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-09-03T06:35:39.271+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/82622c6f-9b8f-44d1-b8fc-2d4634f5abbf","applyUrl":"https://jobs.ashbyhq.com/etched/82622c6f-9b8f-44d1-b8fc-2d4634f5abbf/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a skilled and motivated Silicon Validation Firmware Engineer to develop the firmware and low-level software that validates our AI/ML accelerator ASICs across their entire Lifecycle, from pre-silicon emulation and FPGA prototyping through post-silicon bring-up, characterization, and production ramp. In this role you will build the validation firmware, test content, and automation that prove our silicon works, and you will be hands-on debugging real hardware in the lab. Your work directly enables functional correctness, performance, and reliability of our cutting-edge products.
Key Responsibilities
Develop and own low-level validation firmware in C/C++ that runs across emulation and physical silicon, providing test content pre-silicon and reusing it to drive post-silicon bring-up.
Drive early bring-up of first silicon: boot, initialization, feature enablement, and debug of ASICs.
Perform deep-dive debug of silicon issues spanning firmware, RTL, electrical, protocol, and system levels; root-cause and resolve failures.
Build firmware infrastructure including hardware abstraction layers (HALs) and low-level device drivers for compute units, memory subsystems, and high-speed interfaces.
Develop and extend validation automation, result-capture, and regression frameworks (CI/CD) to run validation at scale.
Author firmware-driven test plans and define coverage metrics across IP blocks and subsystems; execute functional, performance, and stress/corner-case testing.
Validate and characterize custom IP blocks and accelerator components on both pre- and post-silicon platforms.
Use debug consoles and lab tooling (JTAG, UART, logic/protocol analyzers) for silicon debug and characterization.
Collaborate closely with design, verification, architecture, DFT, and driver teams to ensure a smooth transition from pre-silicon verification to post-silicon validation, and to feed silicon issues back into revisions and firmware/driver workarounds.
You may be a good fit if you have (Must-have qualifications)
Proficiency in C/C++ for firmware and bare-metal development, plus Python for validation automation and scripting.
Understanding of SoC/computer architecture (CPU cores, memory subsystems, caches, interconnects).
Solid low-level/embedded fundamentals: bootloaders, hardware abstraction layers, device drivers, register/interrupt programming, and bare-metal or RTOS environments.
Knowledge and familiarity developing and debugging in Linux environments.
Strong problem-solving, analytical, and cross-functional collaboration skills across hardware and software teams.
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (Master's a plus).
Strong candidates may also have experience with (Nice-to-have qualifications)
2+ years of experience developing firmware / embedded software for ASICs or SoCs
Hands-on experience with silicon bring-up and low-level debug (boot, initialization, root-causing failures across firmware/electrical/protocol layers).
Experience with JTAG and debuggers (e.g., Lauterbach/GDB) and serial/UART debug consoles.
Experience across both pre-silicon (emulation, FPGA, RTL simulation) and post-silicon (lab bring-up, characterization) environments.
Experience with one or more high-speed interfaces: PCIe, DDR/LPDDR/HBM, SerDes, or die-to-die / chiplet interconnect.
Experience building test/validation automation and regression frameworks (CI/CD).
RTOS experience (FreeRTOS, Zephyr, NuttX) or RISC-V firmware development.
Familiarity with platform/system firmware (UEFI, ACPI, BMC, BIOS).
Ability to read RTL (Verilog/SystemVerilog) and debug in simulation.
Hands-on lab instrumentation experience (oscilloscopes, logic/protocol analyzers, BERTs) and signal-integrity awareness.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a skilled and motivated Silicon Validation Firmware Engineer to develop the firmware and low-level software that validates our AI/ML accelerator ASICs across their entire Lifecycle, from pre-silicon emulation and FPGA prototyping through post-silicon bring-up, characterization, and production ramp. In this role you will build the validation firmware, test content, and automation that prove our silicon works, and you will be hands-on debugging real hardware in the lab. Your work directly enables functional correctness, performance, and reliability of our cutting-edge products.\n\n\n\nKey Responsibilities\n\n - Develop and own low-level validation firmware in C/C++ that runs across emulation and physical silicon, providing test content pre-silicon and reusing it to drive post-silicon bring-up.\n\n - Drive early bring-up of first silicon: boot, initialization, feature enablement, and debug of ASICs.\n\n - Perform deep-dive debug of silicon issues spanning firmware, RTL, electrical, protocol, and system levels; root-cause and resolve failures.\n\n - Build firmware infrastructure including hardware abstraction layers (HALs) and low-level device drivers for compute units, memory subsystems, and high-speed interfaces.\n\n - Develop and extend validation automation, result-capture, and regression frameworks (CI/CD) to run validation at scale.\n\n - Author firmware-driven test plans and define coverage metrics across IP blocks and subsystems; execute functional, performance, and stress/corner-case testing.\n\n - Validate and characterize custom IP blocks and accelerator components on both pre- and post-silicon platforms.\n\n - Use debug consoles and lab tooling (JTAG, UART, logic/protocol analyzers) for silicon debug and characterization.\n\n - Collaborate closely with design, verification, architecture, DFT, and driver teams to ensure a smooth transition from pre-silicon verification to post-silicon validation, and to feed silicon issues back into revisions and firmware/driver workarounds.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - Proficiency in C/C++ for firmware and bare-metal development, plus Python for validation automation and scripting.\n\n - Understanding of SoC/computer architecture (CPU cores, memory subsystems, caches, interconnects).\n\n - Solid low-level/embedded fundamentals: bootloaders, hardware abstraction layers, device drivers, register/interrupt programming, and bare-metal or RTOS environments.\n\n - Knowledge and familiarity developing and debugging in Linux environments.\n\n - Strong problem-solving, analytical, and cross-functional collaboration skills across hardware and software teams.\n\n - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (Master's a plus).\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - 2+ years of experience developing firmware / embedded software for ASICs or SoCs\n\n - Hands-on experience with silicon bring-up and low-level debug (boot, initialization, root-causing failures across firmware/electrical/protocol layers).\n\n - Experience with JTAG and debuggers (e.g., Lauterbach/GDB) and serial/UART debug consoles.\n\n - Experience across both pre-silicon (emulation, FPGA, RTL simulation) and post-silicon (lab bring-up, characterization) environments.\n\n - Experience with one or more high-speed interfaces: PCIe, DDR/LPDDR/HBM, SerDes, or die-to-die / chiplet interconnect.\n\n - Experience building test/validation automation and regression frameworks (CI/CD).\n\n - RTOS experience (FreeRTOS, Zephyr, NuttX) or RISC-V firmware development.\n\n - Familiarity with platform/system firmware (UEFI, ACPI, BMC, BIOS).\n\n - Ability to read RTL (Verilog/SystemVerilog) and debug in simulation.\n\n - Hands-on lab instrumentation experience (oscilloscopes, logic/protocol analyzers, BERTs) and signal-integrity awareness.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2.5k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"79b51baf-67eb-4857-a1ae-abcb649feab8","title":"Mechanical Engineer ","department":"Platform","team":"Platform","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-19T05:29:50.102+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/79b51baf-67eb-4857-a1ae-abcb649feab8","applyUrl":"https://jobs.ashbyhq.com/etched/79b51baf-67eb-4857-a1ae-abcb649feab8/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking an experienced Mechanical Engineer to join our team and help transform complex designs into reliable, high-power data center products. As a Mechanical Engineer at Etched, you will be integral to the development of high-performance data center products, from initial concept through to production. You will collaborate closely with both internal and external design engineers, including JDM (Joint Design Manufacturer) partners. Your expertise in mechanical design, particularly for data center chassis and high-power systems, will ensure our products meet rigorous performance, reliability, and manufacturability standards.
Key Responsibilities
Develop and refine mechanical designs for high-power data center products, ensuring robust performance and reliability. Manage the transition from appearance models to production-ready designs.
Work closely with internal design teams and external partners, including Joint Design Manufacturers (JDMs), to ensure seamless integration of mechanical designs with overall product architecture.
Lead the design of data center chassis and enclosures from concept through production, focusing on meeting high power, cooling efficiency, and ruggedness requirements.
Oversee and manage the development of both soft and hard tooling to support mass production, ensuring that all tooling meets strict quality and consistency specifications.
Ensure that mechanical designs comply with manufacturing requirements, including shock and vibration standards, to guarantee durability and performance in demanding data center environments.
Translate industrial design concepts into manufacturable designs, effectively converting appearance models into production-ready mechanical solutions.
Apply DFM principles to optimize designs for cost-effective manufacturing, assembly, and maintenance, ensuring high efficiency and reduced production costs.
You maybe a good fit if you have
A Bachelor’s degree in Mechanical Engineering or a related field is essential. Advanced degrees or certifications in mechanical design or manufacturing are a plus.
A minimum of 10 years of experience in mechanical engineering with a focus on high-power data center products, including a proven track record in designing and managing chassis and enclosures for data centers, is required.
Strong expertise in mechanical design and engineering principles is necessary, along with hands-on experience in transforming industrial design concepts into production-ready models.
Extensive experience in data center chassis design, with a deep understanding of high-power and cooling requirements, is important.
Proficiency in mechanical CAD software and tools such as SolidWorks, Creo, FX, CATIA, or similar is required.
A deep understanding of tooling processes, including both soft and hard tooling, and their impact on product design and production, is critical.
Familiarity with manufacturing requirements and standards, including shock and vibration testing, is expected to ensure that designs are durable and meet industry expectations.
Excellent problem-solving skills and a keen attention to detail are essential to ensure that every aspect of design work is meticulously considered.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n \n\nJob Summary\n\nWe are seeking an experienced Mechanical Engineer to join our team and help transform complex designs into reliable, high-power data center products. As a Mechanical Engineer at Etched, you will be integral to the development of high-performance data center products, from initial concept through to production. You will collaborate closely with both internal and external design engineers, including JDM (Joint Design Manufacturer) partners. Your expertise in mechanical design, particularly for data center chassis and high-power systems, will ensure our products meet rigorous performance, reliability, and manufacturability standards.\n\n \n\nKey Responsibilities\n\n - Develop and refine mechanical designs for high-power data center products, ensuring robust performance and reliability. Manage the transition from appearance models to production-ready designs.\n\n - Work closely with internal design teams and external partners, including Joint Design Manufacturers (JDMs), to ensure seamless integration of mechanical designs with overall product architecture.\n\n - Lead the design of data center chassis and enclosures from concept through production, focusing on meeting high power, cooling efficiency, and ruggedness requirements.\n\n - Oversee and manage the development of both soft and hard tooling to support mass production, ensuring that all tooling meets strict quality and consistency specifications.\n\n - Ensure that mechanical designs comply with manufacturing requirements, including shock and vibration standards, to guarantee durability and performance in demanding data center environments.\n\n - Translate industrial design concepts into manufacturable designs, effectively converting appearance models into production-ready mechanical solutions.\n\n - Apply DFM principles to optimize designs for cost-effective manufacturing, assembly, and maintenance, ensuring high efficiency and reduced production costs.\n\n \n\nYou maybe a good fit if you have\n\n - A Bachelor’s degree in Mechanical Engineering or a related field is essential. Advanced degrees or certifications in mechanical design or manufacturing are a plus.\n\n - A minimum of 10 years of experience in mechanical engineering with a focus on high-power data center products, including a proven track record in designing and managing chassis and enclosures for data centers, is required.\n\n - Strong expertise in mechanical design and engineering principles is necessary, along with hands-on experience in transforming industrial design concepts into production-ready models.\n\n - Extensive experience in data center chassis design, with a deep understanding of high-power and cooling requirements, is important.\n\n - Proficiency in mechanical CAD software and tools such as SolidWorks, Creo, FX, CATIA, or similar is required.\n\n - A deep understanding of tooling processes, including both soft and hard tooling, and their impact on product design and production, is critical.\n\n - Familiarity with manufacturing requirements and standards, including shock and vibration testing, is expected to ensure that designs are durable and meet industry expectations.\n\n - Excellent problem-solving skills and a keen attention to detail are essential to ensure that every aspect of design work is meticulously considered.\n\n \n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n \n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n \n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"7d400861-c124-475f-8cef-73b9fd5199cf","title":"Lab Operations Intern","department":"Operations","team":"Operations","employmentType":"Intern","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-09-15T03:48:33.254+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/7d400861-c124-475f-8cef-73b9fd5199cf","applyUrl":"https://jobs.ashbyhq.com/etched/7d400861-c124-475f-8cef-73b9fd5199cf/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across prefill and decode. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, we're redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched's lab keeps our hardware running 24/7. Our chips, modules, and racks are constantly being tested, and we need sharp, reliable hands to make it happen. You'll run test stations, assemble and rework hardware, cable racks, manage inventory, and own the day-to-day operations that turn raw silicon into working systems. You will see how a frontier AI chip goes from a tray of parts to a running rack, and reliable, curious interns take on engineering work over time.
This role is for people genuinely excited about what we're building and willing to do real, often repetitive work with precision and care. Evening and weekend availability is a plus. This role is fully in-person in San Jose.
You may be a good fit if you:
Have extreme attention to detail
Interested in both software and hardware
Are excited about learning how a hardware company works end to end
Are comfortable with hands-on work
Have evening or weekend availability
Curiosity and bias to action — see what needs doing and figure it out
Strong candidates may also have:
Experience with software, mechanical engineering, or thermal systems
Understanding of accelerator hardware, or datacenter environments
Have owned or built hardware testing systems
We encourage you to apply even if you do not believe you meet every qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
How we're different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across prefill and decode. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, we're redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nEtched's lab keeps our hardware running 24/7. Our chips, modules, and racks are constantly being tested, and we need sharp, reliable hands to make it happen. You'll run test stations, assemble and rework hardware, cable racks, manage inventory, and own the day-to-day operations that turn raw silicon into working systems. You will see how a frontier AI chip goes from a tray of parts to a running rack, and reliable, curious interns take on engineering work over time.\n\n\n\nThis role is for people genuinely excited about what we're building and willing to do real, often repetitive work with precision and care. Evening and weekend availability is a plus. This role is fully in-person in San Jose.\n\n\n\nYou may be a good fit if you:\n\n - Have extreme attention to detail\n\n - Interested in both software and hardware\n\n - Are excited about learning how a hardware company works end to end\n\n - Are comfortable with hands-on work\n\n - Have evening or weekend availability\n\n - Curiosity and bias to action — see what needs doing and figure it out\n\n\n\nStrong candidates may also have:\n\n - Experience with software, mechanical engineering, or thermal systems\n\n - Understanding of accelerator hardware, or datacenter environments\n\n - Have owned or built hardware testing systems\n\nWe encourage you to apply even if you do not believe you meet every qualification.\n\n\n\nProgram details\n\n - 12-week paid internship \n\n - Generous housing support for those relocating\n\n - Daily lunch and dinner in our office\n\n - Based at our office in San Jose, CA\n\n - Direct mentorship from industry leaders and world-class engineers\n\n - Opportunity to work on one of the most important problems of our time\n\n\n\nFor any questions, contact internships@etched.com\n\n\n\nHow we're different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference.\n\n\n\nWe are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"dc036272-19b8-464f-a22d-2505c14b5270","title":"People Operations Intern","department":"People","team":"People","employmentType":"Intern","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-09-17T00:48:01.650+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/dc036272-19b8-464f-a22d-2505c14b5270","applyUrl":"https://jobs.ashbyhq.com/etched/dc036272-19b8-464f-a22d-2505c14b5270/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are looking for a sharp, high-agency intern to support People Operations and Legal. You will own real work across compliance, audits, employee operations, contracts, and company projects. You will investigate problems, organize messy information, work across teams, and drive projects through completion.
The role is based in our San Jose office.
Key Responsibilities
Run People and Legal internal audits, including employment agreements, I-9s, policies, and employee records
Track compliance requirements and prepare filings, reports, and supporting records
Review data across Rippling, spreadsheets, and source documents to find and fix gaps
Support contracts, signatures, document storage, and other Legal operations
Help manage onboarding, offboarding, employee changes, and recruiting handoffs
Build clear guides and processes for employees, including travel and office resources
Coordinate with People, Legal, Finance, Recruiting, and workplace teams
Research employment and business requirements and turn findings into clear next steps
Take on time-sensitive projects as the company grows
You may be a good fit if you have (Must-have qualifications)
Current undergraduate or recent graduate interested in People Operations, Legal, or business operations
Strong attention to detail
Clear written and verbal communication
Good judgment with sensitive information
Able to work through incomplete or conflicting information
Comfortable using spreadsheets and learning new systems
Organized, reliable, and quick to follow through
Willing to ask questions, find answers, and take ownership
Strong candidates may also have experience with (Nice-to-have qualifications)
Previous internship, campus leadership, or volunteer experience involving administrative or operational support
Familiarity with HR, recruiting, or document management systems
Experience reviewing records, reconciling data, or flagging discrepancies
Experience documenting processes or suggesting ways to make routine tasks more efficient
We encourage you to apply even if you do not believe you meet every qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com.
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are looking for a sharp, high-agency intern to support People Operations and Legal. You will own real work across compliance, audits, employee operations, contracts, and company projects. You will investigate problems, organize messy information, work across teams, and drive projects through completion.\n\nThe role is based in our San Jose office.\n\n\n\nKey Responsibilities\n\n - Run People and Legal internal audits, including employment agreements, I-9s, policies, and employee records\n\n - Track compliance requirements and prepare filings, reports, and supporting records\n\n - Review data across Rippling, spreadsheets, and source documents to find and fix gaps\n\n - Support contracts, signatures, document storage, and other Legal operations\n\n - Help manage onboarding, offboarding, employee changes, and recruiting handoffs\n\n - Build clear guides and processes for employees, including travel and office resources\n\n - Coordinate with People, Legal, Finance, Recruiting, and workplace teams\n\n - Research employment and business requirements and turn findings into clear next steps\n\n - Take on time-sensitive projects as the company grows\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - Current undergraduate or recent graduate interested in People Operations, Legal, or business operations\n\n - Strong attention to detail\n\n - Clear written and verbal communication\n\n - Good judgment with sensitive information\n\n - Able to work through incomplete or conflicting information\n\n - Comfortable using spreadsheets and learning new systems\n\n - Organized, reliable, and quick to follow through\n\n - Willing to ask questions, find answers, and take ownership\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Previous internship, campus leadership, or volunteer experience involving administrative or operational support\n\n - Familiarity with HR, recruiting, or document management systems\n\n - Experience reviewing records, reconciling data, or flagging discrepancies\n\n - Experience documenting processes or suggesting ways to make routine tasks more efficient\n\n\n\nWe encourage you to apply even if you do not believe you meet every qualification.\n\n\n\nProgram details\n\n - 12-week paid internship\n\n - Generous housing support for those relocating\n\n - Daily lunch and dinner in our office\n\n - Based at our office in San Jose, CA\n\n - Direct mentorship from industry leaders and world-class engineers\n\n - Opportunity to work on one of the most important problems of our time\n\n\n\nFor any questions, contact internships@etched.com. internships@etched.com\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"e88d1367-9166-4a00-b450-f194163c7225","title":"Internal Acceleration, Engineer (ASIC)","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-15T22:04:43.451+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/e88d1367-9166-4a00-b450-f194163c7225","applyUrl":"https://jobs.ashbyhq.com/etched/e88d1367-9166-4a00-b450-f194163c7225/application","descriptionHtml":"Our Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.
You’ll work directly with our founders and embed with our ASIC team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. Your work will vary widely, and your success is measured by how much faster Etched moves, not by the lines of code you write.
This role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.
Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup
Have strong full-stack skills. We care less about whether you write every line yourself and more about whether what you ship works
Have built LLM agents or AI tooling that real users depend on, which means more than calling an API: context engineering, tool integration, evals, and failure analysis
Use AI to ramp fast on unfamiliar domains. Agentic coding tools and frontier models are how you work, not an add-on
Have product sense, design taste, and extreme attention to detail
Have extreme agency: you find the real problem, not just the stated one
Embed with our ASIC team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.
Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.
Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.
Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.
Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.
Exposure to chip development, kernels, hardware, or manufacturing.
Infrastructure, data engineering, or DevOps experience
Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration
Startup experience, especially through hypergrowth
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
$150K – $400K+
Plus Significant Equity
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
","descriptionPlain":"JOB SUMMARY\n\nOur Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.\n\nYou’ll work directly with our founders and embed with our ASIC team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. Your work will vary widely, and your success is measured by how much faster Etched moves, not by the lines of code you write.\n\nThis role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.\n\n\nYOU MAY BE A GOOD FIT IF YOU\n\n - Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup\n\n - Have strong full-stack skills. We care less about whether you write every line yourself and more about whether what you ship works\n\n - Have built LLM agents or AI tooling that real users depend on, which means more than calling an API: context engineering, tool integration, evals, and failure analysis\n\n - Use AI to ramp fast on unfamiliar domains. Agentic coding tools and frontier models are how you work, not an add-on\n\n - Have product sense, design taste, and extreme attention to detail\n\n - Have extreme agency: you find the real problem, not just the stated one\n\n\nKEY RESPONSIBILITIES\n\n - Embed with our ASIC team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.\n\n - Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.\n\n - Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.\n\n - Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.\n\n - Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.\n\n\nSTRONG CANDIDATES MAY ALSO HAVE\n\n - Exposure to chip development, kernels, hardware, or manufacturing.\n\n - Infrastructure, data engineering, or DevOps experience\n\n - Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration\n\n - Startup experience, especially through hypergrowth\n\n\nBENEFITS\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\nBASE COMPENSATION RANGE\n\n - $150K – $400K+\n\n - Plus Significant Equity\n\n\nHOW WE’RE DIFFERENT\n\nEtched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n\nABOUT ETCHED\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history."},{"id":"614b3592-9043-4c68-9808-bf2747d57146","title":"Internal Acceleration, Engineer (Hardware)","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-15T22:05:07.525+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/614b3592-9043-4c68-9808-bf2747d57146","applyUrl":"https://jobs.ashbyhq.com/etched/614b3592-9043-4c68-9808-bf2747d57146/application","descriptionHtml":"Our Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.
You’ll work directly with our founders and embed with our hardware team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. Your work will vary widely, and your success is measured by how much faster Etched moves, not by the lines of code you write.
This role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.
Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup
Have strong full-stack skills. We care less about whether you write every line yourself and more about whether what you ship works
Have built LLM agents or AI tooling that real users depend on, which means more than calling an API: context engineering, tool integration, evals, and failure analysis
Use AI to ramp fast on unfamiliar domains. Agentic coding tools and frontier models are how you work, not an add-on
Have product sense, design taste, and extreme attention to detail
Have extreme agency: you find the real problem, not just the stated one
Embed with our hardware team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.
Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.
Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.
Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.
Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.
Exposure to chip development, kernels, hardware, or manufacturing.
Infrastructure, data engineering, or DevOps experience
Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration
Startup experience, especially through hypergrowth
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
$150K – $400K+
Plus Significant Equity
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
","descriptionPlain":"JOB SUMMARY\n\nOur Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.\n\nYou’ll work directly with our founders and embed with our hardware team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. Your work will vary widely, and your success is measured by how much faster Etched moves, not by the lines of code you write.\n\nThis role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.\n\n\nYOU MAY BE A GOOD FIT IF YOU\n\n - Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup\n\n - Have strong full-stack skills. We care less about whether you write every line yourself and more about whether what you ship works\n\n - Have built LLM agents or AI tooling that real users depend on, which means more than calling an API: context engineering, tool integration, evals, and failure analysis\n\n - Use AI to ramp fast on unfamiliar domains. Agentic coding tools and frontier models are how you work, not an add-on\n\n - Have product sense, design taste, and extreme attention to detail\n\n - Have extreme agency: you find the real problem, not just the stated one\n\n\nKEY RESPONSIBILITIES\n\n - Embed with our hardware team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.\n\n - Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.\n\n - Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.\n\n - Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.\n\n - Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.\n\n\nSTRONG CANDIDATES MAY ALSO HAVE\n\n - Exposure to chip development, kernels, hardware, or manufacturing.\n\n - Infrastructure, data engineering, or DevOps experience\n\n - Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration\n\n - Startup experience, especially through hypergrowth\n\n\nBENEFITS\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\nBASE COMPENSATION RANGE\n\n - $150K – $400K+\n\n - Plus Significant Equity\n\n\nHOW WE’RE DIFFERENT\n\nEtched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n\nABOUT ETCHED\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history."},{"id":"778a762d-4a30-4a8b-aad9-ee18855ce75c","title":"Internal Acceleration, Engineer (Production)","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-15T22:05:22.912+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/778a762d-4a30-4a8b-aad9-ee18855ce75c","applyUrl":"https://jobs.ashbyhq.com/etched/778a762d-4a30-4a8b-aad9-ee18855ce75c/application","descriptionHtml":"Our Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.
You’ll work directly with our founders and embed with our production team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. Your work will vary widely, and your success is measured by how much faster Etched moves, not by the lines of code you write.
This role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.
Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup
Have strong full-stack skills. We care less about whether you write every line yourself and more about whether what you ship works
Have built LLM agents or AI tooling that real users depend on, which means more than calling an API: context engineering, tool integration, evals, and failure analysis
Use AI to ramp fast on unfamiliar domains. Agentic coding tools and frontier models are how you work, not an add-on
Have product sense, design taste, and extreme attention to detail
Have extreme agency: you find the real problem, not just the stated one
Embed with our production team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.
Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.
Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.
Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.
Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.
Exposure to chip development, kernels, hardware, or manufacturing.
Infrastructure, data engineering, or DevOps experience
Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration
Startup experience, especially through hypergrowth
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
$150K – $400K+
Plus Significant Equity
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
","descriptionPlain":"JOB SUMMARY\n\nOur Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.\n\nYou’ll work directly with our founders and embed with our production team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. Your work will vary widely, and your success is measured by how much faster Etched moves, not by the lines of code you write.\n\nThis role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.\n\n\nYOU MAY BE A GOOD FIT IF YOU\n\n - Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup\n\n - Have strong full-stack skills. We care less about whether you write every line yourself and more about whether what you ship works\n\n - Have built LLM agents or AI tooling that real users depend on, which means more than calling an API: context engineering, tool integration, evals, and failure analysis\n\n - Use AI to ramp fast on unfamiliar domains. Agentic coding tools and frontier models are how you work, not an add-on\n\n - Have product sense, design taste, and extreme attention to detail\n\n - Have extreme agency: you find the real problem, not just the stated one\n\n\nKEY RESPONSIBILITIES\n\n - Embed with our production team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.\n\n - Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.\n\n - Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.\n\n - Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.\n\n - Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.\n\n\nSTRONG CANDIDATES MAY ALSO HAVE\n\n - Exposure to chip development, kernels, hardware, or manufacturing.\n\n - Infrastructure, data engineering, or DevOps experience\n\n - Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration\n\n - Startup experience, especially through hypergrowth\n\n\nBENEFITS\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\nBASE COMPENSATION RANGE\n\n - $150K – $400K+\n\n - Plus Significant Equity\n\n\nHOW WE’RE DIFFERENT\n\nEtched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n\nABOUT ETCHED\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history."},{"id":"6d948f9a-a359-4107-9d30-4d62e8fe7707","title":"Internal Acceleration, Research Engineer (ASIC)","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-15T22:06:34.342+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/6d948f9a-a359-4107-9d30-4d62e8fe7707","applyUrl":"https://jobs.ashbyhq.com/etched/6d948f9a-a359-4107-9d30-4d62e8fe7707/application","descriptionHtml":"Our Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.
You’ll work directly with our founders and embed with our ASIC team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. You’ll work on harnesses, tool use, context, and memory, execution environments, and evals that let agents conduct long-running engineering work that is useful.
This role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.
Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup
Have built agents for complex, multi-step tasks that people depend on, beyond calling an API: tool design, long-context management, evals, and failure analysis.
Are a strong software engineer who has built reliable systems others depend on, such as distributed systems, experiment infrastructure, or developer tooling.
Use coding agents heavily, read their transcripts closely, and change the system when an agent is confidently wrong.
Have high agency in unfamiliar domains. You find the real problem and drive it forward.
Have product sense, design taste, and extreme attention to detail
Embed with our ASIC team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.
Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.
Build execution environments where agents can verify their own work, with sandboxed access to simulators, EDA flows, compilers, profilers, and real hardware.
Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.
Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.
Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.
Exposure to chip development, kernels, hardware, or manufacturing.
Infrastructure, data engineering, or DevOps experience
Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration
Startup experience, especially through hypergrowth
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
$150K – $400K+
Plus Significant Equity
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
","descriptionPlain":"JOB SUMMARY\n\nOur Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.\n\nYou’ll work directly with our founders and embed with our ASIC team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. You’ll work on harnesses, tool use, context, and memory, execution environments, and evals that let agents conduct long-running engineering work that is useful.\n\nThis role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.\n\n\nYOU MAY BE A GOOD FIT IF YOU\n\n - Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup\n\n - Have built agents for complex, multi-step tasks that people depend on, beyond calling an API: tool design, long-context management, evals, and failure analysis.\n\n - Are a strong software engineer who has built reliable systems others depend on, such as distributed systems, experiment infrastructure, or developer tooling.\n\n - Use coding agents heavily, read their transcripts closely, and change the system when an agent is confidently wrong.\n\n - Have high agency in unfamiliar domains. You find the real problem and drive it forward.\n\n - Have product sense, design taste, and extreme attention to detail\n\n\nKEY RESPONSIBILITIES\n\n - Embed with our ASIC team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.\n\n - Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.\n\n - Build execution environments where agents can verify their own work, with sandboxed access to simulators, EDA flows, compilers, profilers, and real hardware.\n\n - Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.\n\n - Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.\n\n - Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.\n\n\nSTRONG CANDIDATES MAY ALSO HAVE\n\n - Exposure to chip development, kernels, hardware, or manufacturing.\n\n - Infrastructure, data engineering, or DevOps experience\n\n - Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration\n\n - Startup experience, especially through hypergrowth\n\n\nBENEFITS\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\nBASE COMPENSATION RANGE\n\n - $150K – $400K+\n\n - Plus Significant Equity\n\n\nHOW WE’RE DIFFERENT\n\nEtched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n\nABOUT ETCHED\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history."},{"id":"252ef868-9c97-4d7d-91fe-66bc4f686765","title":"Internal Acceleration, Research Engineer (Hardware)","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-15T22:06:43.300+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/252ef868-9c97-4d7d-91fe-66bc4f686765","applyUrl":"https://jobs.ashbyhq.com/etched/252ef868-9c97-4d7d-91fe-66bc4f686765/application","descriptionHtml":"Our Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.
You’ll work directly with our founders and embed with our hardware team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. You’ll work on harnesses, tool use, context, and memory, execution environments, and evals that let agents conduct long-running engineering work that is useful.
This role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.
Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup
Have built agents for complex, multi-step tasks that people depend on, beyond calling an API: tool design, long-context management, evals, and failure analysis.
Are a strong software engineer who has built reliable systems others depend on, such as distributed systems, experiment infrastructure, or developer tooling.
Use coding agents heavily, read their transcripts closely, and change the system when an agent is confidently wrong.
Have high agency in unfamiliar domains. You find the real problem and drive it forward.
Have product sense, design taste, and extreme attention to detail
Embed with our hardware team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.
Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.
Build execution environments where agents can verify their own work, with sandboxed access to simulators, EDA flows, compilers, profilers, and real hardware.
Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.
Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.
Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.
Exposure to chip development, kernels, hardware, or manufacturing.
Infrastructure, data engineering, or DevOps experience
Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration
Startup experience, especially through hypergrowth
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
$150K – $400K+
Plus Significant Equity
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
","descriptionPlain":"JOB SUMMARY\n\nOur Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.\n\nYou’ll work directly with our founders and embed with our hardware team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. You’ll work on harnesses, tool use, context, and memory, execution environments, and evals that let agents conduct long-running engineering work that is useful.\n\nThis role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.\n\n\nYOU MAY BE A GOOD FIT IF YOU\n\n - Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup\n\n - Have built agents for complex, multi-step tasks that people depend on, beyond calling an API: tool design, long-context management, evals, and failure analysis.\n\n - Are a strong software engineer who has built reliable systems others depend on, such as distributed systems, experiment infrastructure, or developer tooling.\n\n - Use coding agents heavily, read their transcripts closely, and change the system when an agent is confidently wrong.\n\n - Have high agency in unfamiliar domains. You find the real problem and drive it forward.\n\n - Have product sense, design taste, and extreme attention to detail\n\n\nKEY RESPONSIBILITIES\n\n - Embed with our hardware team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.\n\n - Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.\n\n - Build execution environments where agents can verify their own work, with sandboxed access to simulators, EDA flows, compilers, profilers, and real hardware.\n\n - Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.\n\n - Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.\n\n - Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.\n\n\nSTRONG CANDIDATES MAY ALSO HAVE\n\n - Exposure to chip development, kernels, hardware, or manufacturing.\n\n - Infrastructure, data engineering, or DevOps experience\n\n - Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration\n\n - Startup experience, especially through hypergrowth\n\n\nBENEFITS\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\nBASE COMPENSATION RANGE\n\n - $150K – $400K+\n\n - Plus Significant Equity\n\n\nHOW WE’RE DIFFERENT\n\nEtched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n\nABOUT ETCHED\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history."},{"id":"85731463-f580-48dc-870b-5ba305a22fe4","title":"Internal Acceleration, Research Engineer (Production)","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-15T22:07:00.658+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/85731463-f580-48dc-870b-5ba305a22fe4","applyUrl":"https://jobs.ashbyhq.com/etched/85731463-f580-48dc-870b-5ba305a22fe4/application","descriptionHtml":"Our Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.
You’ll work directly with our founders and embed with our production team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. You’ll work on harnesses, tool use, context, and memory, execution environments, and evals that let agents conduct long-running engineering work that is useful.
This role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.
Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup
Have built agents for complex, multi-step tasks that people depend on, beyond calling an API: tool design, long-context management, evals, and failure analysis.
Are a strong software engineer who has built reliable systems others depend on, such as distributed systems, experiment infrastructure, or developer tooling.
Use coding agents heavily, read their transcripts closely, and change the system when an agent is confidently wrong.
Have high agency in unfamiliar domains. You find the real problem and drive it forward.
Have product sense, design taste, and extreme attention to detail
Embed with our production team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.
Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.
Build execution environments where agents can verify their own work, with sandboxed access to simulators, EDA flows, compilers, profilers, and real hardware.
Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.
Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.
Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.
Exposure to chip development, kernels, hardware, or manufacturing.
Infrastructure, data engineering, or DevOps experience
Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration
Startup experience, especially through hypergrowth
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
$150K – $400K+
Plus Significant Equity
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
","descriptionPlain":"JOB SUMMARY\n\nOur Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.\n\nYou’ll work directly with our founders and embed with our production team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. You’ll work on harnesses, tool use, context, and memory, execution environments, and evals that let agents conduct long-running engineering work that is useful.\n\nThis role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.\n\n\nYOU MAY BE A GOOD FIT IF YOU\n\n - Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup\n\n - Have built agents for complex, multi-step tasks that people depend on, beyond calling an API: tool design, long-context management, evals, and failure analysis.\n\n - Are a strong software engineer who has built reliable systems others depend on, such as distributed systems, experiment infrastructure, or developer tooling.\n\n - Use coding agents heavily, read their transcripts closely, and change the system when an agent is confidently wrong.\n\n - Have high agency in unfamiliar domains. You find the real problem and drive it forward.\n\n - Have product sense, design taste, and extreme attention to detail\n\n\nKEY RESPONSIBILITIES\n\n - Embed with our production team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.\n\n - Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.\n\n - Build execution environments where agents can verify their own work, with sandboxed access to simulators, EDA flows, compilers, profilers, and real hardware.\n\n - Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.\n\n - Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.\n\n - Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.\n\n\nSTRONG CANDIDATES MAY ALSO HAVE\n\n - Exposure to chip development, kernels, hardware, or manufacturing.\n\n - Infrastructure, data engineering, or DevOps experience\n\n - Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration\n\n - Startup experience, especially through hypergrowth\n\n\nBENEFITS\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\nBASE COMPENSATION RANGE\n\n - $150K – $400K+\n\n - Plus Significant Equity\n\n\nHOW WE’RE DIFFERENT\n\nEtched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n\nABOUT ETCHED\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history."},{"id":"a38b6166-c130-44ed-ada2-10e8c23525a7","title":"Internal Acceleration, Engineer (Kernels)","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-15T20:38:50.098+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/a38b6166-c130-44ed-ada2-10e8c23525a7","applyUrl":"https://jobs.ashbyhq.com/etched/a38b6166-c130-44ed-ada2-10e8c23525a7/application","descriptionHtml":"Our Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.
You’ll work directly with our founders and embed with our kernels team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. Your work will vary widely, and your success is measured by how much faster Etched moves, not by the lines of code you write.
This role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.
Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup
Have strong full-stack skills. We care less about whether you write every line yourself and more about whether what you ship works
Have built LLM agents or AI tooling that real users depend on, which means more than calling an API: context engineering, tool integration, evals, and failure analysis
Use AI to ramp fast on unfamiliar domains. Agentic coding tools and frontier models are how you work, not an add-on
Have product sense, design taste, and extreme attention to detail
Have extreme agency: you find the real problem, not just the stated one
Embed with our kernels team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.
Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.
Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.
Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.
Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.
Exposure to chip development, kernels, hardware, or manufacturing.
Infrastructure, data engineering, or DevOps experience
Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration
Startup experience, especially through hypergrowth
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
$150K – $400K+
Plus Significant Equity
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
","descriptionPlain":"JOB SUMMARY\n\nOur Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.\n\nYou’ll work directly with our founders and embed with our kernels team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. Your work will vary widely, and your success is measured by how much faster Etched moves, not by the lines of code you write.\n\nThis role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.\n\n\nYOU MAY BE A GOOD FIT IF YOU\n\n - Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup\n\n - Have strong full-stack skills. We care less about whether you write every line yourself and more about whether what you ship works\n\n - Have built LLM agents or AI tooling that real users depend on, which means more than calling an API: context engineering, tool integration, evals, and failure analysis\n\n - Use AI to ramp fast on unfamiliar domains. Agentic coding tools and frontier models are how you work, not an add-on\n\n - Have product sense, design taste, and extreme attention to detail\n\n - Have extreme agency: you find the real problem, not just the stated one\n\n\nKEY RESPONSIBILITIES\n\n - Embed with our kernels team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.\n\n - Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.\n\n - Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.\n\n - Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.\n\n - Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.\n\n\nSTRONG CANDIDATES MAY ALSO HAVE\n\n - Exposure to chip development, kernels, hardware, or manufacturing.\n\n - Infrastructure, data engineering, or DevOps experience\n\n - Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration\n\n - Startup experience, especially through hypergrowth\n\n\nBENEFITS\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\nBASE COMPENSATION RANGE\n\n - $150K – $400K+\n\n - Plus Significant Equity\n\n\nHOW WE’RE DIFFERENT\n\nEtched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n\nABOUT ETCHED\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history."},{"id":"885d8a6d-b1ce-4feb-89f5-f6ac9bef8ca7","title":"Internal Acceleration, Research Engineer (Kernels)","department":"Software","team":"Software","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-15T20:42:52.681+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/885d8a6d-b1ce-4feb-89f5-f6ac9bef8ca7","applyUrl":"https://jobs.ashbyhq.com/etched/885d8a6d-b1ce-4feb-89f5-f6ac9bef8ca7/application","descriptionHtml":"Our Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.
You’ll work directly with our founders and embed with our kernels team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. You’ll work on harnesses, tool use, context, and memory, execution environments, and evals that let agents conduct long-running engineering work that is useful.
This role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.
Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup
Have built agents for complex, multi-step tasks that people depend on, beyond calling an API: tool design, long-context management, evals, and failure analysis.
Are a strong software engineer who has built reliable systems others depend on, such as distributed systems, experiment infrastructure, or developer tooling.
Use coding agents heavily, read their transcripts closely, and change the system when an agent is confidently wrong.
Have high agency in unfamiliar domains. You find the real problem and drive it forward.
Have product sense, design taste, and extreme attention to detail
Embed with our kernels team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.
Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.
Build execution environments where agents can verify their own work, with sandboxed access to simulators, EDA flows, compilers, profilers, and real hardware.
Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.
Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.
Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.
Exposure to chip development, kernels, hardware, or manufacturing.
Infrastructure, data engineering, or DevOps experience
Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration
Startup experience, especially through hypergrowth
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
$150K – $400K+
Plus Significant Equity
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
","descriptionPlain":"JOB SUMMARY\n\nOur Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.\n\nYou’ll work directly with our founders and embed with our kernels team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. You’ll work on harnesses, tool use, context, and memory, execution environments, and evals that let agents conduct long-running engineering work that is useful.\n\nThis role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.\n\n\nYOU MAY BE A GOOD FIT IF YOU\n\n - Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup\n\n - Have built agents for complex, multi-step tasks that people depend on, beyond calling an API: tool design, long-context management, evals, and failure analysis.\n\n - Are a strong software engineer who has built reliable systems others depend on, such as distributed systems, experiment infrastructure, or developer tooling.\n\n - Use coding agents heavily, read their transcripts closely, and change the system when an agent is confidently wrong.\n\n - Have high agency in unfamiliar domains. You find the real problem and drive it forward.\n\n - Have product sense, design taste, and extreme attention to detail\n\n\nKEY RESPONSIBILITIES\n\n - Embed with our kernels team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.\n\n - Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.\n\n - Build execution environments where agents can verify their own work, with sandboxed access to simulators, EDA flows, compilers, profilers, and real hardware.\n\n - Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.\n\n - Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.\n\n - Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.\n\n\nSTRONG CANDIDATES MAY ALSO HAVE\n\n - Exposure to chip development, kernels, hardware, or manufacturing.\n\n - Infrastructure, data engineering, or DevOps experience\n\n - Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration\n\n - Startup experience, especially through hypergrowth\n\n\nBENEFITS\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\nBASE COMPENSATION RANGE\n\n - $150K – $400K+\n\n - Plus Significant Equity\n\n\nHOW WE’RE DIFFERENT\n\nEtched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n\nABOUT ETCHED\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history."},{"id":"90dd2cb4-1c2b-4e9b-ac18-dd63d5d7ae79","title":"New Media, Experiences","department":"GTM","team":"GTM","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-09-23T20:39:38.690+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/90dd2cb4-1c2b-4e9b-ac18-dd63d5d7ae79","applyUrl":"https://jobs.ashbyhq.com/etched/90dd2cb4-1c2b-4e9b-ac18-dd63d5d7ae79/application","descriptionHtml":"Job Summary
We’re looking for someone to build and own Etched’s identity in the physical world. You will lead our efforts at industry conferences, Etched-sponsored recruiting events, product launch events, experiences hosted with our investors and ecosystem partners, and internal company events.
You will own events from concept through execution, including creative direction, production, logistics, vendor management, budgets, and measurement. You will partner closely with the founders and other creatives on the team to build exceptional experiences.
We are looking for someone with impeccable taste, a compulsive attention to detail, and the vision and execution ability to deliver curated and authentic in-person experiences.
Key Responsibilities
Cohosted events with investors: Lead event planning and logistics for events we cohost with our investors for top talent
Product launch keynotes: Build our flagship annual event, unveiling new technology through compelling storytelling, polished presentations, and live demonstrations
Company recruiting events: Lead event planning and logistics for open labs and large recruiting events, in partnership with the recruiting team
Conferences and public events: Define Etched’s brand presence at keystone industry conferences and events
Internal company events: Plan and execute offsites, town halls, quarterly full-team gatherings, and major celebrations such as boat parties and holiday parties
Guest speakers: Organize speaker events, including scheduling, logistics, and the attendee experience
You may be a good fit if you have (Must-have qualifications)
Have experience in events, experiential marketing, recruiting events, or event production
Have impeccable taste and a portfolio of thoughtful, highly polished experiences
Bring extraordinary attention to detail and remain composed when plans change
Have managed varied event formats and audiences, from intimate executive dinners to large conferences
Can balance creative ambition with budget discipline and operational precision
Are comfortable working directly with executives, engineers, recruiters, agencies, and external partners
Are willing to be occasionally travel
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience with technical recruiting, university, or executive events
Experience producing live demonstrations or events in lab and hardware environments
Relationships with leading venues, production agencies, and experiential partners
A track record of connecting events to measurable recruiting, brand, or business outcomes
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by billions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
About Etched
Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking a highly organized and detail-oriented Silicon Operations Program Manager to manage and optimize the end-to-end supply chain processes for silicon wafers and advanced packaging (e.g., CoWoS). This role is mission-critical to identify capacity constraints, ensure on-time and cost-efficient delivery of silicon components, and align with cross-functional teams to meet engineering and production milestones.
As part of our fast-paced, execution-driven team, you will work closely with internal engineering, external suppliers, and manufacturing partners to drive flawless execution from wafer start through bring-up and volume production.
Key responsibilities
Develop and maintain end-to-end production schedules for silicon wafers, interposers, and test/assembly, supporting phases from engineering builds to mass production.
Coordinate with foundries, OSATs (Outsourced Semiconductor Assembly and Test providers), and internal stakeholders to ensure production milestones and quality goals are met.
Collaborate with test engineering teams to coordinate ATE test program development, bring-up planning, and bench validation hardware readiness.
Track and forecast capacity planning across all silicon manufacturing stages, including wafer fabrication, component procurement, assembly, and test.
Supply Chain Coordination
Manage the procurement, delivery, and scheduling of key silicon components (e.g., wafers, interposers, substrates) to ensure optimal time-to-market.
Act as the operational lead between internal teams and suppliers, ensuring transparency and alignment across silicon, packaging, validation, and manufacturing.
Prepare for mass production ramp by ensuring material readiness, test infrastructure availability, and logistic support to mitigate bottlenecks or delays.
Forecasting & Reporting
Build and maintain demand forecasts for silicon and related components, based on build plans, yield assumptions, validation schedules, and market dynamics.
Share regular forecasts with supply chain partners and ensure proactive capacity allocation at foundries and OSATs.
Generate and maintain detailed dashboards and reports to track schedule adherence, capacity utilization, inventory status, and delivery performance for executive and technical stakeholders.
Supplier Management & Execution
Build strong supplier relationships while maintaining a results-oriented approach to driving commitments, resolving issues, and ensuring operational excellence.
Proactively monitor supplier progress, identify potential schedule risks or execution gaps, and drive timely corrective actions to prevent delays.
Lead regular supplier reviews, track action items to closure, and escalate critical issues as needed to ensure on-time delivery and program success.
You may be a good fit if you have
Bachelor’s degree in Supply Chain Management, Industrial Engineering, Operations Management, or a related field.
5+ years of experience in supply chain management, production planning, or operations within the semiconductor industry.
Deep understanding of the silicon lifecycle: tape-out, fabrication, packaging, test, bring-up, and validation
Proven track record working with foundries (TSMC, Samsung, etc.) and OSATs (ASE, Amkor, JCET, etc.).
Willingness to travel up to 25% for onsite supplier engagement, engineering builds, and production ramp support.
Strong understanding of: Silicon manufacturing processes, including wafer fabrication, dicing, bumping, CoWoS packaging, and testing;
Proficiency in using ERP systems (e.g., SAP, Oracle) and advanced Excel skills or analytics tools.
Experience with hardware validation cycles and managing silicon hardware logistics.
Exceptional program management and organizational skills with the ability to handle complex timelines and interdependencies.
Effective communicator and cross-functional leader across engineering, validation, and operations teams.
Strong candidates may also have
Experience working on advanced process nodes (e.g., 5nm, 3nm).
Familiarity with ATE platforms (Teradyne, Advantest) and test program infrastructure.
Prior experience managing silicon bring-up in hyperscale computing, AI/ML, or high-performance SoC environments.
PMP certification or equivalent project/program management training.
Familiarity with CoWoS or other 2.5D/3D packaging technologies.
Proven supplier management skills, with a demonstrated ability to drive external suppliers/partners to meet commitments, deliverables and milestones, and proactively resolve execution challenges in a fast-paced environment.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
How we’re different
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
","descriptionPlain":"About Etched\n\nEtched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking a highly organized and detail-oriented Silicon Operations Program Manager to manage and optimize the end-to-end supply chain processes for silicon wafers and advanced packaging (e.g., CoWoS). This role is mission-critical to identify capacity constraints, ensure on-time and cost-efficient delivery of silicon components, and align with cross-functional teams to meet engineering and production milestones.\n\nAs part of our fast-paced, execution-driven team, you will work closely with internal engineering, external suppliers, and manufacturing partners to drive flawless execution from wafer start through bring-up and volume production.\n\n\n\nKey responsibilities\n\n - Develop and maintain end-to-end production schedules for silicon wafers, interposers, and test/assembly, supporting phases from engineering builds to mass production.\n\n - Coordinate with foundries, OSATs (Outsourced Semiconductor Assembly and Test providers), and internal stakeholders to ensure production milestones and quality goals are met.\n\n - Collaborate with test engineering teams to coordinate ATE test program development, bring-up planning, and bench validation hardware readiness.\n\n - Track and forecast capacity planning across all silicon manufacturing stages, including wafer fabrication, component procurement, assembly, and test.\n\nSupply Chain Coordination\n\n - Manage the procurement, delivery, and scheduling of key silicon components (e.g., wafers, interposers, substrates) to ensure optimal time-to-market.\n\n - Act as the operational lead between internal teams and suppliers, ensuring transparency and alignment across silicon, packaging, validation, and manufacturing.\n\n - Prepare for mass production ramp by ensuring material readiness, test infrastructure availability, and logistic support to mitigate bottlenecks or delays.\n\nForecasting & Reporting\n\n - Build and maintain demand forecasts for silicon and related components, based on build plans, yield assumptions, validation schedules, and market dynamics.\n\n - Share regular forecasts with supply chain partners and ensure proactive capacity allocation at foundries and OSATs.\n\n - Generate and maintain detailed dashboards and reports to track schedule adherence, capacity utilization, inventory status, and delivery performance for executive and technical stakeholders.\n\nSupplier Management & Execution\n\n - Build strong supplier relationships while maintaining a results-oriented approach to driving commitments, resolving issues, and ensuring operational excellence.\n\n - Proactively monitor supplier progress, identify potential schedule risks or execution gaps, and drive timely corrective actions to prevent delays.\n\n - Lead regular supplier reviews, track action items to closure, and escalate critical issues as needed to ensure on-time delivery and program success.\n\n\n\nYou may be a good fit if you have\n\n - Bachelor’s degree in Supply Chain Management, Industrial Engineering, Operations Management, or a related field.\n\n - 5+ years of experience in supply chain management, production planning, or operations within the semiconductor industry.\n\n - Deep understanding of the silicon lifecycle: tape-out, fabrication, packaging, test, bring-up, and validation\n\n - Proven track record working with foundries (TSMC, Samsung, etc.) and OSATs (ASE, Amkor, JCET, etc.).\n\n - Willingness to travel up to 25% for onsite supplier engagement, engineering builds, and production ramp support.\n\n - Strong understanding of: Silicon manufacturing processes, including wafer fabrication, dicing, bumping, CoWoS packaging, and testing;\n\n - Proficiency in using ERP systems (e.g., SAP, Oracle) and advanced Excel skills or analytics tools.\n\n - Experience with hardware validation cycles and managing silicon hardware logistics.\n\n - Exceptional program management and organizational skills with the ability to handle complex timelines and interdependencies.\n\n - Effective communicator and cross-functional leader across engineering, validation, and operations teams.\n\n\n\nStrong candidates may also have\n\n - Experience working on advanced process nodes (e.g., 5nm, 3nm).\n\n - Familiarity with ATE platforms (Teradyne, Advantest) and test program infrastructure.\n\n - Prior experience managing silicon bring-up in hyperscale computing, AI/ML, or high-performance SoC environments.\n\n - PMP certification or equivalent project/program management training.\n\n - Familiarity with CoWoS or other 2.5D/3D packaging technologies.\n\n - Proven supplier management skills, with a demonstrated ability to drive external suppliers/partners to meet commitments, deliverables and milestones, and proactively resolve execution challenges in a fast-paced environment.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2k per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch + dinner in our office\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.\n\n\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.\n\n"},{"id":"5998298b-f29d-4f45-885d-d2876391606c","title":"Head of Legal / General Counsel","department":"Operations","team":"Operations","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-01T01:31:22.172+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/5998298b-f29d-4f45-885d-d2876391606c","applyUrl":"https://jobs.ashbyhq.com/etched/5998298b-f29d-4f45-885d-d2876391606c/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are looking for a Head of Legal / General Counsel to lead and scale Etched’s legal function. You will lead our existing team, hire and develop exceptional talent, and build the processes, automation, and operating standards that help the company move quickly as we scale. You will own our legal strategy and execution, serve as a key partner to the executive team, and lead our legal preparation for an IPO.This is a hands-on leadership role. We expect you to build a high-performing team while personally owning our most consequential negotiations and legal decisions. Success means making the company faster and more effective through clear judgment, strong execution, and systems that work.
Title will be determined based on experience. The General Counsel title is reserved for current GCs at similarly sized or larger companies, or senior law firm partners with substantial relevant experience.
Key responsibilities
Lead and grow our legal team: hire exceptional people, develop existing team members, and establish clear ownership, priorities, and performance expectations.
Build consistent legal practices across the company, including intake and prioritization, contract templates, negotiation playbooks, approval thresholds, and escalation paths. Enable teams to handle routine matters independently within clear guardrails.
Establish and manage service-level agreements (SLAs) for contract reviews and other legal requests. Track turnaround times, backlog, and outside counsel spend, and use those measures to improve execution without compromising quality.
Automate repeatable legal work, including contract workflows, document generation, and knowledge management. Apply AI tools thoughtfully, with appropriate human review and protections for confidential information.
Lead legal preparation for an IPO in partnership with Finance, the executive team, and outside counsel. Build the corporate governance, board and committee processes, disclosure practices, and legal infrastructure needed to operate as a public company.
Personally lead complex commercial negotiations, including customer agreements, supplier and manufacturing agreements, IP licenses, and strategic partnerships. Work directly with engineering, production, finance, and commercial teams to understand the underlying technical and business requirements.
Advise the executive team and board on financings, strategic transactions, equity compensation, corporate governance, and material legal risks. Give clear recommendations that account for both legal exposure and business objectives.
Oversee employment, intellectual property, regulatory compliance, and disputes across our U.S. and international operations, drawing on specialist counsel where appropriate.
Own the legal budget and outside counsel relationships. Decide what to build in-house, hold external partners to high standards, and ensure spending produces clear value.
You may be a good fit if you have (Must-have qualifications)
Substantial experience advising high-growth technology companies, in-house or at a leading law firm.
A track record of hiring, developing, and leading high-performing legal teams.
Deep expertise in commercial negotiations, corporate governance, and financings.
Experience building legal processes that improve speed and quality without adding bureaucracy.
Strong business judgment, concise communication, and a willingness to personally own difficult work across a broad scope.
A JD and active bar admission; California preferred.
Strong candidates may also have experience with (Nice-to-have qualifications)
Taking a technology company through an IPO and supporting public-company operations.
Leading legal work for major financings, acquisitions, or other strategic transactions at a rapidly scaling company.
Working in AI, hardware, semiconductors, or advanced manufacturing, including negotiating agreements involving IP rights, supply commitments, hardware warranties, performance specifications, and technical acceptance criteria.
Building legal operations infrastructure, implementing contract lifecycle management systems, or deploying AI and automation in legal workflows.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
","descriptionPlain":"About Etched\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\nWe are looking for a Head of Legal / General Counsel to lead and scale Etched’s legal function. You will lead our existing team, hire and develop exceptional talent, and build the processes, automation, and operating standards that help the company move quickly as we scale. You will own our legal strategy and execution, serve as a key partner to the executive team, and lead our legal preparation for an IPO.This is a hands-on leadership role. We expect you to build a high-performing team while personally owning our most consequential negotiations and legal decisions. Success means making the company faster and more effective through clear judgment, strong execution, and systems that work.\n\nTitle will be determined based on experience. The General Counsel title is reserved for current GCs at similarly sized or larger companies, or senior law firm partners with substantial relevant experience.\n\n\n\nKey responsibilities\n\n - Lead and grow our legal team: hire exceptional people, develop existing team members, and establish clear ownership, priorities, and performance expectations.\n\n - Build consistent legal practices across the company, including intake and prioritization, contract templates, negotiation playbooks, approval thresholds, and escalation paths. Enable teams to handle routine matters independently within clear guardrails.\n\n - Establish and manage service-level agreements (SLAs) for contract reviews and other legal requests. Track turnaround times, backlog, and outside counsel spend, and use those measures to improve execution without compromising quality.\n\n - Automate repeatable legal work, including contract workflows, document generation, and knowledge management. Apply AI tools thoughtfully, with appropriate human review and protections for confidential information.\n\n - Lead legal preparation for an IPO in partnership with Finance, the executive team, and outside counsel. Build the corporate governance, board and committee processes, disclosure practices, and legal infrastructure needed to operate as a public company.\n\n - Personally lead complex commercial negotiations, including customer agreements, supplier and manufacturing agreements, IP licenses, and strategic partnerships. Work directly with engineering, production, finance, and commercial teams to understand the underlying technical and business requirements.\n\n - Advise the executive team and board on financings, strategic transactions, equity compensation, corporate governance, and material legal risks. Give clear recommendations that account for both legal exposure and business objectives.\n\n - Oversee employment, intellectual property, regulatory compliance, and disputes across our U.S. and international operations, drawing on specialist counsel where appropriate.\n\n - Own the legal budget and outside counsel relationships. Decide what to build in-house, hold external partners to high standards, and ensure spending produces clear value.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - Substantial experience advising high-growth technology companies, in-house or at a leading law firm.\n\n - A track record of hiring, developing, and leading high-performing legal teams.\n\n - Deep expertise in commercial negotiations, corporate governance, and financings.\n\n - Experience building legal processes that improve speed and quality without adding bureaucracy.\n\n - Strong business judgment, concise communication, and a willingness to personally own difficult work across a broad scope.\n\n - A JD and active bar admission; California preferred.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Taking a technology company through an IPO and supporting public-company operations.\n\n - Leading legal work for major financings, acquisitions, or other strategic transactions at a rapidly scaling company.\n\n - Working in AI, hardware, semiconductors, or advanced manufacturing, including negotiating agreements involving IP rights, supply commitments, hardware warranties, performance specifications, and technical acceptance criteria.\n\n - Building legal operations infrastructure, implementing contract lifecycle management systems, or deploying AI and automation in legal workflows.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.\n\n\n\nWe are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed."},{"id":"b1f8b069-772f-49f0-8f9d-ef03c92b73b7","title":"Inventory Manager ","department":"Production","team":"Production","employmentType":"FullTime","location":"Taipei","secondaryLocations":[],"publishedAt":"2026-10-07T19:10:33.036+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"Taiwan","addressCountry":"Taiwan","addressLocality":"Taipei"}},"jobUrl":"https://jobs.ashbyhq.com/etched/b1f8b069-772f-49f0-8f9d-ef03c92b73b7","applyUrl":"https://jobs.ashbyhq.com/etched/b1f8b069-772f-49f0-8f9d-ef03c92b73b7/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As an Inventory Manager at Etched, you will own the end-to-end strategy, control, and execution of our contract manufacturer (CM) and 3PL inventory operations. In this role, you will lead excess and obsolescence (E&O) mitigation, champion inventory audit and reconciliation processes across global sites, and build robust dashboards to deliver high-precision visibility for leadership and Finance. Operating at the intersection of supply chain operations and financial stewardship, you will play a critical role in optimizing capital efficiency and ensuring operational rigour as Etched scales frontier AI hardware.
Key Responsibilities
Inventory Analysis and E&O Mitigation
Review slow-moving and aged inventory on a regular basis to identify E&O risks, and drive timely disposition decisions in partnership with CMs and internal stakeholders.
Analyze CM demand waterfall reports and lead deep-dive root cause analysis of E&O drivers, such as forecast changes, MOQ/lead time constraints, EOL, and engineering changes.
Partner with CMs, suppliers, internal teams, and spot market channels to mitigate E&O exposure through supply reallocation across CMs, reuse on new programs, rework, vendor returns or cancellations, open-market resale, or scrap as a last resort.
Inventory Audit and Control
Coordinate with CMs and 3PL warehouses to fulfill consigned inventory requirements, and maintain complete, auditable transaction records for all inventory movements to ensure full traceability and support reconciliation.
Conduct on-site audits and physical counts of consigned and excess inventory held at CM sites and 3PL warehouses to ensure inventory accuracy and proper control.
Lead periodic three-way reconciliation among NetSuite, 3PL warehouse records, and CM inventory reports, and investigate and resolve any discrepancies in a timely manner.
Reporting and Financial Partnership
Build and maintain inventory dashboards and KPIs, including inventory turns, aging, E&O value, and inventory accuracy.
Deliver regular inventory health reports to management with actionable recommendations to reduce E&O exposure.
Partner with Finance on inventory valuation, E&O reserves, write-offs, and quarterly/annual audits.
CM Build Validation and Cost Accounting Support
Review and validate CM as-built reports for accuracy, including component consumption, build quantities, and lot/serial traceability, against BOMs and work orders.
Reconcile CM build and consumption data to NetSuite (work orders, assembly builds, component issues) and resolve variances before month-end close.
Validate CM invoices and charges (components, MVA/labor, and E&O claims) against agreed pricing and actual builds.
Serve as the primary liaison between Cost Accounting and the CMs regarding BOM and cost discrepancies, scrap/yield losses.
You may be a good fit if you have (Must-have qualifications)
5+ years of experience in supply chain, inventory management, or material program management within electronics manufacturing or big tech.
Proven track record of managing contract manufacturers (CMs) and 3PL warehouses, including conducting physical audits, 3-way reconciliations, and consigned inventory controls.
Strong analytical capability to perform E&O root-cause analysis, drive inventory disposition strategies, and build inventory health dashboards/KPIs.
Strong candidates may also have experience with (Nice-to-have qualifications)
Experience working with ERP systems such as NetSuite, SAP, or Kinaxis for inventory transaction tracking and financial reconciliation.
Background partnering with Finance and Cost Accounting on inventory valuation, E&O reserves, and audit readiness.
Direct experience with server rack hardware, complex electronics, or fast-paced NPI-to-production hardware environments.
Benefits
Competitive compensation packages, including generous equity packages
Comprehensive insurance coverage and other top-of-market benefits
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nAs an Inventory Manager at Etched, you will own the end-to-end strategy, control, and execution of our contract manufacturer (CM) and 3PL inventory operations. In this role, you will lead excess and obsolescence (E&O) mitigation, champion inventory audit and reconciliation processes across global sites, and build robust dashboards to deliver high-precision visibility for leadership and Finance. Operating at the intersection of supply chain operations and financial stewardship, you will play a critical role in optimizing capital efficiency and ensuring operational rigour as Etched scales frontier AI hardware.\n\n\n\nKey Responsibilities\n\n - Inventory Analysis and E&O Mitigation\n \n - Review slow-moving and aged inventory on a regular basis to identify E&O risks, and drive timely disposition decisions in partnership with CMs and internal stakeholders.\n \n - Analyze CM demand waterfall reports and lead deep-dive root cause analysis of E&O drivers, such as forecast changes, MOQ/lead time constraints, EOL, and engineering changes.\n \n - Partner with CMs, suppliers, internal teams, and spot market channels to mitigate E&O exposure through supply reallocation across CMs, reuse on new programs, rework, vendor returns or cancellations, open-market resale, or scrap as a last resort.\n\n - Inventory Audit and Control\n \n - Coordinate with CMs and 3PL warehouses to fulfill consigned inventory requirements, and maintain complete, auditable transaction records for all inventory movements to ensure full traceability and support reconciliation.\n \n - Conduct on-site audits and physical counts of consigned and excess inventory held at CM sites and 3PL warehouses to ensure inventory accuracy and proper control.\n \n - Lead periodic three-way reconciliation among NetSuite, 3PL warehouse records, and CM inventory reports, and investigate and resolve any discrepancies in a timely manner.\n\n - Reporting and Financial Partnership\n \n - Build and maintain inventory dashboards and KPIs, including inventory turns, aging, E&O value, and inventory accuracy.\n \n - Deliver regular inventory health reports to management with actionable recommendations to reduce E&O exposure.\n \n - Partner with Finance on inventory valuation, E&O reserves, write-offs, and quarterly/annual audits.\n\n - CM Build Validation and Cost Accounting Support\n \n - Review and validate CM as-built reports for accuracy, including component consumption, build quantities, and lot/serial traceability, against BOMs and work orders.\n \n - Reconcile CM build and consumption data to NetSuite (work orders, assembly builds, component issues) and resolve variances before month-end close.\n \n - Validate CM invoices and charges (components, MVA/labor, and E&O claims) against agreed pricing and actual builds.\n \n - Serve as the primary liaison between Cost Accounting and the CMs regarding BOM and cost discrepancies, scrap/yield losses.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - 5+ years of experience in supply chain, inventory management, or material program management within electronics manufacturing or big tech.\n\n - Proven track record of managing contract manufacturers (CMs) and 3PL warehouses, including conducting physical audits, 3-way reconciliations, and consigned inventory controls.\n\n - Strong analytical capability to perform E&O root-cause analysis, drive inventory disposition strategies, and build inventory health dashboards/KPIs.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Experience working with ERP systems such as NetSuite, SAP, or Kinaxis for inventory transaction tracking and financial reconciliation.\n\n - Background partnering with Finance and Cost Accounting on inventory valuation, E&O reserves, and audit readiness.\n\n - Direct experience with server rack hardware, complex electronics, or fast-paced NPI-to-production hardware environments.\n\n\n\nBenefits\n\n - Competitive compensation packages, including generous equity packages\n\n - Comprehensive insurance coverage and other top-of-market benefits\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose and Taipei, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"bf1601cc-f33a-408c-bff8-a64bab4fe3f2","title":"SMT Line Lead","department":"Operations","team":"Operations","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-09T18:08:05.579+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/bf1601cc-f33a-408c-bff8-a64bab4fe3f2","applyUrl":"https://jobs.ashbyhq.com/etched/bf1601cc-f33a-408c-bff8-a64bab4fe3f2/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
About the Role
The SMT Line Lead runs and operates Etched's in-house SMT line, from incoming material to finished, inspected modules. You'll build and lead the line's operations team (incoming quality, material handling and logistics, quality and test, machine operators, and rework), and turn a newly installed line into a reliable, high-yield operation. You'll work closely with our process engineering, DFM, equipment, and procurement teams, who own process setup, equipment, and sourcing.
Key Responsibilities
Line operations: Own day-to-day operation of a US-based SMT line assembling Etched's modules, for both NPI and mass production.
Team leadership: Hire, lead, and develop the line's operations team: incoming quality (IQC), material handlers, quality and test technicians, machine operators, and rework technicians.
Shift scheduling: Own shift schedules and coverage for full-time employees and contractors, including overtime, cross-training, and backfill. Manage contractor headcount with our staffing partners.
Training: Build training and certification programs (IPC-A-610, J-STD-001, ESD, MSD handling) and keep a skills matrix so every station has trained backups.
Build scheduling: Turn program priorities into a daily and weekly build schedule, coordinate changeovers, and resequence quickly when parts or priorities change.
Material flow: Own the flow from receiving to finished goods: incoming inspection, kitting, feeder setup and staging, line-side inventory, WIP, and finished-goods packing and storage.
Inventory and traceability: Work with our supply chain and procurement teams to ensure we can meet build targets. Collaborate with our inventory team to ensure material availability and quality.
Quality and yield: Run the inspection flow (IQC, SPI, AOI, AXI, test) and the rework operation, including ASIC rework. Partner with process engineering to debug yield issues and close out corrective actions.
Processes: Define how the line runs: work instructions, travelers, shift handoffs, nonconforming material disposition, and ESD, 5S, and safety programs.
Reporting: Report line status, schedule attainment, yield, scrap, and inventory health daily, and raise risks early.
Scaling: Collaborate with the engineering and capital projects teams to bring up future lines on world-class timelines as Etched scales to gigawatts worth of modules.
Help our agentic manufacturing team extract data from the production line and set up an auto-research loop to improve SMT throughput and yield.
Lead the way in integrating frontier AI technology into SMT operations.
What we need to see:
Bachelor's degree in a STEM field or comparable experience.
Minimum of five years of experience in electronics manufacturing (PCBA/SMT), with at least two years leading production teams.
Hands-on experience running an SMT line day to day: build scheduling, kitting, feeder setup, changeovers, and line-side inventory.
Experience managing mixed teams of full-time employees and contractors across shifts.
Working knowledge of SMT inspection and quality (SPI, AOI, X-ray), IPC-A-610 and J-STD-001, and MSD handling.
Familiarity with SMT process validation and characterization, enough to partner closely with process engineering on yield.
Track record of building processes, training programs, and metrics from scratch.
Passionate about automating parts of the job with agentic AI models, and willing to learn about this on the job.
Strongly preferred:
Experience leading an SMT line at a fast-growing hardware startup.
Has brought a new SMT line from first build to stable production.
Experience with complex, high-value assemblies (large BGAs, server or accelerator boards) and BGA rework.
Experience with MES, traceability, or inventory systems.
We encourage you to apply even if you do not believe you meet every single qualification.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
Compensation Range: $250,000 - $350,000 with significant equity.
We are a fully in-person team in San Jose (Santana Row), and the SMT line is located in nearby Milpitas. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nAbout the Role\n\nThe SMT Line Lead runs and operates Etched's in-house SMT line, from incoming material to finished, inspected modules. You'll build and lead the line's operations team (incoming quality, material handling and logistics, quality and test, machine operators, and rework), and turn a newly installed line into a reliable, high-yield operation. You'll work closely with our process engineering, DFM, equipment, and procurement teams, who own process setup, equipment, and sourcing.\n\n\n\nKey Responsibilities\n\n - Line operations: Own day-to-day operation of a US-based SMT line assembling Etched's modules, for both NPI and mass production.\n\n - Team leadership: Hire, lead, and develop the line's operations team: incoming quality (IQC), material handlers, quality and test technicians, machine operators, and rework technicians.\n\n - Shift scheduling: Own shift schedules and coverage for full-time employees and contractors, including overtime, cross-training, and backfill. Manage contractor headcount with our staffing partners.\n\n - Training: Build training and certification programs (IPC-A-610, J-STD-001, ESD, MSD handling) and keep a skills matrix so every station has trained backups.\n\n - Build scheduling: Turn program priorities into a daily and weekly build schedule, coordinate changeovers, and resequence quickly when parts or priorities change.\n\n - Material flow: Own the flow from receiving to finished goods: incoming inspection, kitting, feeder setup and staging, line-side inventory, WIP, and finished-goods packing and storage.\n\n - Inventory and traceability: Work with our supply chain and procurement teams to ensure we can meet build targets. Collaborate with our inventory team to ensure material availability and quality.\n\n - Quality and yield: Run the inspection flow (IQC, SPI, AOI, AXI, test) and the rework operation, including ASIC rework. Partner with process engineering to debug yield issues and close out corrective actions.\n\n - Processes: Define how the line runs: work instructions, travelers, shift handoffs, nonconforming material disposition, and ESD, 5S, and safety programs.\n\n - Reporting: Report line status, schedule attainment, yield, scrap, and inventory health daily, and raise risks early.\n\n - Scaling: Collaborate with the engineering and capital projects teams to bring up future lines on world-class timelines as Etched scales to gigawatts worth of modules.\n\n - Help our agentic manufacturing team extract data from the production line and set up an auto-research loop to improve SMT throughput and yield.\n\n - Lead the way in integrating frontier AI technology into SMT operations.\n\n\n\nWhat we need to see:\n\n - Bachelor's degree in a STEM field or comparable experience.\n\n - Minimum of five years of experience in electronics manufacturing (PCBA/SMT), with at least two years leading production teams.\n\n - Hands-on experience running an SMT line day to day: build scheduling, kitting, feeder setup, changeovers, and line-side inventory.\n\n - Experience managing mixed teams of full-time employees and contractors across shifts.\n\n - Working knowledge of SMT inspection and quality (SPI, AOI, X-ray), IPC-A-610 and J-STD-001, and MSD handling.\n\n - Familiarity with SMT process validation and characterization, enough to partner closely with process engineering on yield.\n\n - Track record of building processes, training programs, and metrics from scratch.\n\n - Passionate about automating parts of the job with agentic AI models, and willing to learn about this on the job.\n\n\n\nStrongly preferred:\n\n - Experience leading an SMT line at a fast-growing hardware startup.\n\n - Has brought a new SMT line from first build to stable production.\n\n - Experience with complex, high-value assemblies (large BGAs, server or accelerator boards) and BGA rework.\n\n - Experience with MES, traceability, or inventory systems.\n\nWe encourage you to apply even if you do not believe you meet every single qualification.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n \n \n\nCompensation Range: $250,000 - $350,000 with significant equity.\n\n\n\nWe are a fully in-person team in San Jose (Santana Row), and the SMT line is located in nearby Milpitas. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"2a26154f-991b-4ed2-b189-555ced916791","title":"SMT Process Engineer (Greenfield Factory)","department":"Production","team":"Production","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-09T21:59:05.316+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/2a26154f-991b-4ed2-b189-555ced916791","applyUrl":"https://jobs.ashbyhq.com/etched/2a26154f-991b-4ed2-b189-555ced916791/application","descriptionHtml":"Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest-growing industry in history.
Etched is seeking an SMT Process Engineer to help establish our first PCB assembly (PCBA) manufacturing facility. You will be part of the core team selecting, installing, qualifying, and launching our first SMT production line, with hands-on ownership of manufacturing readiness from initial setup through volume production.
This role spans equipment programming, process development, tooling, operator training, and engineering build support. You will also provide technical direction to one SMT Engineering Technician, ensuring equipment and lab readiness to support new product introduction and production schedules. This is an opportunity to build an SMT operation from the ground up and establish the processes and standards that support future growth.
Launch our first SMT line: Support equipment selection, define technical specifications and acceptance criteria, and coordinate installation with vendors and facilities teams.
Qualify equipment for production: Support Factory Acceptance Tests (FAT) and Site Acceptance Tests (SAT), and develop and execute equipment startup, validation, and qualification plans.
Own SMT programming and process development: Develop and optimize programs for solder paste printers, SPI, pick-and-place, AOI, AXI where applicable, and depanelization equipment. Maintain component libraries, machine databases, and standard setup procedures.
Establish tooling readiness: Define, procure, and qualify stencils, PCB support tooling, carrier pallets, vacuum fixtures, and depanelization and rework fixtures ahead of engineering builds.
Support builds from prototype through production: Lead SMT support for prototype, EVT, DVT, PVT, and production builds. Troubleshoot process and programming issues, support engineering changes and product transfers, and minimize downtime.
Develop manufacturing standards: Create equipment operating procedures, standard work instructions, and process controls. Support facility readiness, including utilities, ESD controls, and traceability.
Train and certify operators: Develop training materials and train operators and technicians on equipment operation, feeder setup, program selection, changeovers, basic troubleshooting, and process controls.
Provide technical leadership: Coach and prioritize work for one SMT Engineering Technician covering preventive maintenance, calibration, spare parts, vendor service, equipment qualification, and engineering lab support.
Ensure process and lab readiness: Guide reflow profile verification, process characterization, and sample preparation for failure analysis to support engineering and production needs.
Drive continuous improvement: Improve first-pass yield (FPY), throughput, and overall equipment effectiveness (OEE). Reduce setup and changeover time, optimize placement strategies, and standardize best practices across SMT operations.
A bachelor’s degree in engineering or equivalent practical experience.
10+ years of SMT manufacturing engineering experience.
Demonstrated experience supporting SMT line installation, commissioning, or factory startup.
Experience with equipment acceptance testing, qualification, and production ramp-up.
Hands-on experience programming and optimizing SMT equipment.
Experience supporting PCBA manufacturing from prototype builds through high-volume production.
Leading technicians or small technical teams.
Medical, dental, and vision packages with generous premium coverage.
$500 per month credit for waiving medical benefits.
Housing subsidy of $2,500 per month for those living within walking distance of the office.
Relocation support for those moving to San Jose (Santana Row).
Various wellness benefits covering fitness, mental health, and more.
Daily lunch and dinner in our office.
Unlimited compute budget, subject to ROI justification.
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row) and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"ABOUT ETCHED\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest-growing industry in history.\n\n\n\n\nJOB SUMMARY\n\nEtched is seeking an SMT Process Engineer to help establish our first PCB assembly (PCBA) manufacturing facility. You will be part of the core team selecting, installing, qualifying, and launching our first SMT production line, with hands-on ownership of manufacturing readiness from initial setup through volume production.\n\nThis role spans equipment programming, process development, tooling, operator training, and engineering build support. You will also provide technical direction to one SMT Engineering Technician, ensuring equipment and lab readiness to support new product introduction and production schedules. This is an opportunity to build an SMT operation from the ground up and establish the processes and standards that support future growth.\n\n\n\n\nKEY RESPONSIBILITIES\n\n - Launch our first SMT line: Support equipment selection, define technical specifications and acceptance criteria, and coordinate installation with vendors and facilities teams.\n\n - Qualify equipment for production: Support Factory Acceptance Tests (FAT) and Site Acceptance Tests (SAT), and develop and execute equipment startup, validation, and qualification plans.\n\n - Own SMT programming and process development: Develop and optimize programs for solder paste printers, SPI, pick-and-place, AOI, AXI where applicable, and depanelization equipment. Maintain component libraries, machine databases, and standard setup procedures.\n\n - Establish tooling readiness: Define, procure, and qualify stencils, PCB support tooling, carrier pallets, vacuum fixtures, and depanelization and rework fixtures ahead of engineering builds.\n\n - Support builds from prototype through production: Lead SMT support for prototype, EVT, DVT, PVT, and production builds. Troubleshoot process and programming issues, support engineering changes and product transfers, and minimize downtime.\n\n - Develop manufacturing standards: Create equipment operating procedures, standard work instructions, and process controls. Support facility readiness, including utilities, ESD controls, and traceability.\n\n - Train and certify operators: Develop training materials and train operators and technicians on equipment operation, feeder setup, program selection, changeovers, basic troubleshooting, and process controls.\n\n - Provide technical leadership: Coach and prioritize work for one SMT Engineering Technician covering preventive maintenance, calibration, spare parts, vendor service, equipment qualification, and engineering lab support.\n\n - Ensure process and lab readiness: Guide reflow profile verification, process characterization, and sample preparation for failure analysis to support engineering and production needs.\n\n - Drive continuous improvement: Improve first-pass yield (FPY), throughput, and overall equipment effectiveness (OEE). Reduce setup and changeover time, optimize placement strategies, and standardize best practices across SMT operations.\n\n\n\n\nYOU MAY BE A GOOD FIT IF YOU HAVE (MUST-HAVE QUALIFICATIONS)\n\n - A bachelor’s degree in engineering or equivalent practical experience.\n\n - 10+ years of SMT manufacturing engineering experience.\n\n - Demonstrated experience supporting SMT line installation, commissioning, or factory startup.\n\n - Experience with equipment acceptance testing, qualification, and production ramp-up.\n\n - Hands-on experience programming and optimizing SMT equipment.\n\n - Experience supporting PCBA manufacturing from prototype builds through high-volume production.\n\n\n\n\nSTRONG CANDIDATES MAY ALSO HAVE EXPERIENCE WITH (NICE-TO-HAVE QUALIFICATIONS)\n\n - Leading technicians or small technical teams.\n\n\n\n\nBENEFITS\n\n - Medical, dental, and vision packages with generous premium coverage.\n\n - $500 per month credit for waiving medical benefits.\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office.\n\n - Relocation support for those moving to San Jose (Santana Row).\n\n - Various wellness benefits covering fitness, mental health, and more.\n\n - Daily lunch and dinner in our office.\n\n - Unlimited compute budget, subject to ROI justification.\n\n\n\n\nHOW WE’RE DIFFERENT\n\nEtched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose (Santana Row) and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"0338e794-38f8-41a0-a4bb-b764cec2bba5","title":"Facilities Engineering Operations Lead, Data Center","department":"Operations","team":"Operations","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-13T03:30:58.680+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/0338e794-38f8-41a0-a4bb-b764cec2bba5","applyUrl":"https://jobs.ashbyhq.com/etched/0338e794-38f8-41a0-a4bb-b764cec2bba5/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is building a new category of AI hardware: frontier inference clusters. As our Facilities Engineering Operations Lead, you will own day-to-day operations of our AI data center: uptime, incident response, and escalation across power, cooling, and the white space. You'll be the first hire in this function and will build the operating system from scratch, including procedures, maintenance programs, on-call, and alarming, then turn it into the playbook we copy to every site that follows.
Key Responsibilities
Own day-to-day data center operations end to end: uptime, incident response, and escalation for power, cooling, and the white space.
Build the operating system from scratch: SOPs, MOPs, and EOPs; change management; preventive and predictive maintenance schedules; shift coverage and on-call; incident and RCA process.
Define SLOs and response plans for outage events at the fleet, rack, and server level.
Run the liquid cooling plant for high-density racks, including CDUs, secondary fluid loops, water chemistry and filtration, leak detection, and flow and inlet-temperature monitoring.
Own electrical operations, including switchgear, busway and PDUs, power connector topology, load balancing across racks, and lockout/tagout (LOTO) and arc-flash safety.
Manage electrical, mechanical, CDU OEM, and fire/life safety vendors and contractors: scope work, review quotes, and oversee onsite work.
Stand up monitoring and alarming with engineering across BMS/DCIM and rack and CDU telemetry, so problems reach the right person within minutes, not hours.
Run rack deployment logistics: receiving, staging, install, commissioning, and turn-up handoff to the hardware and lab teams, plus decommissioning and RMA flows.
Track spares and critical parts inventory for facility equipment.
Report operational metrics to leadership, including uptime, PUE, incidents, open risks, and capacity headroom.
Help build the team, starting with facilities engineering technicians and a BMS specialist.
Design processes and site-readiness checklists that can be replicated at our next sites.
You may be a good fit if you have
4-8+ years in critical facilities and data center operations, including time as a Lead or Senior Critical Facilities Engineer or a single-site Facilities Manager
Hands-on experience operating liquid cooling in production (CDUs, direct-to-chip / DLC, secondary fluid loops)
Deep working knowledge of data center electrical distribution (switchgear, UPS, busway, PDUs) and safe work practices (LOTO, arc flash, NFPA 70E)
Experience writing and drilling SOPs, MOPs, and EOPs, and running change management and maintenance programs
Experience leading incident response and root cause analysis
A track record of managing mechanical, electrical, and fire/life safety vendors
Working knowledge of BMS, DCIM, and power monitoring systems
Readiness to own the whole site, not just a shift or a system
Deeply creative and able to think from first principles
Strong candidates may also have experience with
Running high-density GPU / AI infrastructure at a neocloud, hyperscaler, or colocation provider
Standing up a new site or data hall, including commissioning and turn-up
Building and staffing 24/7 operations and on-call rotations
Familiarity with modern ML and LLM model architectures
Ability to program with Python or another scripting language
Familiarity with AI tools for programming/coding
Startup experience or comfort working in fast-paced environments
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we're different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
This role is onsite in the Bay Area at our data center and Milpitas sites, with regular time at our San Jose headquarters.
Compensation Range
$200,000 - $300,000, plus equity
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
We are seeking an Equipment Technician to maintain, troubleshoot, and support our Surface Mount Technology (SMT) production equipment. This hands-on role combines equipment maintenance with day-to-day process support to improve uptime, product quality, and manufacturing efficiency.
You will work closely with Production, Process Engineering, and Quality to resolve equipment issues, support product changeovers and new product introductions, and prevent recurring failures. The ideal candidate brings practical troubleshooting skills, experience with automated manufacturing equipment, and a disciplined approach to safe, reliable production.
Key Responsibilities
Maintain SMT equipment: Perform preventive and corrective maintenance on solder paste printers, solder paste inspection (SPI) systems, pick-and-place machines, reflow ovens, automated optical inspection (AOI) systems, conveyors, and board handling equipment.
Troubleshoot equipment failures: Diagnose and repair mechanical, electrical, pneumatic, sensor, and equipment control faults. Restore equipment safely, document root causes and corrective actions, and coordinate with suppliers or service engineers when needed.
Manage equipment readiness: Maintain feeders, nozzles, tooling, and wear components. Perform equipment checks, adjustments, and calibration activities according to approved procedures, maintain accurate service records, and help manage critical spare parts.
Support production setup and changeovers: Assist with line setup, first-piece verification, and new product introduction. Verify feeders, component setup, tooling, and approved machine programs before production.
Support SMT process performance: Monitor printing, placement, and reflow performance to identify process drift and recurring defects, including insufficient solder, bridging, misalignment, tombstoning, and missing components.
Assist with process troubleshooting: Use equipment alarms, inspection results, and production data to investigate issues and verify corrective actions. Support reflow profile verification and parameter adjustments under engineering direction, escalating changes that require approval.
Improve equipment reliability: Support root cause investigations and identify opportunities to reduce downtime, repeat failures, changeover time, and scrap.
Support operators and shift handovers: Train operators on routine equipment care, basic troubleshooting, and correct setup practices. Clearly communicate equipment status, completed work, and outstanding issues across shifts.
Maintain a safe manufacturing environment: Follow electrostatic discharge (ESD) controls, lockout/tagout procedures, machine safety requirements, personal protective equipment requirements, and housekeeping standards.
You may be a good fit if you have (Must-have qualifications)
A technical certificate, diploma, apprenticeship, or equivalent practical experience in electronics, electrical engineering, mechatronics, automation, or a related discipline.
Hands-on experience maintaining or troubleshooting SMT equipment or comparable automated manufacturing equipment.
Working knowledge of SMT assembly processes and common production defects.
The ability to read equipment manuals, electrical schematics, and mechanical drawings and use diagnostic tools and test equipment effectively.
Strong attention to detail, including the ability to follow procedures, document work accurately, and prioritize production support needs.
Good communication skills and the ability to work independently and collaboratively with Production, Engineering, and Quality.
The ability to perform hands-on maintenance involving standing, reaching, and accessing equipment, with reasonable accommodations as applicable, and availability for occasional overtime or weekend support.
Strong candidates may also have experience with (Nice-to-have qualifications)
Three or more years of SMT equipment maintenance or process support.
Equipment from Fuji, Heller, Koh Young, or Omron.
IPC-A-610 acceptance criteria and J-STD-001 requirements.
Maintenance management systems, root cause analysis, and equipment performance metrics.
PLC diagnostics, servo systems, industrial networks, or machine vision.
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
","descriptionPlain":"About Etched\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.\n\n\n\nJob Summary\n\nWe are seeking an Equipment Technician to maintain, troubleshoot, and support our Surface Mount Technology (SMT) production equipment. This hands-on role combines equipment maintenance with day-to-day process support to improve uptime, product quality, and manufacturing efficiency.\n\nYou will work closely with Production, Process Engineering, and Quality to resolve equipment issues, support product changeovers and new product introductions, and prevent recurring failures. The ideal candidate brings practical troubleshooting skills, experience with automated manufacturing equipment, and a disciplined approach to safe, reliable production.\n\n\n\nKey Responsibilities\n\n - Maintain SMT equipment: Perform preventive and corrective maintenance on solder paste printers, solder paste inspection (SPI) systems, pick-and-place machines, reflow ovens, automated optical inspection (AOI) systems, conveyors, and board handling equipment.\n\n - Troubleshoot equipment failures: Diagnose and repair mechanical, electrical, pneumatic, sensor, and equipment control faults. Restore equipment safely, document root causes and corrective actions, and coordinate with suppliers or service engineers when needed.\n\n - Manage equipment readiness: Maintain feeders, nozzles, tooling, and wear components. Perform equipment checks, adjustments, and calibration activities according to approved procedures, maintain accurate service records, and help manage critical spare parts.\n\n - Support production setup and changeovers: Assist with line setup, first-piece verification, and new product introduction. Verify feeders, component setup, tooling, and approved machine programs before production.\n\n - Support SMT process performance: Monitor printing, placement, and reflow performance to identify process drift and recurring defects, including insufficient solder, bridging, misalignment, tombstoning, and missing components.\n\n - Assist with process troubleshooting: Use equipment alarms, inspection results, and production data to investigate issues and verify corrective actions. Support reflow profile verification and parameter adjustments under engineering direction, escalating changes that require approval.\n\n - Improve equipment reliability: Support root cause investigations and identify opportunities to reduce downtime, repeat failures, changeover time, and scrap.\n\n - Support operators and shift handovers: Train operators on routine equipment care, basic troubleshooting, and correct setup practices. Clearly communicate equipment status, completed work, and outstanding issues across shifts.\n\n - Maintain a safe manufacturing environment: Follow electrostatic discharge (ESD) controls, lockout/tagout procedures, machine safety requirements, personal protective equipment requirements, and housekeeping standards.\n\n\n\nYou may be a good fit if you have (Must-have qualifications)\n\n - A technical certificate, diploma, apprenticeship, or equivalent practical experience in electronics, electrical engineering, mechatronics, automation, or a related discipline.\n\n - Hands-on experience maintaining or troubleshooting SMT equipment or comparable automated manufacturing equipment.\n\n - Working knowledge of SMT assembly processes and common production defects.\n\n - The ability to read equipment manuals, electrical schematics, and mechanical drawings and use diagnostic tools and test equipment effectively.\n\n - Strong attention to detail, including the ability to follow procedures, document work accurately, and prioritize production support needs.\n\n - Good communication skills and the ability to work independently and collaboratively with Production, Engineering, and Quality.\n\n - The ability to perform hands-on maintenance involving standing, reaching, and accessing equipment, with reasonable accommodations as applicable, and availability for occasional overtime or weekend support.\n\n\n\nStrong candidates may also have experience with (Nice-to-have qualifications)\n\n - Three or more years of SMT equipment maintenance or process support.\n\n - Equipment from Fuji, Heller, Koh Young, or Omron.\n\n - IPC-A-610 acceptance criteria and J-STD-001 requirements.\n\n - Maintenance management systems, root cause analysis, and equipment performance metrics.\n\n - PLC diagnostics, servo systems, industrial networks, or machine vision.\n\n\n\nBenefits\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\n\nHow we’re different\n\nEtched believes in the Bitter Lesson http://www.incompleteideas.net/IncIdeas/BitterLesson.html. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed."},{"id":"d17210f8-074d-4112-9ae1-0a57d2c9792f","title":"Production Line Supervisor","department":"Operations","team":"Operations","employmentType":"FullTime","location":"San Jose","secondaryLocations":[],"publishedAt":"2026-10-13T19:47:15.649+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"addressRegion":"CA","addressCountry":"United States","addressLocality":"San Jose"}},"jobUrl":"https://jobs.ashbyhq.com/etched/d17210f8-074d-4112-9ae1-0a57d2c9792f","applyUrl":"https://jobs.ashbyhq.com/etched/d17210f8-074d-4112-9ae1-0a57d2c9792f/application","descriptionHtml":"About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is building a new category of AI hardware: frontier inference clusters. To deliver them at the pace this market demands, we're bringing manufacturing in-house, starting with the first Etched-operated production line. It will take our server racks from new product introduction (NPI) into high-volume manufacturing.
As Production Line Supervisor, you'll be the person who makes that line run. You'll hire and train its founding operator team, own the floor every shift, and be the connective tissue between production, inventory, lab operations, test development, and engineering. The way you staff, train, run, and recover this line will become the playbook for every Etched manufacturing site that follows.
This is a ground-floor role: you'll help build a manufacturing operation from nothing, and grow with it as it scales.
Key Responsibilities
Build the team
Recruit, hire, and develop the line's founding team of assembly technicians and production test operators
Train operators on the SOPs our production team provides, set clear standards, and hold the team to them
Build a culture of safety, quality, and ownership on the floor
Run the line
Own every shift's results: schedule and assign the team, execute work orders, and deliver builds on time and to spec
Partner with receiving and inventory to keep material flowing to the line, and head off shortages before they stop work
Be the first responder when issues hit mid-shift: triage, contain, and pull in the right engineer fast
Own day-to-day use of our inventory management, manufacturing execution, and test software, and keep the data in them accurate
Work across the company
Be the line's voice in daily coordination with production, inventory, lab operations, and engineering
Partner with our engineers and test development team to root-cause process issues, test failures, and escapes, and drive fixes to closure
Give leadership a clear, honest read on line status, risks, and what the team needs to hit plan
Build for scale
Turn lessons from the floor into better SOPs, processes, and training
Design the processes and site-readiness checklists that will let us replicate this line at future Etched manufacturing sites
What Success Looks Like
The line is fully staffed, trained, and running predictable, on-time shifts
Material problems get caught before they stop the line
Issues found on the floor get fixed at the source, not just worked around
When we open our next site, your playbook is how we do it
You may be a good fit if you have (Must-have qualifications)
Experience leading a hands-on team in a fast-paced, physical environment where the work has to be right and on time, such as a factory line, construction crew, commercial kitchen, or restaurant
A track record of scheduling people, assigning work, and running a tight, organized shift
Experience training new team members and holding them to clear standards and procedures
A knack for keeping supplies stocked and work moving, and spotting bottlenecks before they happen
Calm, practical judgment when things go wrong mid-shift
Clear, direct communication with your team, partner departments, and leadership
Comfort learning new software tools and using them every day
Excitement to build a career in AI hardware (no prior tech experience required)
Bonus Points
Experience in electronics, hardware, or server manufacturing
Hands-on use of an MES, ERP, or inventory management system
Experience opening a new site, line, or location: a factory, a store, a restaurant
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Compensation Range
$100,000 - $120,000, plus equity
Our Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.
You’ll work directly with our founders and embed with our special projects team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. Your work will vary widely, and your success is measured by how much faster Etched moves, not by the lines of code you write.
This role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.
Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup
Have strong full-stack skills. We care less about whether you write every line yourself and more about whether what you ship works
Have built LLM agents or AI tooling that real users depend on, which means more than calling an API: context engineering, tool integration, evals, and failure analysis
Use AI to ramp fast on unfamiliar domains. Agentic coding tools and frontier models are how you work, not an add-on
Have product sense, design taste, and extreme attention to detail
Have extreme agency: you find the real problem, not just the stated one
Embed with our special projects team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.
Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.
Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.
Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.
Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.
Exposure to chip development, kernels, hardware, or manufacturing.
Infrastructure, data engineering, or DevOps experience
Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration
Startup experience, especially through hypergrowth
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2,500 per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch and dinner in our office
Unlimited compute budget subject to ROI justification
$150K – $400K+
Plus Significant Equity
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
","descriptionPlain":"JOB SUMMARY\n\nOur Internal Acceleration team’s mandate is to build agents to accelerate the production of frontier tokens.\n\nYou’ll work directly with our founders and embed with our special projects team to build new agentic harnesses and operating systems to transform the way hardware is built in an AI native world. Your work will vary widely, and your success is measured by how much faster Etched moves, not by the lines of code you write.\n\nThis role is for engineers who thrive on ambiguity, have real product sense, and want to own problems end to end. It’s a whiteboard for future founders. The problems we solve are time-sensitive and business-critical. This role will not be a 9-5, and the ideal candidate is excited about that.\n\n\nYOU MAY BE A GOOD FIT IF YOU\n\n - Have at least 1-5+ years of experience building and shipping software end to end, ideally at a fast-moving startup\n\n - Have strong full-stack skills. We care less about whether you write every line yourself and more about whether what you ship works\n\n - Have built LLM agents or AI tooling that real users depend on, which means more than calling an API: context engineering, tool integration, evals, and failure analysis\n\n - Use AI to ramp fast on unfamiliar domains. Agentic coding tools and frontier models are how you work, not an add-on\n\n - Have product sense, design taste, and extreme attention to detail\n\n - Have extreme agency: you find the real problem, not just the stated one\n\n\nKEY RESPONSIBILITIES\n\n - Embed with our special projects team to find the highest-leverage bottlenecks, and own each one from first idea to a tool engineers rely on every day.\n\n - Build and deploy LLM agents wired into our engineering workflows via tool-calling and MCP.\n\n - Ship full-stack internal products from zero to one: the interfaces, data pipelines, and infrastructure that define how Etched builds.\n\n - Measure what works. Design evals and track adoption so we double down on the tools that matter and kill the ones that don’t.\n\n - Take on special projects directly with the founders, surfacing problems across the company and doing whatever it takes to hit critical milestones.\n\n\nSTRONG CANDIDATES MAY ALSO HAVE\n\n - Exposure to chip development, kernels, hardware, or manufacturing.\n\n - Infrastructure, data engineering, or DevOps experience\n\n - Fine-tuning, RAG over proprietary technical data, or multi-agent orchestration\n\n - Startup experience, especially through hypergrowth\n\n\nBENEFITS\n\n - Medical, dental, and vision packages with generous premium coverage\n \n - $500 per month credit for waiving medical benefits\n\n - Housing subsidy of $2,500 per month for those living within walking distance of the office\n\n - Relocation support for those moving to San Jose (Santana Row)\n\n - Various wellness benefits covering fitness, mental health, and more\n\n - Daily lunch and dinner in our office\n\n - Unlimited compute budget subject to ROI justification\n\n\nBASE COMPENSATION RANGE\n\n - $150K – $400K+\n\n - Plus Significant Equity\n\n\nHOW WE’RE DIFFERENT\n\nEtched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.\n\nWe are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.\n\n\nABOUT ETCHED\n\nEtched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history."}],"apiVersion":"1"}